techlibs/xilinx/drams.txt

   1
   2 bram $__XILINX_RAM64X1D
   3   init 1
   4   abits 6
   5   dbits 1
   6   groups 2
   7   ports  1 1
   8   wrmode 0 1
   9   enable 0 1
  10   transp 0 0
  11   clocks 0 1
  12   clkpol 0 2
  13 endbram
  14
  15 bram $__XILINX_RAM128X1D
  16   init 1
  17   abits 7
  18   dbits 1
  19   groups 2
  20   ports  1 1
  21   wrmode 0 1
  22   enable 0 1
  23   transp 0 0
  24   clocks 0 1
  25   clkpol 0 2
  26 endbram
  27
  28 match $__XILINX_RAM64X1D
  29   make_outreg
  30   or_next_if_better
  31 endmatch
  32
  33 match $__XILINX_RAM128X1D
  34   make_outreg
  35 endmatch
  36