Merge pull request #521 from azonenberg/for_clifford
[yosys.git] / techlibs / xilinx / lut2lut.v
1 module LUT1(output O, input I0);
2 parameter [1:0] INIT = 0;
3 \$lut #(
4 .WIDTH(1),
5 .LUT(INIT)
6 ) _TECHMAP_REPLACE_ (
7 .A(I0),
8 .Y(O)
9 );
10 endmodule
11
12 module LUT2(output O, input I0, I1);
13 parameter [3:0] INIT = 0;
14 \$lut #(
15 .WIDTH(2),
16 .LUT(INIT)
17 ) _TECHMAP_REPLACE_ (
18 .A({I1, I0}),
19 .Y(O)
20 );
21 endmodule
22
23 module LUT3(output O, input I0, I1, I2);
24 parameter [7:0] INIT = 0;
25 \$lut #(
26 .WIDTH(3),
27 .LUT(INIT)
28 ) _TECHMAP_REPLACE_ (
29 .A({I2, I1, I0}),
30 .Y(O)
31 );
32 endmodule
33
34 module LUT4(output O, input I0, I1, I2, I3);
35 parameter [15:0] INIT = 0;
36 \$lut #(
37 .WIDTH(4),
38 .LUT(INIT)
39 ) _TECHMAP_REPLACE_ (
40 .A({I3, I2, I1, I0}),
41 .Y(O)
42 );
43 endmodule
44
45 module LUT5(output O, input I0, I1, I2, I3, I4);
46 parameter [31:0] INIT = 0;
47 \$lut #(
48 .WIDTH(5),
49 .LUT(INIT)
50 ) _TECHMAP_REPLACE_ (
51 .A({I4, I3, I2, I1, I0}),
52 .Y(O)
53 );
54 endmodule
55
56 module LUT6(output O, input I0, I1, I2, I3, I4, I5);
57 parameter [63:0] INIT = 0;
58 \$lut #(
59 .WIDTH(6),
60 .LUT(INIT)
61 ) _TECHMAP_REPLACE_ (
62 .A({I5, I4, I3, I2, I1, I0}),
63 .Y(O)
64 );
65 endmodule