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HEAD
Merge branch 'master' of https://github.com/YosysHQ/yosys into gowin
[yosys.git]
/
techlibs
/
xilinx
/
tests
/
bram2.sh
1
#!/bin/bash
2
3
set -ex
4
unisims
=/
opt
/
Xilinx
/
Vivado
/
2014.4
/
data
/
verilog
/
src
/
unisims
5
..
/
..
/
..
/
yosys
-v2 -l
bram2.log
-p
synth_xilinx
-o
bram2_syn.v bram2.v
6
iverilog
-T
typ
-o
bram2_tb bram2_tb.v bram2_syn.v
-y
$unisims $unisims
/
..
/
glbl.v
7
vvp
-N
bram2_tb
8