1 -- Top cell with two instantiations of the tap_controller with parallel scan chains
4 use ieee.std_logic_1164.ALL;
8 entity dual_parallel is
16 I1_TDO: out std_logic;
17 I1_TRST_N: in std_logic;
25 I2_TDO: out std_logic;
26 I2_TRST_N: in std_logic
30 architecture rtl of dual_parallel is
31 signal I1_PAD_IN: std_logic;
32 signal I1_PAD_EN: std_logic;
33 signal I1_PAD_OUT: std_logic;
34 signal I2_PAD_IN: std_logic;
35 signal I2_PAD_EN: std_logic;
36 signal I2_PAD_OUT: std_logic;
38 CTRL1: c4m_jtag_tap_controller
53 PAD_IN(0) => I1_PAD_IN,
54 PAD_EN(0) => I1_PAD_EN,
55 PAD_OUT(0) => I1_PAD_OUT
58 CTRL2: c4m_jtag_tap_controller
73 PAD_IN(0) => I2_PAD_IN,
74 PAD_EN(0) => I2_PAD_EN,
75 PAD_OUT(0) => I2_PAD_OUT
78 I1_PAD_IN <= I2_PAD_OUT when I2_PAD_EN = '1' else
80 I2_PAD_IN <= I1_PAD_OUT when I1_PAD_EN = '1' else