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Add ability to override verilog mode for verific -f command
[yosys.git] / tests / aiger / symbols.aag
1 aag 2 1 1 1 0
2 2
3 4 2 1
4 4
5 i0 d
6 l0 q
7 o0 q
8 c
9 Generated by Yosys 0.9+932 (git sha1 baba33fb, clang 9.0.0-2 -fPIC -Os)