Merge pull request #3310 from robinsonb5-PRs/master
[yosys.git] / tests / arch / run-test.sh
1 #!/bin/bash
2
3 set -e
4
5 declare -A defines=( ["ice40"]="ICE40_HX ICE40_LP ICE40_U" )
6
7 echo "Running syntax check on arch sim models"
8 for arch in ../../techlibs/*; do
9 find $arch -name cells_sim.v | while read path; do
10 arch_name=$(basename -- $arch)
11 if [ "${defines[$arch_name]}" ]; then
12 for def in ${defines[$arch_name]}; do
13 echo -n "Test $path -D$def ->"
14 iverilog -t null -I$arch -D$def -DNO_ICE40_DEFAULT_ASSIGNMENTS $path
15 echo " ok"
16 done
17 else
18 echo -n "Test $path ->"
19 iverilog -t null -I$arch $path
20 echo " ok"
21 fi
22 done
23 done
24
25 for path in "../../techlibs/common/simcells.v" "../../techlibs/common/simlib.v"; do
26 echo -n "Test $path ->"
27 iverilog -t null $path
28 echo " ok"
29 done