tests/asicworld/code_hdl_models_encoder_using_if.v

   1 //-----------------------------------------------------
   2 // Design Name : encoder_using_if
   3 // File Name   : encoder_using_if.v
   4 // Function    : Encoder using If
   5 // Coder       : Deepak Kumar Tala
   6 //-----------------------------------------------------
   7 module encoder_using_if(
   8 binary_out , //  4 bit binary output
   9 encoder_in , //  16-bit input
  10 enable       //  Enable for the encoder
  11 );
  12 //-----------Output Ports---------------
  13 output [3:0] binary_out  ;
  14 //-----------Input Ports---------------
  15 input  enable ;
  16 input [15:0] encoder_in ;
  17 //------------Internal Variables--------
  18 reg [3:0] binary_out ;
  19 //-------------Code Start-----------------
  20 always @ (enable or encoder_in)
  21  begin
  22    binary_out = 0;
  23    if (enable) begin
  24      if (encoder_in == 16'h0002) begin
  25       binary_out = 1;
  26      end  if (encoder_in == 16'h0004) begin
  27       binary_out = 2;
  28      end  if (encoder_in == 16'h0008) begin
  29       binary_out = 3;
  30      end  if (encoder_in == 16'h0010) begin
  31       binary_out = 4;
  32      end  if (encoder_in == 16'h0020) begin
  33       binary_out = 5;
  34      end  if (encoder_in == 16'h0040) begin
  35       binary_out = 6;
  36      end  if (encoder_in == 16'h0080) begin
  37       binary_out = 7;
  38      end  if (encoder_in == 16'h0100) begin
  39       binary_out = 8;
  40      end  if (encoder_in == 16'h0200) begin
  41       binary_out = 9;
  42      end if (encoder_in == 16'h0400) begin
  43       binary_out = 10;
  44      end  if (encoder_in == 16'h0800) begin
  45       binary_out = 11;
  46      end  if (encoder_in == 16'h1000) begin
  47       binary_out = 12;
  48      end  if (encoder_in == 16'h2000) begin
  49       binary_out = 13;
  50      end  if (encoder_in == 16'h4000) begin
  51       binary_out = 14;
  52      end if (encoder_in == 16'h8000) begin
  53       binary_out = 15;
  54      end
  55   end
  56 end
  57
  58 endmodule