tests/asicworld/code_hdl_models_mux_using_case.v

   1 //-----------------------------------------------------
   2 // Design Name : mux_using_case
   3 // File Name   : mux_using_case.v
   4 // Function    : 2:1 Mux using Case
   5 // Coder       : Deepak Kumar Tala
   6 //-----------------------------------------------------
   7 module  mux_using_case(
   8 din_0      , // Mux first input
   9 din_1      , // Mux Second input
  10 sel           , // Select input
  11 mux_out   // Mux output
  12 );
  13 //-----------Input Ports---------------
  14 input din_0, din_1, sel ;
  15 //-----------Output Ports---------------
  16 output mux_out;
  17 //------------Internal Variables--------
  18 reg  mux_out;
  19 //-------------Code Starts Here---------
  20 always @ (sel or din_0 or din_1)
  21 begin : MUX
  22  case(sel )
  23     1'b0 : mux_out = din_0;
  24     1'b1 : mux_out = din_1;
  25  endcase
  26 end
  27
  28 endmodule //End Of Module mux