tests/asicworld/code_hdl_models_tff_sync_reset.v

   1 //-----------------------------------------------------
   2 // Design Name : tff_sync_reset
   3 // File Name   : tff_sync_reset.v
   4 // Function    : T flip-flop sync reset
   5 // Coder       : Deepak Kumar Tala
   6 //-----------------------------------------------------
   7 module tff_sync_reset (
   8 data  , // Data Input
   9 clk   , // Clock Input
  10 reset , // Reset input
  11 q       // Q output
  12 );
  13 //-----------Input Ports---------------
  14 input data, clk, reset ;
  15 //-----------Output Ports---------------
  16 output q;
  17 //------------Internal Variables--------
  18 reg q;
  19 //-------------Code Starts Here---------
  20 always @ ( posedge clk)
  21 if (~reset) begin
  22   q <= 1'b0;
  23 end else if (data) begin
  24   q <= !q;
  25 end
  26
  27 endmodule //End Of Module tff_async_reset