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Merge remote-tracking branch 'origin/master' into xc7mux
[yosys.git]
/
tests
/
asicworld
/
code_verilog_tutorial_tri_buf.v
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module tri_buf (a,b,enable);
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input a;
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output b;
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input enable;
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wire b;
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assign b = (enable) ? a : 1'bz;
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endmodule