tests/configs/o3-timing-mp-ruby.py

   1 # Copyright (c) 2006-2007 The Regents of The University of Michigan
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  26
  27 import m5
  28 from m5.objects import *
  29
  30 nb_cores = 4
  31 cpus = [ DerivO3CPU(cpu_id=i) for i in range(nb_cores) ]
  32
  33 import ruby_config
  34 ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", nb_cores)
  35
  36 # system simulated
  37 system = System(cpu = cpus, physmem = ruby_memory, membus = SystemXBar(),
  38                 mem_mode = "timing",
  39                 clk_domain = SrcClockDomain(clock = '1GHz'))
  40
  41 # Create a seperate clock domain for components that should run at
  42 # CPUs frequency
  43 system.cpu_clk_domain = SrcClockDomain(clock = '2GHz')
  44
  45 for cpu in cpus:
  46     # create the interrupt controller
  47     cpu.createInterruptController()
  48     cpu.connectAllPorts(system.membus)
  49     # All cpus are associated with cpu_clk_domain
  50     cpu.clk_domain = system.cpu_clk_domain
  51
  52 # connect memory to membus
  53 system.physmem.port = system.membus.master
  54
  55 # Connect the system port for loading of binaries etc
  56 system.system_port = system.membus.slave
  57
  58 # -----------------------
  59 # run simulation
  60 # -----------------------
  61
  62 root = Root(full_system = False, system = system)
  63 root.system.mem_mode = 'timing'