tests/configs/o3-timing.py

   1 # Copyright (c) 2013 ARM Limited
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  13 # Copyright (c) 2006-2007 The Regents of The University of Michigan
  14 # All rights reserved.
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  38
  39 from m5.objects import *
  40 from m5.defines import buildEnv
  41 from base_config import *
  42 from arm_generic import *
  43 from common.cores.arm.O3_ARM_v7a import O3_ARM_v7a_3
  44
  45 # If we are running ARM regressions, use a more sensible CPU
  46 # configuration. This makes the results more meaningful, and also
  47 # increases the coverage of the regressions.
  48 if buildEnv['TARGET_ISA'] == "arm":
  49     root = ArmSESystemUniprocessor(mem_mode='timing', mem_class=DDR3_1600_8x8,
  50                                    cpu_class=O3_ARM_v7a_3).create_root()
  51 else:
  52     root = BaseSESystemUniprocessor(mem_mode='timing', mem_class=DDR3_1600_8x8,
  53                                    cpu_class=DerivO3CPU).create_root()