tests/configs/simple-timing-ruby.py

   1 # Copyright (c) 2006-2007 The Regents of The University of Michigan
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  14 #
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  26 #
  27 # Authors: Steve Reinhardt
  28
  29 import m5
  30 from m5.objects import *
  31 from m5.defines import buildEnv
  32 from m5.util import addToPath
  33 import os, optparse, sys
  34
  35 # Get paths we might need
  36 config_path = os.path.dirname(os.path.abspath(__file__))
  37 config_root = os.path.dirname(config_path)
  38 m5_root = os.path.dirname(config_root)
  39 addToPath(config_root+'/configs/common')
  40 addToPath(config_root+'/configs/ruby')
  41
  42 import Ruby
  43
  44 parser = optparse.OptionParser()
  45
  46 #
  47 # Add the ruby specific and protocol specific options
  48 #
  49 Ruby.define_options(parser)
  50
  51 execfile(os.path.join(config_root, "configs/common", "Options.py"))
  52
  53 (options, args) = parser.parse_args()
  54
  55 #
  56 # Set the default cache size and associativity to be very small to encourage
  57 # races between requests and writebacks.
  58 #
  59 options.l1d_size="256B"
  60 options.l1i_size="256B"
  61 options.l2_size="512B"
  62 options.l3_size="1kB"
  63 options.l1d_assoc=2
  64 options.l1i_assoc=2
  65 options.l2_assoc=2
  66 options.l3_assoc=2
  67
  68 # this is a uniprocessor only test
  69 options.num_cpus = 1
  70
  71 cpu = TimingSimpleCPU(cpu_id=0)
  72 system = System(cpu = cpu, physmem = PhysicalMemory())
  73
  74 Ruby.create_system(options, system)
  75
  76 assert(len(system.ruby._cpu_ruby_ports) == 1)
  77
  78 #
  79 # Tie the cpu cache ports to the ruby cpu ports and
  80 # physmem, respectively
  81 #
  82 cpu.connectAllPorts(system.ruby._cpu_ruby_ports[0])
  83
  84 # Connect the system port for loading of binaries etc
  85 system.system_port = system.ruby._sys_port_proxy.port
  86
  87 # -----------------------
  88 # run simulation
  89 # -----------------------
  90
  91 root = Root(full_system = False, system = system)
  92 root.system.mem_mode = 'timing'
  93
  94 # Not much point in this being higher than the L1 latency
  95 m5.ticks.setGlobalFrequency('1ns')