projects
/
yosys.git
/ blob
commit
grep
author
committer
pickaxe
?
search:
re
b45b32b9ce43d51b16499da7bc0c49068b2c7815
[yosys.git]
/
tests
/
hana
/
test_intermout_exprs_logicneg_test.v
1
module test(out, vout, in, vin);
2
output out, vout;
3
input in;
4
input [3:0] vin;
5
assign out = !in;
6
assign vout = !vin;
7
endmodule