348c566ad7f519d2b91c2fb39ca62036c98b043d
[yosys.git] / tests / hana / test_parse2synthtrans_case_1_test.v
1 module demultiplexer1_to_4 (out0, out1, out2, out3, in, s1, s0);
2 output out0, out1, out2, out3;
3 reg out0, out1, out2, out3;
4 input in;
5 input s1, s0;
6 reg [3:0] encoding;
7 reg [1:0] state;
8 always @(encoding) begin
9 case (encoding)
10 4'bxx11: state = 1;
11 4'bx0xx: state = 3;
12 4'b11xx: state = 4;
13 4'bx1xx: state = 2;
14 4'bxx1x: state = 1;
15 4'bxxx1: state = 0;
16 default: state = 0;
17 endcase
18 end
19
20 always @(encoding) begin
21 case (encoding)
22 4'b0000: state = 1;
23 default: state = 0;
24 endcase
25 end
26 endmodule