tests/hana/test_simulation_and.v

   1
   2 // test_simulation_and_1_test.v
   3 module f1_test(input [1:0] in, output out);
   4 assign out = in[0] & in[1];
   5 endmodule
   6
   7 // test_simulation_and_2_test.v
   8 module f2_test(input [1:0] in, output out);
   9 assign out = in[0] && in[1];
  10 endmodule
  11
  12 // test_simulation_and_3_test.v
  13 module f3_test(input [2:0] in, output out);
  14 assign out = in[0] & in[1] & in[2];
  15 endmodule
  16
  17 // test_simulation_and_4_test.v
  18 module f4_test(input [2:0] in, output out);
  19 assign out = in[0] && in[1] && in[2];
  20 endmodule
  21
  22 // test_simulation_and_5_test.v
  23 module f5_test(input [3:0] in, output out);
  24 assign out = in[0] & in[1] & in[2] & in[3];
  25 endmodule
  26
  27 // test_simulation_and_6_test.v
  28 module f6_test(input [3:0] in, output out);
  29 assign out = in[0] && in[1] && in[2] && in[3];
  30 endmodule
  31
  32 // test_simulation_and_7_test.v
  33 module f7_test(input [3:0] in, output out);
  34 and myand(out, in[0], in[1], in[2], in[3]);
  35 endmodule