Merge branch 'clifford/dffsrfix' of https://github.com/YosysHQ/yosys into xaig
[yosys.git] / tests / hana / test_simulation_buffer.v
1
2 // test_simulation_buffer_1_test.v
3 module f1_test(input in, output out);
4 assign out = in;
5 endmodule
6
7 // test_simulation_buffer_2_test.v
8 module f2_test(input [1:0] in, output [1:0] out);
9 assign out[0] = in[0];
10 assign out[1] = in[1];
11 endmodule
12
13 // test_simulation_buffer_3_test.v
14 module f3_test(input in, output [1:0] out);
15 assign out[0] = in;
16 assign out[1] = in;
17 endmodule