Merge branch 'clifford/dffsrfix' of https://github.com/YosysHQ/yosys into xaig
[yosys.git] / tests / hana / test_simulation_mux.v
1
2 // test_simulation_mux_16_test.v
3 module f1_test(input [15:0] in, input [3:0] select, output reg out);
4
5 always @( in or select)
6 case (select)
7 0: out = in[0];
8 1: out = in[1];
9 2: out = in[2];
10 3: out = in[3];
11 4: out = in[4];
12 5: out = in[5];
13 6: out = in[6];
14 7: out = in[7];
15 8: out = in[8];
16 9: out = in[9];
17 10: out = in[10];
18 11: out = in[11];
19 12: out = in[12];
20 13: out = in[13];
21 14: out = in[14];
22 15: out = in[15];
23 endcase
24 endmodule
25
26 // test_simulation_mux_2_test.v
27 module f2_test(input [1:0] in, input select, output reg out);
28
29 always @( in or select)
30 case (select)
31 0: out = in[0];
32 1: out = in[1];
33 endcase
34 endmodule
35
36 // test_simulation_mux_32_test.v
37 module f3_test(input [31:0] in, input [4:0] select, output reg out);
38
39 always @( in or select)
40 case (select)
41 0: out = in[0];
42 1: out = in[1];
43 2: out = in[2];
44 3: out = in[3];
45 4: out = in[4];
46 5: out = in[5];
47 6: out = in[6];
48 7: out = in[7];
49 8: out = in[8];
50 9: out = in[9];
51 10: out = in[10];
52 11: out = in[11];
53 12: out = in[12];
54 13: out = in[13];
55 14: out = in[14];
56 15: out = in[15];
57 16: out = in[16];
58 17: out = in[17];
59 18: out = in[18];
60 19: out = in[19];
61 20: out = in[20];
62 21: out = in[21];
63 22: out = in[22];
64 23: out = in[23];
65 24: out = in[24];
66 25: out = in[25];
67 26: out = in[26];
68 27: out = in[27];
69 28: out = in[28];
70 29: out = in[29];
71 30: out = in[30];
72 31: out = in[31];
73 endcase
74 endmodule
75
76
77 // test_simulation_mux_4_test.v
78 module f4_test(input [3:0] in, input [1:0] select, output reg out);
79
80 always @( in or select)
81 case (select)
82 0: out = in[0];
83 1: out = in[1];
84 2: out = in[2];
85 3: out = in[3];
86 endcase
87 endmodule
88
89 // test_simulation_mux_64_test.v
90 module f5_test(input [63:0] in, input [5:0] select, output reg out);
91
92 always @( in or select)
93 case (select)
94 0: out = in[0];
95 1: out = in[1];
96 2: out = in[2];
97 3: out = in[3];
98 4: out = in[4];
99 5: out = in[5];
100 6: out = in[6];
101 7: out = in[7];
102 8: out = in[8];
103 9: out = in[9];
104 10: out = in[10];
105 11: out = in[11];
106 12: out = in[12];
107 13: out = in[13];
108 14: out = in[14];
109 15: out = in[15];
110 16: out = in[16];
111 17: out = in[17];
112 18: out = in[18];
113 19: out = in[19];
114 20: out = in[20];
115 21: out = in[21];
116 22: out = in[22];
117 23: out = in[23];
118 24: out = in[24];
119 25: out = in[25];
120 26: out = in[26];
121 27: out = in[27];
122 28: out = in[28];
123 29: out = in[29];
124 30: out = in[30];
125 31: out = in[31];
126 32: out = in[32];
127 33: out = in[33];
128 34: out = in[34];
129 35: out = in[35];
130 36: out = in[36];
131 37: out = in[37];
132 38: out = in[38];
133 39: out = in[39];
134 40: out = in[40];
135 41: out = in[41];
136 42: out = in[42];
137 43: out = in[43];
138 44: out = in[44];
139 45: out = in[45];
140 46: out = in[46];
141 47: out = in[47];
142 48: out = in[48];
143 49: out = in[49];
144 50: out = in[50];
145 51: out = in[51];
146 52: out = in[52];
147 53: out = in[53];
148 54: out = in[54];
149 55: out = in[55];
150 56: out = in[56];
151 57: out = in[57];
152 58: out = in[58];
153 59: out = in[59];
154 60: out = in[60];
155 61: out = in[61];
156 62: out = in[62];
157 63: out = in[63];
158 endcase
159 endmodule
160
161
162 // test_simulation_mux_8_test.v
163 module f6_test(input [7:0] in, input [2:0] select, output reg out);
164
165 always @( in or select)
166 case (select)
167 0: out = in[0];
168 1: out = in[1];
169 2: out = in[2];
170 3: out = in[3];
171 4: out = in[4];
172 5: out = in[5];
173 6: out = in[6];
174 7: out = in[7];
175 endcase
176 endmodule