Merge branch 'clifford/dffsrfix' of https://github.com/YosysHQ/yosys into xaig
[yosys.git] / tests / hana / test_simulation_nor.v
1
2 // test_simulation_nor_1_test.v
3 module f1_test(input [1:0] in, output out);
4 assign out = ~(in[0] | in[1]);
5 endmodule
6
7 // test_simulation_nor_2_test.v
8 module f2_test(input [2:0] in, output out);
9 assign out = ~(in[0] | in[1] | in[2]);
10 endmodule
11
12 // test_simulation_nor_3_test.v
13 module f3_test(input [3:0] in, output out);
14 assign out = ~(in[0] | in[1] | in[2] | in[3]);
15 endmodule
16
17 // test_simulation_nor_4_test.v
18 module f4_test(input [3:0] in, output out);
19 nor mynor(out, in[0], in[1], in[2], in[3]);
20 endmodule