tests/hana/test_simulation_techmap.v

   1
   2 // test_simulation_techmap_buf_test.v
   3 module f1_test(input in, output out);
   4 assign out = in;
   5 endmodule
   6
   7 // test_simulation_techmap_inv_test.v
   8 module f2_test(input in, output out);
   9 assign out = ~in;
  10 endmodule
  11
  12 // test_simulation_techmap_mux_0_test.v
  13 module f3_test(input [1:0] in, input select, output reg out);
  14
  15 always @( in or select)
  16     case (select)
  17             0: out = in[0];
  18             1: out = in[1];
  19         endcase
  20 endmodule
  21
  22 // test_simulation_techmap_mux_128_test.v
  23 module f4_test(input [127:0] in, input [6:0] select, output reg out);
  24
  25 always @( in or select)
  26     case (select)
  27             0: out = in[0];
  28             1: out = in[1];
  29             2: out = in[2];
  30             3: out = in[3];
  31             4: out = in[4];
  32             5: out = in[5];
  33             6: out = in[6];
  34             7: out = in[7];
  35             8: out = in[8];
  36             9: out = in[9];
  37             10: out = in[10];
  38             11: out = in[11];
  39             12: out = in[12];
  40             13: out = in[13];
  41             14: out = in[14];
  42             15: out = in[15];
  43             16: out = in[16];
  44             17: out = in[17];
  45             18: out = in[18];
  46             19: out = in[19];
  47             20: out = in[20];
  48             21: out = in[21];
  49             22: out = in[22];
  50             23: out = in[23];
  51             24: out = in[24];
  52             25: out = in[25];
  53             26: out = in[26];
  54             27: out = in[27];
  55             28: out = in[28];
  56             29: out = in[29];
  57             30: out = in[30];
  58             31: out = in[31];
  59             32: out = in[32];
  60             33: out = in[33];
  61             34: out = in[34];
  62             35: out = in[35];
  63             36: out = in[36];
  64             37: out = in[37];
  65             38: out = in[38];
  66             39: out = in[39];
  67             40: out = in[40];
  68             41: out = in[41];
  69             42: out = in[42];
  70             43: out = in[43];
  71             44: out = in[44];
  72             45: out = in[45];
  73             46: out = in[46];
  74             47: out = in[47];
  75             48: out = in[48];
  76             49: out = in[49];
  77             50: out = in[50];
  78             51: out = in[51];
  79             52: out = in[52];
  80             53: out = in[53];
  81             54: out = in[54];
  82             55: out = in[55];
  83             56: out = in[56];
  84             57: out = in[57];
  85             58: out = in[58];
  86             59: out = in[59];
  87             60: out = in[60];
  88             61: out = in[61];
  89             62: out = in[62];
  90             63: out = in[63];
  91             64: out = in[64];
  92             65: out = in[65];
  93             66: out = in[66];
  94             67: out = in[67];
  95             68: out = in[68];
  96             69: out = in[69];
  97             70: out = in[70];
  98             71: out = in[71];
  99             72: out = in[72];
 100             73: out = in[73];
 101             74: out = in[74];
 102             75: out = in[75];
 103             76: out = in[76];
 104             77: out = in[77];
 105             78: out = in[78];
 106             79: out = in[79];
 107             80: out = in[80];
 108             81: out = in[81];
 109             82: out = in[82];
 110             83: out = in[83];
 111             84: out = in[84];
 112             85: out = in[85];
 113             86: out = in[86];
 114             87: out = in[87];
 115             88: out = in[88];
 116             89: out = in[89];
 117             90: out = in[90];
 118             91: out = in[91];
 119             92: out = in[92];
 120             93: out = in[93];
 121             94: out = in[94];
 122             95: out = in[95];
 123             96: out = in[96];
 124             97: out = in[97];
 125             98: out = in[98];
 126             99: out = in[99];
 127             100: out = in[100];
 128             101: out = in[101];
 129             102: out = in[102];
 130             103: out = in[103];
 131             104: out = in[104];
 132             105: out = in[105];
 133             106: out = in[106];
 134             107: out = in[107];
 135             108: out = in[108];
 136             109: out = in[109];
 137             110: out = in[110];
 138             111: out = in[111];
 139             112: out = in[112];
 140             113: out = in[113];
 141             114: out = in[114];
 142             115: out = in[115];
 143             116: out = in[116];
 144             117: out = in[117];
 145             118: out = in[118];
 146             119: out = in[119];
 147             120: out = in[120];
 148             121: out = in[121];
 149             122: out = in[122];
 150             123: out = in[123];
 151             124: out = in[124];
 152             125: out = in[125];
 153             126: out = in[126];
 154             127: out = in[127];
 155         endcase
 156 endmodule
 157
 158 // test_simulation_techmap_mux_8_test.v
 159 module f5_test(input [7:0] in, input [2:0] select, output reg out);
 160
 161 always @( in or select)
 162     case (select)
 163             0: out = in[0];
 164             1: out = in[1];
 165             2: out = in[2];
 166             3: out = in[3];
 167             4: out = in[4];
 168             5: out = in[5];
 169             6: out = in[6];
 170             7: out = in[7];
 171         endcase
 172 endmodule