tests/long/00.gzip/ref/alpha/linux/simple-atomic/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 checkpoint=
   5 clock=1000000000000
   6 max_tick=0
   7 output_file=cout
   8 progress_interval=0
   9
  10 [debug]
  11 break_cycles=
  12
  13 [exetrace]
  14 intel_format=false
  15 pc_symbol=true
  16 print_cpseq=false
  17 print_cycle=true
  18 print_data=true
  19 print_effaddr=true
  20 print_fetchseq=false
  21 print_iregs=false
  22 print_opclass=true
  23 print_thread=true
  24 speculative=true
  25 trace_system=client
  26
  27 [serialize]
  28 count=10
  29 cycle=0
  30 dir=cpt.%012d
  31 period=0
  32
  33 [stats]
  34 descriptions=true
  35 dump_cycle=0
  36 dump_period=0
  37 dump_reset=false
  38 ignore_events=
  39 mysql_db=
  40 mysql_host=
  41 mysql_password=
  42 mysql_user=
  43 project_name=test
  44 simulation_name=test
  45 simulation_sample=0
  46 text_compat=true
  47 text_file=m5stats.txt
  48
  49 [system]
  50 type=System
  51 children=cpu membus physmem
  52 mem_mode=atomic
  53 physmem=system.physmem
  54
  55 [system.cpu]
  56 type=DerivO3CPU
  57 children=dcache fuPool icache l2cache toL2Bus workload
  58 BTBEntries=4096
  59 BTBTagSize=16
  60 LFSTSize=1024
  61 LQEntries=32
  62 RASSize=16
  63 SQEntries=32
  64 SSITSize=1024
  65 activity=0
  66 backComSize=5
  67 choiceCtrBits=2
  68 choicePredictorSize=8192
  69 clock=1
  70 commitToDecodeDelay=1
  71 commitToFetchDelay=1
  72 commitToIEWDelay=1
  73 commitToRenameDelay=1
  74 commitWidth=8
  75 decodeToFetchDelay=1
  76 decodeToRenameDelay=1
  77 decodeWidth=8
  78 defer_registration=false
  79 dispatchWidth=8
  80 fetchToDecodeDelay=1
  81 fetchTrapLatency=1
  82 fetchWidth=8
  83 forwardComSize=5
  84 fuPool=system.cpu.fuPool
  85 function_trace=false
  86 function_trace_start=0
  87 globalCtrBits=2
  88 globalHistoryBits=13
  89 globalPredictorSize=8192
  90 iewToCommitDelay=1
  91 iewToDecodeDelay=1
  92 iewToFetchDelay=1
  93 iewToRenameDelay=1
  94 instShiftAmt=2
  95 issueToExecuteDelay=1
  96 issueWidth=8
  97 localCtrBits=2
  98 localHistoryBits=11
  99 localHistoryTableSize=2048
 100 localPredictorSize=2048
 101 max_insts_all_threads=0
 102 max_insts_any_thread=0
 103 max_loads_all_threads=0
 104 max_loads_any_thread=0
 105 mem=system.cpu.dcache
 106 numIQEntries=64
 107 numPhysFloatRegs=256
 108 numPhysIntRegs=256
 109 numROBEntries=192
 110 numRobs=1
 111 numThreads=1
 112 predType=tournament
 113 renameToDecodeDelay=1
 114 renameToFetchDelay=1
 115 renameToIEWDelay=2
 116 renameToROBDelay=1
 117 renameWidth=8
 118 squashWidth=8
 119 system=system
 120 trapLatency=13
 121 wbDepth=1
 122 wbWidth=8
 123 workload=system.cpu.workload
 124 dcache_port=system.cpu.dcache.cpu_side
 125 icache_port=system.cpu.icache.cpu_side
 126
 127 [system.cpu.dcache]
 128 type=BaseCache
 129 adaptive_compression=false
 130 assoc=2
 131 block_size=64
 132 compressed_bus=false
 133 compression_latency=0
 134 do_copy=false
 135 hash_delay=1
 136 hit_latency=1
 137 latency=1
 138 lifo=false
 139 max_miss_count=0
 140 mshrs=10
 141 prefetch_access=false
 142 prefetch_cache_check_push=true
 143 prefetch_data_accesses_only=false
 144 prefetch_degree=1
 145 prefetch_latency=10
 146 prefetch_miss=false
 147 prefetch_past_page=false
 148 prefetch_policy=none
 149 prefetch_serial_squash=false
 150 prefetch_use_cpu_id=true
 151 prefetcher_size=100
 152 prioritizeRequests=false
 153 protocol=Null
 154 repl=Null
 155 size=262144
 156 split=false
 157 split_size=0
 158 store_compressed=false
 159 subblock_size=0
 160 tgts_per_mshr=5
 161 trace_addr=0
 162 two_queue=false
 163 write_buffers=8
 164 cpu_side=system.cpu.dcache_port
 165 mem_side=system.cpu.toL2Bus.port[1]
 166
 167 [system.cpu.fuPool]
 168 type=FUPool
 169 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7
 170 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7
 171
 172 [system.cpu.fuPool.FUList0]
 173 type=FUDesc
 174 children=opList0
 175 count=6
 176 opList=system.cpu.fuPool.FUList0.opList0
 177
 178 [system.cpu.fuPool.FUList0.opList0]
 179 type=OpDesc
 180 issueLat=1
 181 opClass=IntAlu
 182 opLat=1
 183
 184 [system.cpu.fuPool.FUList1]
 185 type=FUDesc
 186 children=opList0 opList1
 187 count=2
 188 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
 189
 190 [system.cpu.fuPool.FUList1.opList0]
 191 type=OpDesc
 192 issueLat=1
 193 opClass=IntMult
 194 opLat=3
 195
 196 [system.cpu.fuPool.FUList1.opList1]
 197 type=OpDesc
 198 issueLat=19
 199 opClass=IntDiv
 200 opLat=20
 201
 202 [system.cpu.fuPool.FUList2]
 203 type=FUDesc
 204 children=opList0 opList1 opList2
 205 count=4
 206 opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
 207
 208 [system.cpu.fuPool.FUList2.opList0]
 209 type=OpDesc
 210 issueLat=1
 211 opClass=FloatAdd
 212 opLat=2
 213
 214 [system.cpu.fuPool.FUList2.opList1]
 215 type=OpDesc
 216 issueLat=1
 217 opClass=FloatCmp
 218 opLat=2
 219
 220 [system.cpu.fuPool.FUList2.opList2]
 221 type=OpDesc
 222 issueLat=1
 223 opClass=FloatCvt
 224 opLat=2
 225
 226 [system.cpu.fuPool.FUList3]
 227 type=FUDesc
 228 children=opList0 opList1 opList2
 229 count=2
 230 opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
 231
 232 [system.cpu.fuPool.FUList3.opList0]
 233 type=OpDesc
 234 issueLat=1
 235 opClass=FloatMult
 236 opLat=4
 237
 238 [system.cpu.fuPool.FUList3.opList1]
 239 type=OpDesc
 240 issueLat=12
 241 opClass=FloatDiv
 242 opLat=12
 243
 244 [system.cpu.fuPool.FUList3.opList2]
 245 type=OpDesc
 246 issueLat=24
 247 opClass=FloatSqrt
 248 opLat=24
 249
 250 [system.cpu.fuPool.FUList4]
 251 type=FUDesc
 252 children=opList0
 253 count=0
 254 opList=system.cpu.fuPool.FUList4.opList0
 255
 256 [system.cpu.fuPool.FUList4.opList0]
 257 type=OpDesc
 258 issueLat=1
 259 opClass=MemRead
 260 opLat=1
 261
 262 [system.cpu.fuPool.FUList5]
 263 type=FUDesc
 264 children=opList0
 265 count=0
 266 opList=system.cpu.fuPool.FUList5.opList0
 267
 268 [system.cpu.fuPool.FUList5.opList0]
 269 type=OpDesc
 270 issueLat=1
 271 opClass=MemWrite
 272 opLat=1
 273
 274 [system.cpu.fuPool.FUList6]
 275 type=FUDesc
 276 children=opList0 opList1
 277 count=4
 278 opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1
 279
 280 [system.cpu.fuPool.FUList6.opList0]
 281 type=OpDesc
 282 issueLat=1
 283 opClass=MemRead
 284 opLat=1
 285
 286 [system.cpu.fuPool.FUList6.opList1]
 287 type=OpDesc
 288 issueLat=1
 289 opClass=MemWrite
 290 opLat=1
 291
 292 [system.cpu.fuPool.FUList7]
 293 type=FUDesc
 294 children=opList0
 295 count=1
 296 opList=system.cpu.fuPool.FUList7.opList0
 297
 298 [system.cpu.fuPool.FUList7.opList0]
 299 type=OpDesc
 300 issueLat=3
 301 opClass=IprAccess
 302 opLat=3
 303
 304 [system.cpu.icache]
 305 type=BaseCache
 306 adaptive_compression=false
 307 assoc=2
 308 block_size=64
 309 compressed_bus=false
 310 compression_latency=0
 311 do_copy=false
 312 hash_delay=1
 313 hit_latency=1
 314 latency=1
 315 lifo=false
 316 max_miss_count=0
 317 mshrs=10
 318 prefetch_access=false
 319 prefetch_cache_check_push=true
 320 prefetch_data_accesses_only=false
 321 prefetch_degree=1
 322 prefetch_latency=10
 323 prefetch_miss=false
 324 prefetch_past_page=false
 325 prefetch_policy=none
 326 prefetch_serial_squash=false
 327 prefetch_use_cpu_id=true
 328 prefetcher_size=100
 329 prioritizeRequests=false
 330 protocol=Null
 331 repl=Null
 332 size=131072
 333 split=false
 334 split_size=0
 335 store_compressed=false
 336 subblock_size=0
 337 tgts_per_mshr=5
 338 trace_addr=0
 339 two_queue=false
 340 write_buffers=8
 341 cpu_side=system.cpu.icache_port
 342 mem_side=system.cpu.toL2Bus.port[0]
 343
 344 [system.cpu.l2cache]
 345 type=BaseCache
 346 adaptive_compression=false
 347 assoc=2
 348 block_size=64
 349 compressed_bus=false
 350 compression_latency=0
 351 do_copy=false
 352 hash_delay=1
 353 hit_latency=1
 354 latency=1
 355 lifo=false
 356 max_miss_count=0
 357 mshrs=10
 358 prefetch_access=false
 359 prefetch_cache_check_push=true
 360 prefetch_data_accesses_only=false
 361 prefetch_degree=1
 362 prefetch_latency=10
 363 prefetch_miss=false
 364 prefetch_past_page=false
 365 prefetch_policy=none
 366 prefetch_serial_squash=false
 367 prefetch_use_cpu_id=true
 368 prefetcher_size=100
 369 prioritizeRequests=false
 370 protocol=Null
 371 repl=Null
 372 size=2097152
 373 split=false
 374 split_size=0
 375 store_compressed=false
 376 subblock_size=0
 377 tgts_per_mshr=5
 378 trace_addr=0
 379 two_queue=false
 380 write_buffers=8
 381 cpu_side=system.cpu.toL2Bus.port[2]
 382 mem_side=system.membus.port[1]
 383
 384 [system.cpu.toL2Bus]
 385 type=Bus
 386 bus_id=0
 387 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 388
 389 [system.cpu.workload]
 390 type=LiveProcess
 391 cmd=hello
 392 env=
 393 executable=tests/test-progs/hello/bin/alpha/linux/hello
 394 input=cin
 395 output=cout
 396 system=system
 397
 398 [system.membus]
 399 type=Bus
 400 bus_id=0
 401 port=system.physmem.port system.cpu.l2cache.mem_side
 402
 403 [system.physmem]
 404 type=PhysicalMemory
 405 file=
 406 latency=1
 407 range=0:134217727
 408 port=system.membus.port[0]
 409
 410 [trace]
 411 bufsize=0
 412 dump_on_exit=false
 413 file=cout
 414 flags=
 415 ignore=
 416 start=0
 417