tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 checkpoint=
   5 clock=1000000000000
   6 max_tick=0
   7 output_file=cout
   8 progress_interval=0
   9
  10 [exetrace]
  11 intel_format=false
  12 legion_lockstep=false
  13 pc_symbol=true
  14 print_cpseq=false
  15 print_cycle=true
  16 print_data=true
  17 print_effaddr=true
  18 print_fetchseq=false
  19 print_iregs=false
  20 print_opclass=true
  21 print_thread=true
  22 speculative=true
  23 trace_system=client
  24
  25 [serialize]
  26 count=10
  27 cycle=0
  28 dir=cpt.%012d
  29 period=0
  30
  31 [stats]
  32 descriptions=true
  33 dump_cycle=0
  34 dump_period=0
  35 dump_reset=false
  36 ignore_events=
  37 mysql_db=
  38 mysql_host=
  39 mysql_password=
  40 mysql_user=
  41 project_name=test
  42 simulation_name=test
  43 simulation_sample=0
  44 text_compat=true
  45 text_file=m5stats.txt
  46
  47 [system]
  48 type=System
  49 children=cpu membus physmem
  50 mem_mode=atomic
  51 physmem=system.physmem
  52
  53 [system.cpu]
  54 type=DerivO3CPU
  55 children=dcache fuPool icache l2cache toL2Bus workload
  56 BTBEntries=4096
  57 BTBTagSize=16
  58 LFSTSize=1024
  59 LQEntries=32
  60 RASSize=16
  61 SQEntries=32
  62 SSITSize=1024
  63 activity=0
  64 backComSize=5
  65 choiceCtrBits=2
  66 choicePredictorSize=8192
  67 clock=1
  68 commitToDecodeDelay=1
  69 commitToFetchDelay=1
  70 commitToIEWDelay=1
  71 commitToRenameDelay=1
  72 commitWidth=8
  73 decodeToFetchDelay=1
  74 decodeToRenameDelay=1
  75 decodeWidth=8
  76 defer_registration=false
  77 dispatchWidth=8
  78 fetchToDecodeDelay=1
  79 fetchTrapLatency=1
  80 fetchWidth=8
  81 forwardComSize=5
  82 fuPool=system.cpu.fuPool
  83 function_trace=false
  84 function_trace_start=0
  85 globalCtrBits=2
  86 globalHistoryBits=13
  87 globalPredictorSize=8192
  88 iewToCommitDelay=1
  89 iewToDecodeDelay=1
  90 iewToFetchDelay=1
  91 iewToRenameDelay=1
  92 instShiftAmt=2
  93 issueToExecuteDelay=1
  94 issueWidth=8
  95 localCtrBits=2
  96 localHistoryBits=11
  97 localHistoryTableSize=2048
  98 localPredictorSize=2048
  99 max_insts_all_threads=0
 100 max_insts_any_thread=0
 101 max_loads_all_threads=0
 102 max_loads_any_thread=0
 103 numIQEntries=64
 104 numPhysFloatRegs=256
 105 numPhysIntRegs=256
 106 numROBEntries=192
 107 numRobs=1
 108 numThreads=1
 109 phase=0
 110 predType=tournament
 111 progress_interval=0
 112 renameToDecodeDelay=1
 113 renameToFetchDelay=1
 114 renameToIEWDelay=2
 115 renameToROBDelay=1
 116 renameWidth=8
 117 squashWidth=8
 118 system=system
 119 trapLatency=13
 120 wbDepth=1
 121 wbWidth=8
 122 workload=system.cpu.workload
 123 dcache_port=system.cpu.dcache.cpu_side
 124 icache_port=system.cpu.icache.cpu_side
 125
 126 [system.cpu.dcache]
 127 type=BaseCache
 128 adaptive_compression=false
 129 assoc=2
 130 block_size=64
 131 compressed_bus=false
 132 compression_latency=0
 133 hash_delay=1
 134 hit_latency=1
 135 latency=1
 136 lifo=false
 137 max_miss_count=0
 138 mshrs=10
 139 prefetch_access=false
 140 prefetch_cache_check_push=true
 141 prefetch_data_accesses_only=false
 142 prefetch_degree=1
 143 prefetch_latency=10
 144 prefetch_miss=false
 145 prefetch_past_page=false
 146 prefetch_policy=none
 147 prefetch_serial_squash=false
 148 prefetch_use_cpu_id=true
 149 prefetcher_size=100
 150 prioritizeRequests=false
 151 protocol=Null
 152 repl=Null
 153 size=262144
 154 split=false
 155 split_size=0
 156 store_compressed=false
 157 subblock_size=0
 158 tgts_per_mshr=5
 159 trace_addr=0
 160 two_queue=false
 161 write_buffers=8
 162 cpu_side=system.cpu.dcache_port
 163 mem_side=system.cpu.toL2Bus.port[1]
 164
 165 [system.cpu.fuPool]
 166 type=FUPool
 167 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7
 168 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7
 169
 170 [system.cpu.fuPool.FUList0]
 171 type=FUDesc
 172 children=opList0
 173 count=6
 174 opList=system.cpu.fuPool.FUList0.opList0
 175
 176 [system.cpu.fuPool.FUList0.opList0]
 177 type=OpDesc
 178 issueLat=1
 179 opClass=IntAlu
 180 opLat=1
 181
 182 [system.cpu.fuPool.FUList1]
 183 type=FUDesc
 184 children=opList0 opList1
 185 count=2
 186 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
 187
 188 [system.cpu.fuPool.FUList1.opList0]
 189 type=OpDesc
 190 issueLat=1
 191 opClass=IntMult
 192 opLat=3
 193
 194 [system.cpu.fuPool.FUList1.opList1]
 195 type=OpDesc
 196 issueLat=19
 197 opClass=IntDiv
 198 opLat=20
 199
 200 [system.cpu.fuPool.FUList2]
 201 type=FUDesc
 202 children=opList0 opList1 opList2
 203 count=4
 204 opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
 205
 206 [system.cpu.fuPool.FUList2.opList0]
 207 type=OpDesc
 208 issueLat=1
 209 opClass=FloatAdd
 210 opLat=2
 211
 212 [system.cpu.fuPool.FUList2.opList1]
 213 type=OpDesc
 214 issueLat=1
 215 opClass=FloatCmp
 216 opLat=2
 217
 218 [system.cpu.fuPool.FUList2.opList2]
 219 type=OpDesc
 220 issueLat=1
 221 opClass=FloatCvt
 222 opLat=2
 223
 224 [system.cpu.fuPool.FUList3]
 225 type=FUDesc
 226 children=opList0 opList1 opList2
 227 count=2
 228 opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
 229
 230 [system.cpu.fuPool.FUList3.opList0]
 231 type=OpDesc
 232 issueLat=1
 233 opClass=FloatMult
 234 opLat=4
 235
 236 [system.cpu.fuPool.FUList3.opList1]
 237 type=OpDesc
 238 issueLat=12
 239 opClass=FloatDiv
 240 opLat=12
 241
 242 [system.cpu.fuPool.FUList3.opList2]
 243 type=OpDesc
 244 issueLat=24
 245 opClass=FloatSqrt
 246 opLat=24
 247
 248 [system.cpu.fuPool.FUList4]
 249 type=FUDesc
 250 children=opList0
 251 count=0
 252 opList=system.cpu.fuPool.FUList4.opList0
 253
 254 [system.cpu.fuPool.FUList4.opList0]
 255 type=OpDesc
 256 issueLat=1
 257 opClass=MemRead
 258 opLat=1
 259
 260 [system.cpu.fuPool.FUList5]
 261 type=FUDesc
 262 children=opList0
 263 count=0
 264 opList=system.cpu.fuPool.FUList5.opList0
 265
 266 [system.cpu.fuPool.FUList5.opList0]
 267 type=OpDesc
 268 issueLat=1
 269 opClass=MemWrite
 270 opLat=1
 271
 272 [system.cpu.fuPool.FUList6]
 273 type=FUDesc
 274 children=opList0 opList1
 275 count=4
 276 opList=system.cpu.fuPool.FUList6.opList0 system.cpu.fuPool.FUList6.opList1
 277
 278 [system.cpu.fuPool.FUList6.opList0]
 279 type=OpDesc
 280 issueLat=1
 281 opClass=MemRead
 282 opLat=1
 283
 284 [system.cpu.fuPool.FUList6.opList1]
 285 type=OpDesc
 286 issueLat=1
 287 opClass=MemWrite
 288 opLat=1
 289
 290 [system.cpu.fuPool.FUList7]
 291 type=FUDesc
 292 children=opList0
 293 count=1
 294 opList=system.cpu.fuPool.FUList7.opList0
 295
 296 [system.cpu.fuPool.FUList7.opList0]
 297 type=OpDesc
 298 issueLat=3
 299 opClass=IprAccess
 300 opLat=3
 301
 302 [system.cpu.icache]
 303 type=BaseCache
 304 adaptive_compression=false
 305 assoc=2
 306 block_size=64
 307 compressed_bus=false
 308 compression_latency=0
 309 hash_delay=1
 310 hit_latency=1
 311 latency=1
 312 lifo=false
 313 max_miss_count=0
 314 mshrs=10
 315 prefetch_access=false
 316 prefetch_cache_check_push=true
 317 prefetch_data_accesses_only=false
 318 prefetch_degree=1
 319 prefetch_latency=10
 320 prefetch_miss=false
 321 prefetch_past_page=false
 322 prefetch_policy=none
 323 prefetch_serial_squash=false
 324 prefetch_use_cpu_id=true
 325 prefetcher_size=100
 326 prioritizeRequests=false
 327 protocol=Null
 328 repl=Null
 329 size=131072
 330 split=false
 331 split_size=0
 332 store_compressed=false
 333 subblock_size=0
 334 tgts_per_mshr=5
 335 trace_addr=0
 336 two_queue=false
 337 write_buffers=8
 338 cpu_side=system.cpu.icache_port
 339 mem_side=system.cpu.toL2Bus.port[0]
 340
 341 [system.cpu.l2cache]
 342 type=BaseCache
 343 adaptive_compression=false
 344 assoc=2
 345 block_size=64
 346 compressed_bus=false
 347 compression_latency=0
 348 hash_delay=1
 349 hit_latency=1
 350 latency=1
 351 lifo=false
 352 max_miss_count=0
 353 mshrs=10
 354 prefetch_access=false
 355 prefetch_cache_check_push=true
 356 prefetch_data_accesses_only=false
 357 prefetch_degree=1
 358 prefetch_latency=10
 359 prefetch_miss=false
 360 prefetch_past_page=false
 361 prefetch_policy=none
 362 prefetch_serial_squash=false
 363 prefetch_use_cpu_id=true
 364 prefetcher_size=100
 365 prioritizeRequests=false
 366 protocol=Null
 367 repl=Null
 368 size=2097152
 369 split=false
 370 split_size=0
 371 store_compressed=false
 372 subblock_size=0
 373 tgts_per_mshr=5
 374 trace_addr=0
 375 two_queue=false
 376 write_buffers=8
 377 cpu_side=system.cpu.toL2Bus.port[2]
 378 mem_side=system.membus.port[1]
 379
 380 [system.cpu.toL2Bus]
 381 type=Bus
 382 bus_id=0
 383 clock=1000
 384 responder_set=false
 385 width=64
 386 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 387
 388 [system.cpu.workload]
 389 type=LiveProcess
 390 cmd=gzip input.log 1
 391 cwd=build/ALPHA_SE/tests/fast/long/00.gzip/alpha/linux/o3-timing
 392 egid=100
 393 env=
 394 euid=100
 395 executable=/dist/m5/cpu2000/binaries/alpha/tru64/gzip
 396 gid=100
 397 input=cin
 398 output=cout
 399 pid=100
 400 ppid=99
 401 system=system
 402 uid=100
 403
 404 [system.membus]
 405 type=Bus
 406 bus_id=0
 407 clock=1000
 408 responder_set=false
 409 width=64
 410 port=system.physmem.port system.cpu.l2cache.mem_side
 411
 412 [system.physmem]
 413 type=PhysicalMemory
 414 file=
 415 latency=1
 416 range=0:134217727
 417 zero=false
 418 port=system.membus.port[0]
 419