ARM: Update stats for previous changes.
[gem5.git] / tests / long / 00.gzip / ref / arm / linux / simple-atomic / config.ini
1 [root]
2 type=Root
3 children=system
4 time_sync_enable=false
5 time_sync_period=100000000000
6 time_sync_spin_threshold=100000000
7
8 [system]
9 type=System
10 children=cpu membus physmem
11 mem_mode=atomic
12 physmem=system.physmem
13 work_begin_ckpt_count=0
14 work_begin_cpu_id_exit=-1
15 work_begin_exit_count=0
16 work_cpus_ckpt_count=0
17 work_end_ckpt_count=0
18 work_end_exit_count=0
19 work_item_id=-1
20
21 [system.cpu]
22 type=AtomicSimpleCPU
23 children=dtb itb tracer workload
24 checker=Null
25 clock=500
26 cpu_id=0
27 defer_registration=false
28 do_checkpoint_insts=true
29 do_statistics_insts=true
30 dtb=system.cpu.dtb
31 function_trace=false
32 function_trace_start=0
33 itb=system.cpu.itb
34 max_insts_all_threads=0
35 max_insts_any_thread=0
36 max_loads_all_threads=0
37 max_loads_any_thread=0
38 numThreads=1
39 phase=0
40 progress_interval=0
41 simulate_data_stalls=false
42 simulate_inst_stalls=false
43 system=system
44 tracer=system.cpu.tracer
45 width=1
46 workload=system.cpu.workload
47 dcache_port=system.membus.port[2]
48 icache_port=system.membus.port[1]
49
50 [system.cpu.dtb]
51 type=ArmTLB
52 size=64
53
54 [system.cpu.itb]
55 type=ArmTLB
56 size=64
57
58 [system.cpu.tracer]
59 type=ExeTracer
60
61 [system.cpu.workload]
62 type=LiveProcess
63 cmd=gzip input.log 1
64 cwd=build/ARM_SE/tests/opt/long/00.gzip/arm/linux/simple-atomic
65 egid=100
66 env=
67 errout=cerr
68 euid=100
69 executable=/chips/pd/randd/dist/cpu2000/binaries/arm/linux/gzip
70 gid=100
71 input=cin
72 max_stack_size=67108864
73 output=cout
74 pid=100
75 ppid=99
76 simpoint=0
77 system=system
78 uid=100
79
80 [system.membus]
81 type=Bus
82 block_size=64
83 bus_id=0
84 clock=1000
85 header_cycles=1
86 use_default_range=false
87 width=64
88 port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
89
90 [system.physmem]
91 type=PhysicalMemory
92 file=
93 latency=30000
94 latency_var=0
95 null=false
96 range=0:134217727
97 zero=false
98 port=system.membus.port[0]
99