5 time_sync_period=100000000000
6 time_sync_spin_threshold=100000000
10 children=cpu membus physmem
12 physmem=system.physmem
16 children=dcache dtb icache itb l2cache toL2Bus tracer workload
20 defer_registration=false
21 do_checkpoint_insts=true
22 do_statistics_insts=true
25 function_trace_start=0
27 max_insts_all_threads=0
28 max_insts_any_thread=0
29 max_loads_all_threads=0
30 max_loads_any_thread=0
35 tracer=system.cpu.tracer
36 workload=system.cpu.workload
37 dcache_port=system.cpu.dcache.cpu_side
38 icache_port=system.cpu.icache.cpu_side
42 addr_range=0:18446744073709551615
51 prefetch_data_accesses_only=false
53 prefetch_latency=10000
54 prefetch_on_access=false
55 prefetch_past_page=false
57 prefetch_serial_squash=false
58 prefetch_use_cpu_id=true
60 prioritizeRequests=false
68 cpu_side=system.cpu.dcache_port
69 mem_side=system.cpu.toL2Bus.port[1]
77 addr_range=0:18446744073709551615
86 prefetch_data_accesses_only=false
88 prefetch_latency=10000
89 prefetch_on_access=false
90 prefetch_past_page=false
92 prefetch_serial_squash=false
93 prefetch_use_cpu_id=true
95 prioritizeRequests=false
103 cpu_side=system.cpu.icache_port
104 mem_side=system.cpu.toL2Bus.port[0]
112 addr_range=0:18446744073709551615
121 prefetch_data_accesses_only=false
123 prefetch_latency=100000
124 prefetch_on_access=false
125 prefetch_past_page=false
127 prefetch_serial_squash=false
128 prefetch_use_cpu_id=true
130 prioritizeRequests=false
138 cpu_side=system.cpu.toL2Bus.port[2]
139 mem_side=system.membus.port[1]
147 use_default_range=false
149 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
154 [system.cpu.workload]
157 cwd=build/X86_SE/tests/opt/long/00.gzip/x86/linux/simple-timing
162 executable=/dist/m5/cpu2000/binaries/x86/linux/gzip
165 max_stack_size=67108864
179 use_default_range=false
181 port=system.physmem.port[0] system.cpu.l2cache.mem_side
191 port=system.membus.port[0]