20e3fa665f61b9b3557aac688feba54806100dec
8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain
14 boot_cpu_frequency=500
15 boot_osflags=root=/dev/hda1 console=ttyS0
17 clk_domain=system.clk_domain
18 console=/scratch/nilay/GEM5/system/binaries/console
21 kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
22 kernel_addr_check=true
23 load_addr_mask=1099511627775
26 mem_ranges=0:134217727
27 memories=system.physmem
29 pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
30 readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
34 work_begin_ckpt_count=0
35 work_begin_cpu_id_exit=-1
36 work_begin_exit_count=0
37 work_cpus_ckpt_count=0
41 system_port=system.membus.slave[0]
45 clk_domain=system.clk_domain
48 ranges=8796093022208:18446744073709551615
51 master=system.iobus.slave[0]
52 slave=system.membus.master[0]
60 voltage_domain=system.voltage_domain
64 children=branchPred dcache dtb executeFuncUnits icache interrupts isa itb l2cache toL2Bus tracer
65 branchPred=system.cpu.branchPred
67 clk_domain=system.cpu_clk_domain
70 decodeInputBufferSize=3
72 decodeToExecuteForwardDelay=1
73 do_checkpoint_insts=true
75 do_statistics_insts=true
79 executeAllowEarlyMemoryIssue=true
82 executeCycleInput=true
83 executeFuncUnits=system.cpu.executeFuncUnits
84 executeInputBufferSize=7
87 executeLSQMaxStoreBufferStoresPerCycle=2
88 executeLSQRequestsQueueSize=1
89 executeLSQStoreBufferSize=5
90 executeLSQTransfersQueueSize=2
91 executeMaxAccessesInMemory=2
92 executeMemoryCommitLimit=1
93 executeMemoryIssueLimit=1
95 executeSetTraceTimeOnCommit=true
96 executeSetTraceTimeOnIssue=false
100 fetch1ToFetch2BackwardDelay=1
101 fetch1ToFetch2ForwardDelay=1
102 fetch2CycleInput=true
103 fetch2InputBufferSize=2
104 fetch2ToDecodeForwardDelay=1
106 function_trace_start=0
107 interrupts=system.cpu.interrupts
110 max_insts_all_threads=0
111 max_insts_any_thread=0
112 max_loads_all_threads=0
113 max_loads_any_thread=0
117 simpoint_start_insts=
121 tracer=system.cpu.tracer
123 dcache_port=system.cpu.dcache.cpu_side
124 icache_port=system.cpu.icache.cpu_side
126 [system.cpu.branchPred]
132 choicePredictorSize=8192
135 globalPredictorSize=8192
138 localHistoryTableSize=2048
139 localPredictorSize=2048
146 addr_ranges=0:18446744073709551615
148 clk_domain=system.cpu_clk_domain
155 prefetch_on_access=false
158 sequential_access=false
161 tags=system.cpu.dcache.tags
165 cpu_side=system.cpu.dcache_port
166 mem_side=system.cpu.toL2Bus.slave[1]
168 [system.cpu.dcache.tags]
172 clk_domain=system.cpu_clk_domain
175 sequential_access=false
183 [system.cpu.executeFuncUnits]
185 children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
187 funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
189 [system.cpu.executeFuncUnits.funcUnits0]
191 children=opClasses timings
192 cantForwardFromFUIndices=
195 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
197 timings=system.cpu.executeFuncUnits.funcUnits0.timings
199 [system.cpu.executeFuncUnits.funcUnits0.opClasses]
203 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
205 [system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
210 [system.cpu.executeFuncUnits.funcUnits0.timings]
217 extraCommitLatExpr=Null
220 opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
221 srcRegsRelativeLats=2
224 [system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
229 [system.cpu.executeFuncUnits.funcUnits1]
231 children=opClasses timings
232 cantForwardFromFUIndices=
235 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
237 timings=system.cpu.executeFuncUnits.funcUnits1.timings
239 [system.cpu.executeFuncUnits.funcUnits1.opClasses]
243 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
245 [system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
250 [system.cpu.executeFuncUnits.funcUnits1.timings]
257 extraCommitLatExpr=Null
260 opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
261 srcRegsRelativeLats=2
264 [system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
269 [system.cpu.executeFuncUnits.funcUnits2]
271 children=opClasses timings
272 cantForwardFromFUIndices=
275 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
277 timings=system.cpu.executeFuncUnits.funcUnits2.timings
279 [system.cpu.executeFuncUnits.funcUnits2.opClasses]
283 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
285 [system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
290 [system.cpu.executeFuncUnits.funcUnits2.timings]
297 extraCommitLatExpr=Null
300 opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
301 srcRegsRelativeLats=0
304 [system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
309 [system.cpu.executeFuncUnits.funcUnits3]
312 cantForwardFromFUIndices=
315 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
319 [system.cpu.executeFuncUnits.funcUnits3.opClasses]
323 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
325 [system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
330 [system.cpu.executeFuncUnits.funcUnits4]
332 children=opClasses timings
333 cantForwardFromFUIndices=
336 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
338 timings=system.cpu.executeFuncUnits.funcUnits4.timings
340 [system.cpu.executeFuncUnits.funcUnits4.opClasses]
342 children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
344 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25
346 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
351 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
356 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
361 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
366 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
371 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
376 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
381 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
386 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
391 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
396 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
401 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
406 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
411 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
416 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
421 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
426 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
431 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
436 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
441 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
446 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
451 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
456 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
459 opClass=SimdFloatMisc
461 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
464 opClass=SimdFloatMult
466 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
469 opClass=SimdFloatMultAcc
471 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
474 opClass=SimdFloatSqrt
476 [system.cpu.executeFuncUnits.funcUnits4.timings]
479 description=FloatSimd
483 extraCommitLatExpr=Null
486 opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
487 srcRegsRelativeLats=2
490 [system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
495 [system.cpu.executeFuncUnits.funcUnits5]
497 children=opClasses timings
498 cantForwardFromFUIndices=
501 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
503 timings=system.cpu.executeFuncUnits.funcUnits5.timings
505 [system.cpu.executeFuncUnits.funcUnits5.opClasses]
507 children=opClasses0 opClasses1
509 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1
511 [system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
516 [system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
521 [system.cpu.executeFuncUnits.funcUnits5.timings]
528 extraCommitLatExpr=Null
531 opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
532 srcRegsRelativeLats=1
535 [system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
540 [system.cpu.executeFuncUnits.funcUnits6]
543 cantForwardFromFUIndices=
546 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
550 [system.cpu.executeFuncUnits.funcUnits6.opClasses]
552 children=opClasses0 opClasses1
554 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
556 [system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
561 [system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
569 addr_ranges=0:18446744073709551615
571 clk_domain=system.cpu_clk_domain
578 prefetch_on_access=false
581 sequential_access=false
584 tags=system.cpu.icache.tags
588 cpu_side=system.cpu.icache_port
589 mem_side=system.cpu.toL2Bus.slave[0]
591 [system.cpu.icache.tags]
595 clk_domain=system.cpu_clk_domain
598 sequential_access=false
601 [system.cpu.interrupts]
618 addr_ranges=0:18446744073709551615
620 clk_domain=system.cpu_clk_domain
627 prefetch_on_access=false
630 sequential_access=false
633 tags=system.cpu.l2cache.tags
637 cpu_side=system.cpu.toL2Bus.master[0]
638 mem_side=system.membus.slave[1]
640 [system.cpu.l2cache.tags]
644 clk_domain=system.cpu_clk_domain
647 sequential_access=false
652 clk_domain=system.cpu_clk_domain
657 use_default_range=false
659 master=system.cpu.l2cache.cpu_side
660 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
666 [system.cpu_clk_domain]
672 voltage_domain=system.voltage_domain
680 image=system.disk0.image
685 child=system.disk0.image.child
691 [system.disk0.image.child]
694 image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
703 image=system.disk2.image
708 child=system.disk2.image.child
714 [system.disk2.image.child]
717 image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
720 [system.dvfs_handler]
725 sys_clk_domain=system.clk_domain
726 transition_latency=100000000
735 clk_domain=system.clk_domain
738 use_default_range=true
740 default=system.tsunami.pciconfig.pio
741 master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
742 slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
747 addr_ranges=0:134217727
749 clk_domain=system.clk_domain
756 prefetch_on_access=false
759 sequential_access=false
762 tags=system.iocache.tags
766 cpu_side=system.iobus.master[29]
767 mem_side=system.membus.slave[2]
769 [system.iocache.tags]
773 clk_domain=system.clk_domain
776 sequential_access=false
781 children=badaddr_responder
782 clk_domain=system.clk_domain
787 use_default_range=false
789 default=system.membus.badaddr_responder.pio
790 master=system.bridge.slave system.physmem.port
791 slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
793 [system.membus.badaddr_responder]
795 clk_domain=system.clk_domain
803 ret_data32=4294967295
804 ret_data64=18446744073709551615
809 pio=system.membus.default
838 addr_mapping=RoRaBaChCo
839 bank_groups_per_rank=0
843 clk_domain=system.clk_domain
844 conf_table_reported=true
846 device_rowbuffer_size=1024
851 max_accesses_per_row=16
852 mem_sched_policy=frfcfs
853 min_writes_per_switch=16
855 page_policy=open_adaptive
859 static_backend_latency=10000
860 static_frontend_latency=10000
883 write_high_thresh_perc=85
884 write_low_thresh_perc=50
885 port=system.membus.master[1]
890 disk=system.simple_disk.disk
894 [system.simple_disk.disk]
897 image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
903 intr_control=system.intrctrl
910 children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
912 intrctrl=system.intrctrl
915 [system.tsunami.backdoor]
917 clk_domain=system.clk_domain
919 disk=system.simple_disk
921 pio_addr=8804682956800
923 platform=system.tsunami
925 terminal=system.terminal
926 pio=system.iobus.master[24]
928 [system.tsunami.cchip]
930 clk_domain=system.clk_domain
932 pio_addr=8803072344064
935 tsunami=system.tsunami
936 pio=system.iobus.master[0]
938 [system.tsunami.ethernet]
978 MSICAPNextCapability=0
982 MSIXCAPNextCapability=0
992 PMCAPNextCapability=0
997 PXCAPDevCapabilities=0
1004 PXCAPNextCapability=0
1012 clk_domain=system.clk_domain
1013 config_latency=20000
1016 dma_no_allocate=true
1022 hardware_address=00:90:00:00:00:01
1028 platform=system.tsunami
1038 config=system.iobus.master[28]
1039 dma=system.iobus.slave[2]
1040 pio=system.iobus.master[27]
1042 [system.tsunami.fake_OROM]
1044 clk_domain=system.clk_domain
1047 pio_addr=8796093677568
1052 ret_data32=4294967295
1053 ret_data64=18446744073709551615
1058 pio=system.iobus.master[8]
1060 [system.tsunami.fake_ata0]
1062 clk_domain=system.clk_domain
1065 pio_addr=8804615848432
1070 ret_data32=4294967295
1071 ret_data64=18446744073709551615
1076 pio=system.iobus.master[19]
1078 [system.tsunami.fake_ata1]
1080 clk_domain=system.clk_domain
1083 pio_addr=8804615848304
1088 ret_data32=4294967295
1089 ret_data64=18446744073709551615
1094 pio=system.iobus.master[20]
1096 [system.tsunami.fake_pnp_addr]
1098 clk_domain=system.clk_domain
1101 pio_addr=8804615848569
1106 ret_data32=4294967295
1107 ret_data64=18446744073709551615
1112 pio=system.iobus.master[9]
1114 [system.tsunami.fake_pnp_read0]
1116 clk_domain=system.clk_domain
1119 pio_addr=8804615848451
1124 ret_data32=4294967295
1125 ret_data64=18446744073709551615
1130 pio=system.iobus.master[11]
1132 [system.tsunami.fake_pnp_read1]
1134 clk_domain=system.clk_domain
1137 pio_addr=8804615848515
1142 ret_data32=4294967295
1143 ret_data64=18446744073709551615
1148 pio=system.iobus.master[12]
1150 [system.tsunami.fake_pnp_read2]
1152 clk_domain=system.clk_domain
1155 pio_addr=8804615848579
1160 ret_data32=4294967295
1161 ret_data64=18446744073709551615
1166 pio=system.iobus.master[13]
1168 [system.tsunami.fake_pnp_read3]
1170 clk_domain=system.clk_domain
1173 pio_addr=8804615848643
1178 ret_data32=4294967295
1179 ret_data64=18446744073709551615
1184 pio=system.iobus.master[14]
1186 [system.tsunami.fake_pnp_read4]
1188 clk_domain=system.clk_domain
1191 pio_addr=8804615848707
1196 ret_data32=4294967295
1197 ret_data64=18446744073709551615
1202 pio=system.iobus.master[15]
1204 [system.tsunami.fake_pnp_read5]
1206 clk_domain=system.clk_domain
1209 pio_addr=8804615848771
1214 ret_data32=4294967295
1215 ret_data64=18446744073709551615
1220 pio=system.iobus.master[16]
1222 [system.tsunami.fake_pnp_read6]
1224 clk_domain=system.clk_domain
1227 pio_addr=8804615848835
1232 ret_data32=4294967295
1233 ret_data64=18446744073709551615
1238 pio=system.iobus.master[17]
1240 [system.tsunami.fake_pnp_read7]
1242 clk_domain=system.clk_domain
1245 pio_addr=8804615848899
1250 ret_data32=4294967295
1251 ret_data64=18446744073709551615
1256 pio=system.iobus.master[18]
1258 [system.tsunami.fake_pnp_write]
1260 clk_domain=system.clk_domain
1263 pio_addr=8804615850617
1268 ret_data32=4294967295
1269 ret_data64=18446744073709551615
1274 pio=system.iobus.master[10]
1276 [system.tsunami.fake_ppc]
1278 clk_domain=system.clk_domain
1281 pio_addr=8804615848891
1286 ret_data32=4294967295
1287 ret_data64=18446744073709551615
1292 pio=system.iobus.master[7]
1294 [system.tsunami.fake_sm_chip]
1296 clk_domain=system.clk_domain
1299 pio_addr=8804615848816
1304 ret_data32=4294967295
1305 ret_data64=18446744073709551615
1310 pio=system.iobus.master[2]
1312 [system.tsunami.fake_uart1]
1314 clk_domain=system.clk_domain
1317 pio_addr=8804615848696
1322 ret_data32=4294967295
1323 ret_data64=18446744073709551615
1328 pio=system.iobus.master[3]
1330 [system.tsunami.fake_uart2]
1332 clk_domain=system.clk_domain
1335 pio_addr=8804615848936
1340 ret_data32=4294967295
1341 ret_data64=18446744073709551615
1346 pio=system.iobus.master[4]
1348 [system.tsunami.fake_uart3]
1350 clk_domain=system.clk_domain
1353 pio_addr=8804615848680
1358 ret_data32=4294967295
1359 ret_data64=18446744073709551615
1364 pio=system.iobus.master[5]
1366 [system.tsunami.fake_uart4]
1368 clk_domain=system.clk_domain
1371 pio_addr=8804615848944
1376 ret_data32=4294967295
1377 ret_data64=18446744073709551615
1382 pio=system.iobus.master[6]
1386 clk_domain=system.clk_domain
1387 devicename=FrameBuffer
1389 pio_addr=8804615848912
1392 pio=system.iobus.master[21]
1394 [system.tsunami.ide]
1433 MSICAPMsgUpperAddr=0
1434 MSICAPNextCapability=0
1438 MSIXCAPNextCapability=0
1448 PMCAPNextCapability=0
1453 PXCAPDevCapabilities=0
1460 PXCAPNextCapability=0
1468 clk_domain=system.clk_domain
1469 config_latency=20000
1471 disks=system.disk0 system.disk2
1478 platform=system.tsunami
1480 config=system.iobus.master[26]
1481 dma=system.iobus.slave[1]
1482 pio=system.iobus.master[25]
1486 clk_domain=system.clk_domain
1489 pio_addr=8804615847936
1492 time=Thu Jan 1 00:00:00 2009
1493 tsunami=system.tsunami
1495 pio=system.iobus.master[22]
1497 [system.tsunami.pchip]
1499 clk_domain=system.clk_domain
1501 pio_addr=8802535473152
1504 tsunami=system.tsunami
1505 pio=system.iobus.master[1]
1507 [system.tsunami.pciconfig]
1510 clk_domain=system.clk_domain
1514 platform=system.tsunami
1517 pio=system.iobus.default
1519 [system.tsunami.uart]
1521 clk_domain=system.clk_domain
1523 pio_addr=8804615848952
1525 platform=system.tsunami
1527 terminal=system.terminal
1528 pio=system.iobus.master[23]
1530 [system.voltage_domain]