8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
15 boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
16 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
17 boot_release_addr=65528
19 clk_domain=system.clk_domain
21 early_kernel_symbols=false
22 enable_context_switch_stats_dump=false
25 gic_cpu_addr=520093952
26 have_generic_timer=false
27 have_large_asid_64=false
30 have_virtualization=false
31 highest_el_is_64=false
33 kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
34 kernel_addr_check=true
35 load_addr_mask=268435455
37 machine_type=RealView_PBX
39 mem_ranges=0:134217727
40 memories=system.physmem system.realview.nvmem
46 readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
49 work_begin_ckpt_count=0
50 work_begin_cpu_id_exit=-1
51 work_begin_exit_count=0
52 work_cpus_ckpt_count=0
56 system_port=system.membus.slave[0]
60 clk_domain=system.clk_domain
63 ranges=268435456:520093695 1073741824:1610612735
66 master=system.iobus.slave[0]
67 slave=system.membus.master[0]
75 image=system.cf0.image
80 child=system.cf0.image.child
86 [system.cf0.image.child]
89 image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
98 voltage_domain=system.voltage_domain
102 children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
103 branchPred=system.cpu.branchPred
105 clk_domain=system.cpu_clk_domain
107 decodeCycleInput=true
108 decodeInputBufferSize=3
110 decodeToExecuteForwardDelay=1
111 do_checkpoint_insts=true
113 do_statistics_insts=true
114 dstage2_mmu=system.cpu.dstage2_mmu
118 executeAllowEarlyMemoryIssue=true
121 executeCycleInput=true
122 executeFuncUnits=system.cpu.executeFuncUnits
123 executeInputBufferSize=7
126 executeLSQMaxStoreBufferStoresPerCycle=2
127 executeLSQRequestsQueueSize=1
128 executeLSQStoreBufferSize=5
129 executeLSQTransfersQueueSize=2
130 executeMaxAccessesInMemory=2
131 executeMemoryCommitLimit=1
132 executeMemoryIssueLimit=1
134 executeSetTraceTimeOnCommit=true
135 executeSetTraceTimeOnIssue=false
137 fetch1LineSnapWidth=0
139 fetch1ToFetch2BackwardDelay=1
140 fetch1ToFetch2ForwardDelay=1
141 fetch2CycleInput=true
142 fetch2InputBufferSize=2
143 fetch2ToDecodeForwardDelay=1
145 function_trace_start=0
146 interrupts=system.cpu.interrupts
148 istage2_mmu=system.cpu.istage2_mmu
150 max_insts_all_threads=0
151 max_insts_any_thread=0
152 max_loads_all_threads=0
153 max_loads_any_thread=0
157 simpoint_start_insts=
161 tracer=system.cpu.tracer
163 dcache_port=system.cpu.dcache.cpu_side
164 icache_port=system.cpu.icache.cpu_side
166 [system.cpu.branchPred]
172 choicePredictorSize=8192
175 globalPredictorSize=8192
178 localHistoryTableSize=2048
179 localPredictorSize=2048
186 addr_ranges=0:18446744073709551615
188 clk_domain=system.cpu_clk_domain
195 prefetch_on_access=false
198 sequential_access=false
201 tags=system.cpu.dcache.tags
205 cpu_side=system.cpu.dcache_port
206 mem_side=system.cpu.toL2Bus.slave[1]
208 [system.cpu.dcache.tags]
212 clk_domain=system.cpu_clk_domain
215 sequential_access=false
218 [system.cpu.dstage2_mmu]
222 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
225 [system.cpu.dstage2_mmu.stage2_tlb]
231 walker=system.cpu.dstage2_mmu.stage2_tlb.walker
233 [system.cpu.dstage2_mmu.stage2_tlb.walker]
235 clk_domain=system.cpu_clk_domain
238 num_squash_per_cycle=2
240 port=system.cpu.toL2Bus.slave[5]
248 walker=system.cpu.dtb.walker
250 [system.cpu.dtb.walker]
252 clk_domain=system.cpu_clk_domain
255 num_squash_per_cycle=2
257 port=system.cpu.toL2Bus.slave[3]
259 [system.cpu.executeFuncUnits]
261 children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
263 funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
265 [system.cpu.executeFuncUnits.funcUnits0]
267 children=opClasses timings
268 cantForwardFromFUIndices=
271 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
273 timings=system.cpu.executeFuncUnits.funcUnits0.timings
275 [system.cpu.executeFuncUnits.funcUnits0.opClasses]
279 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
281 [system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
286 [system.cpu.executeFuncUnits.funcUnits0.timings]
293 extraCommitLatExpr=Null
296 opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
297 srcRegsRelativeLats=2
300 [system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
305 [system.cpu.executeFuncUnits.funcUnits1]
307 children=opClasses timings
308 cantForwardFromFUIndices=
311 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
313 timings=system.cpu.executeFuncUnits.funcUnits1.timings
315 [system.cpu.executeFuncUnits.funcUnits1.opClasses]
319 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
321 [system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
326 [system.cpu.executeFuncUnits.funcUnits1.timings]
333 extraCommitLatExpr=Null
336 opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
337 srcRegsRelativeLats=2
340 [system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
345 [system.cpu.executeFuncUnits.funcUnits2]
347 children=opClasses timings
348 cantForwardFromFUIndices=
351 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
353 timings=system.cpu.executeFuncUnits.funcUnits2.timings
355 [system.cpu.executeFuncUnits.funcUnits2.opClasses]
359 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
361 [system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
366 [system.cpu.executeFuncUnits.funcUnits2.timings]
373 extraCommitLatExpr=Null
376 opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
377 srcRegsRelativeLats=0
380 [system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
385 [system.cpu.executeFuncUnits.funcUnits3]
388 cantForwardFromFUIndices=
391 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
395 [system.cpu.executeFuncUnits.funcUnits3.opClasses]
399 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
401 [system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
406 [system.cpu.executeFuncUnits.funcUnits4]
408 children=opClasses timings
409 cantForwardFromFUIndices=
412 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
414 timings=system.cpu.executeFuncUnits.funcUnits4.timings
416 [system.cpu.executeFuncUnits.funcUnits4.opClasses]
418 children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
420 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25
422 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
427 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
432 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
437 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
442 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
447 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
452 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
457 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
462 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
467 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
472 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
477 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
482 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
487 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
492 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
497 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
502 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
507 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
512 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
517 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
522 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
527 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
532 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
535 opClass=SimdFloatMisc
537 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
540 opClass=SimdFloatMult
542 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
545 opClass=SimdFloatMultAcc
547 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
550 opClass=SimdFloatSqrt
552 [system.cpu.executeFuncUnits.funcUnits4.timings]
555 description=FloatSimd
559 extraCommitLatExpr=Null
562 opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
563 srcRegsRelativeLats=2
566 [system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
571 [system.cpu.executeFuncUnits.funcUnits5]
573 children=opClasses timings
574 cantForwardFromFUIndices=
577 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
579 timings=system.cpu.executeFuncUnits.funcUnits5.timings
581 [system.cpu.executeFuncUnits.funcUnits5.opClasses]
583 children=opClasses0 opClasses1
585 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1
587 [system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
592 [system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
597 [system.cpu.executeFuncUnits.funcUnits5.timings]
604 extraCommitLatExpr=Null
607 opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
608 srcRegsRelativeLats=1
611 [system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
616 [system.cpu.executeFuncUnits.funcUnits6]
619 cantForwardFromFUIndices=
622 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
626 [system.cpu.executeFuncUnits.funcUnits6.opClasses]
628 children=opClasses0 opClasses1
630 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
632 [system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
637 [system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
645 addr_ranges=0:18446744073709551615
647 clk_domain=system.cpu_clk_domain
654 prefetch_on_access=false
657 sequential_access=false
660 tags=system.cpu.icache.tags
664 cpu_side=system.cpu.icache_port
665 mem_side=system.cpu.toL2Bus.slave[0]
667 [system.cpu.icache.tags]
671 clk_domain=system.cpu_clk_domain
674 sequential_access=false
677 [system.cpu.interrupts]
687 id_aa64dfr0_el1=1052678
691 id_aa64mmfr0_el1=15728642
710 [system.cpu.istage2_mmu]
714 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
717 [system.cpu.istage2_mmu.stage2_tlb]
723 walker=system.cpu.istage2_mmu.stage2_tlb.walker
725 [system.cpu.istage2_mmu.stage2_tlb.walker]
727 clk_domain=system.cpu_clk_domain
730 num_squash_per_cycle=2
732 port=system.cpu.toL2Bus.slave[4]
740 walker=system.cpu.itb.walker
742 [system.cpu.itb.walker]
744 clk_domain=system.cpu_clk_domain
747 num_squash_per_cycle=2
749 port=system.cpu.toL2Bus.slave[2]
754 addr_ranges=0:18446744073709551615
756 clk_domain=system.cpu_clk_domain
763 prefetch_on_access=false
766 sequential_access=false
769 tags=system.cpu.l2cache.tags
773 cpu_side=system.cpu.toL2Bus.master[0]
774 mem_side=system.membus.slave[1]
776 [system.cpu.l2cache.tags]
780 clk_domain=system.cpu_clk_domain
783 sequential_access=false
788 clk_domain=system.cpu_clk_domain
793 use_default_range=false
795 master=system.cpu.l2cache.cpu_side
796 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
802 [system.cpu_clk_domain]
808 voltage_domain=system.voltage_domain
810 [system.dvfs_handler]
815 sys_clk_domain=system.clk_domain
816 transition_latency=100000000
825 clk_domain=system.clk_domain
828 use_default_range=false
830 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
831 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
836 addr_ranges=0:134217727
838 clk_domain=system.clk_domain
845 prefetch_on_access=false
848 sequential_access=false
851 tags=system.iocache.tags
855 cpu_side=system.iobus.master[26]
856 mem_side=system.membus.slave[2]
858 [system.iocache.tags]
862 clk_domain=system.clk_domain
865 sequential_access=false
870 children=badaddr_responder
871 clk_domain=system.clk_domain
876 use_default_range=false
878 default=system.membus.badaddr_responder.pio
879 master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
880 slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
882 [system.membus.badaddr_responder]
884 clk_domain=system.clk_domain
892 ret_data32=4294967295
893 ret_data64=18446744073709551615
898 pio=system.membus.default
927 addr_mapping=RoRaBaChCo
928 bank_groups_per_rank=0
932 clk_domain=system.clk_domain
933 conf_table_reported=true
935 device_rowbuffer_size=1024
940 max_accesses_per_row=16
941 mem_sched_policy=frfcfs
942 min_writes_per_switch=16
944 page_policy=open_adaptive
948 static_backend_latency=10000
949 static_frontend_latency=10000
972 write_high_thresh_perc=85
973 write_low_thresh_perc=50
974 port=system.membus.master[6]
978 children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
980 intrctrl=system.intrctrl
982 pci_cfg_gen_offsets=false
986 [system.realview.a9scu]
988 clk_domain=system.clk_domain
993 pio=system.membus.master[4]
995 [system.realview.aaci_fake]
998 clk_domain=system.clk_domain
1004 pio=system.iobus.master[21]
1006 [system.realview.cf_ctrl]
1045 MSICAPMsgUpperAddr=0
1046 MSICAPNextCapability=0
1050 MSIXCAPNextCapability=0
1060 PMCAPNextCapability=0
1065 PXCAPDevCapabilities=0
1072 PXCAPNextCapability=0
1080 clk_domain=system.clk_domain
1081 config_latency=20000
1090 platform=system.realview
1092 config=system.iobus.master[8]
1093 dma=system.iobus.slave[2]
1094 pio=system.iobus.master[7]
1096 [system.realview.clcd]
1099 clk_domain=system.clk_domain
1102 gic=system.realview.gic
1108 vnc=system.vncserver
1109 dma=system.iobus.slave[1]
1110 pio=system.iobus.master[4]
1112 [system.realview.dmac_fake]
1115 clk_domain=system.clk_domain
1121 pio=system.iobus.master[9]
1123 [system.realview.energy_ctrl]
1125 clk_domain=system.clk_domain
1126 dvfs_handler=system.dvfs_handler
1131 pio=system.iobus.master[25]
1133 [system.realview.flash_fake]
1135 clk_domain=system.clk_domain
1143 ret_data32=4294967295
1144 ret_data64=18446744073709551615
1149 pio=system.iobus.master[24]
1151 [system.realview.gic]
1153 clk_domain=system.clk_domain
1157 dist_pio_delay=10000
1162 platform=system.realview
1164 pio=system.membus.master[2]
1166 [system.realview.gpio0_fake]
1169 clk_domain=system.clk_domain
1175 pio=system.iobus.master[16]
1177 [system.realview.gpio1_fake]
1180 clk_domain=system.clk_domain
1186 pio=system.iobus.master[17]
1188 [system.realview.gpio2_fake]
1191 clk_domain=system.clk_domain
1197 pio=system.iobus.master[18]
1199 [system.realview.kmi0]
1202 clk_domain=system.clk_domain
1204 gic=system.realview.gic
1211 vnc=system.vncserver
1212 pio=system.iobus.master[5]
1214 [system.realview.kmi1]
1217 clk_domain=system.clk_domain
1219 gic=system.realview.gic
1226 vnc=system.vncserver
1227 pio=system.iobus.master[6]
1229 [system.realview.l2x0_fake]
1231 clk_domain=system.clk_domain
1239 ret_data32=4294967295
1240 ret_data64=18446744073709551615
1245 pio=system.membus.master[3]
1247 [system.realview.local_cpu_timer]
1249 clk_domain=system.clk_domain
1251 gic=system.realview.gic
1257 pio=system.membus.master[5]
1259 [system.realview.mmc_fake]
1262 clk_domain=system.clk_domain
1268 pio=system.iobus.master[22]
1270 [system.realview.nvmem]
1273 clk_domain=system.clk_domain
1274 conf_table_reported=false
1280 range=2147483648:2214592511
1281 port=system.membus.master[1]
1283 [system.realview.realview_io]
1285 clk_domain=system.clk_domain
1293 pio=system.iobus.master[1]
1295 [system.realview.rtc]
1298 clk_domain=system.clk_domain
1300 gic=system.realview.gic
1306 time=Thu Jan 1 00:00:00 2009
1307 pio=system.iobus.master[23]
1309 [system.realview.sci_fake]
1312 clk_domain=system.clk_domain
1318 pio=system.iobus.master[20]
1320 [system.realview.smc_fake]
1323 clk_domain=system.clk_domain
1329 pio=system.iobus.master[13]
1331 [system.realview.sp810_fake]
1334 clk_domain=system.clk_domain
1340 pio=system.iobus.master[14]
1342 [system.realview.ssp_fake]
1345 clk_domain=system.clk_domain
1351 pio=system.iobus.master[19]
1353 [system.realview.timer0]
1356 clk_domain=system.clk_domain
1360 gic=system.realview.gic
1366 pio=system.iobus.master[2]
1368 [system.realview.timer1]
1371 clk_domain=system.clk_domain
1375 gic=system.realview.gic
1381 pio=system.iobus.master[3]
1383 [system.realview.uart]
1385 clk_domain=system.clk_domain
1388 gic=system.realview.gic
1393 platform=system.realview
1395 terminal=system.terminal
1396 pio=system.iobus.master[0]
1398 [system.realview.uart1_fake]
1401 clk_domain=system.clk_domain
1407 pio=system.iobus.master[10]
1409 [system.realview.uart2_fake]
1412 clk_domain=system.clk_domain
1418 pio=system.iobus.master[11]
1420 [system.realview.uart3_fake]
1423 clk_domain=system.clk_domain
1429 pio=system.iobus.master[12]
1431 [system.realview.watchdog_fake]
1434 clk_domain=system.clk_domain
1440 pio=system.iobus.master[15]
1445 intr_control=system.intrctrl
1457 [system.voltage_domain]