stats: updates due to changes to x86, stale configs.
[gem5.git] / tests / long / fs / 10.linux-boot / ref / arm / linux / realview-minor / config.ini
1 [root]
2 type=Root
3 children=system
4 eventq_index=0
5 full_system=true
6 sim_quantum=0
7 time_sync_enable=false
8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
10
11 [system]
12 type=LinuxArmSystem
13 children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
14 atags_addr=256
15 boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
16 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
17 boot_release_addr=65528
18 cache_line_size=64
19 clk_domain=system.clk_domain
20 dtb_filename=
21 early_kernel_symbols=false
22 enable_context_switch_stats_dump=false
23 eventq_index=0
24 flags_addr=268435504
25 gic_cpu_addr=520093952
26 have_generic_timer=false
27 have_large_asid_64=false
28 have_lpae=false
29 have_security=false
30 have_virtualization=false
31 highest_el_is_64=false
32 init_param=0
33 kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
34 kernel_addr_check=true
35 load_addr_mask=268435455
36 load_offset=0
37 machine_type=RealView_PBX
38 mem_mode=timing
39 mem_ranges=0:134217727
40 memories=system.physmem system.realview.nvmem
41 multi_proc=true
42 num_work_ids=16
43 panic_on_oops=true
44 panic_on_panic=true
45 phys_addr_range_64=40
46 readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
47 reset_addr_64=0
48 symbolfile=
49 work_begin_ckpt_count=0
50 work_begin_cpu_id_exit=-1
51 work_begin_exit_count=0
52 work_cpus_ckpt_count=0
53 work_end_ckpt_count=0
54 work_end_exit_count=0
55 work_item_id=-1
56 system_port=system.membus.slave[0]
57
58 [system.bridge]
59 type=Bridge
60 clk_domain=system.clk_domain
61 delay=50000
62 eventq_index=0
63 ranges=268435456:520093695 1073741824:1610612735
64 req_size=16
65 resp_size=16
66 master=system.iobus.slave[0]
67 slave=system.membus.master[0]
68
69 [system.cf0]
70 type=IdeDisk
71 children=image
72 delay=1000000
73 driveID=master
74 eventq_index=0
75 image=system.cf0.image
76
77 [system.cf0.image]
78 type=CowDiskImage
79 children=child
80 child=system.cf0.image.child
81 eventq_index=0
82 image_file=
83 read_only=false
84 table_size=65536
85
86 [system.cf0.image.child]
87 type=RawDiskImage
88 eventq_index=0
89 image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
90 read_only=true
91
92 [system.clk_domain]
93 type=SrcClockDomain
94 clock=1000
95 domain_id=-1
96 eventq_index=0
97 init_perf_level=0
98 voltage_domain=system.voltage_domain
99
100 [system.cpu]
101 type=MinorCPU
102 children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
103 branchPred=system.cpu.branchPred
104 checker=Null
105 clk_domain=system.cpu_clk_domain
106 cpu_id=0
107 decodeCycleInput=true
108 decodeInputBufferSize=3
109 decodeInputWidth=2
110 decodeToExecuteForwardDelay=1
111 do_checkpoint_insts=true
112 do_quiesce=true
113 do_statistics_insts=true
114 dstage2_mmu=system.cpu.dstage2_mmu
115 dtb=system.cpu.dtb
116 enableIdling=true
117 eventq_index=0
118 executeAllowEarlyMemoryIssue=true
119 executeBranchDelay=1
120 executeCommitLimit=2
121 executeCycleInput=true
122 executeFuncUnits=system.cpu.executeFuncUnits
123 executeInputBufferSize=7
124 executeInputWidth=2
125 executeIssueLimit=2
126 executeLSQMaxStoreBufferStoresPerCycle=2
127 executeLSQRequestsQueueSize=1
128 executeLSQStoreBufferSize=5
129 executeLSQTransfersQueueSize=2
130 executeMaxAccessesInMemory=2
131 executeMemoryCommitLimit=1
132 executeMemoryIssueLimit=1
133 executeMemoryWidth=0
134 executeSetTraceTimeOnCommit=true
135 executeSetTraceTimeOnIssue=false
136 fetch1FetchLimit=1
137 fetch1LineSnapWidth=0
138 fetch1LineWidth=0
139 fetch1ToFetch2BackwardDelay=1
140 fetch1ToFetch2ForwardDelay=1
141 fetch2CycleInput=true
142 fetch2InputBufferSize=2
143 fetch2ToDecodeForwardDelay=1
144 function_trace=false
145 function_trace_start=0
146 interrupts=system.cpu.interrupts
147 isa=system.cpu.isa
148 istage2_mmu=system.cpu.istage2_mmu
149 itb=system.cpu.itb
150 max_insts_all_threads=0
151 max_insts_any_thread=0
152 max_loads_all_threads=0
153 max_loads_any_thread=0
154 numThreads=1
155 profile=0
156 progress_interval=0
157 simpoint_start_insts=
158 socket_id=0
159 switched_out=false
160 system=system
161 tracer=system.cpu.tracer
162 workload=
163 dcache_port=system.cpu.dcache.cpu_side
164 icache_port=system.cpu.icache.cpu_side
165
166 [system.cpu.branchPred]
167 type=BranchPredictor
168 BTBEntries=4096
169 BTBTagSize=16
170 RASSize=16
171 choiceCtrBits=2
172 choicePredictorSize=8192
173 eventq_index=0
174 globalCtrBits=2
175 globalPredictorSize=8192
176 instShiftAmt=2
177 localCtrBits=2
178 localHistoryTableSize=2048
179 localPredictorSize=2048
180 numThreads=1
181 predType=tournament
182
183 [system.cpu.dcache]
184 type=BaseCache
185 children=tags
186 addr_ranges=0:18446744073709551615
187 assoc=4
188 clk_domain=system.cpu_clk_domain
189 eventq_index=0
190 forward_snoops=true
191 hit_latency=2
192 is_top_level=true
193 max_miss_count=0
194 mshrs=4
195 prefetch_on_access=false
196 prefetcher=Null
197 response_latency=2
198 sequential_access=false
199 size=32768
200 system=system
201 tags=system.cpu.dcache.tags
202 tgts_per_mshr=20
203 two_queue=false
204 write_buffers=8
205 cpu_side=system.cpu.dcache_port
206 mem_side=system.cpu.toL2Bus.slave[1]
207
208 [system.cpu.dcache.tags]
209 type=LRU
210 assoc=4
211 block_size=64
212 clk_domain=system.cpu_clk_domain
213 eventq_index=0
214 hit_latency=2
215 sequential_access=false
216 size=32768
217
218 [system.cpu.dstage2_mmu]
219 type=ArmStage2MMU
220 children=stage2_tlb
221 eventq_index=0
222 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
223 tlb=system.cpu.dtb
224
225 [system.cpu.dstage2_mmu.stage2_tlb]
226 type=ArmTLB
227 children=walker
228 eventq_index=0
229 is_stage2=true
230 size=32
231 walker=system.cpu.dstage2_mmu.stage2_tlb.walker
232
233 [system.cpu.dstage2_mmu.stage2_tlb.walker]
234 type=ArmTableWalker
235 clk_domain=system.cpu_clk_domain
236 eventq_index=0
237 is_stage2=true
238 num_squash_per_cycle=2
239 sys=system
240 port=system.cpu.toL2Bus.slave[5]
241
242 [system.cpu.dtb]
243 type=ArmTLB
244 children=walker
245 eventq_index=0
246 is_stage2=false
247 size=64
248 walker=system.cpu.dtb.walker
249
250 [system.cpu.dtb.walker]
251 type=ArmTableWalker
252 clk_domain=system.cpu_clk_domain
253 eventq_index=0
254 is_stage2=false
255 num_squash_per_cycle=2
256 sys=system
257 port=system.cpu.toL2Bus.slave[3]
258
259 [system.cpu.executeFuncUnits]
260 type=MinorFUPool
261 children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
262 eventq_index=0
263 funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
264
265 [system.cpu.executeFuncUnits.funcUnits0]
266 type=MinorFU
267 children=opClasses timings
268 cantForwardFromFUIndices=
269 eventq_index=0
270 issueLat=1
271 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
272 opLat=3
273 timings=system.cpu.executeFuncUnits.funcUnits0.timings
274
275 [system.cpu.executeFuncUnits.funcUnits0.opClasses]
276 type=MinorOpClassSet
277 children=opClasses
278 eventq_index=0
279 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
280
281 [system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
282 type=MinorOpClass
283 eventq_index=0
284 opClass=IntAlu
285
286 [system.cpu.executeFuncUnits.funcUnits0.timings]
287 type=MinorFUTiming
288 children=opClasses
289 description=Int
290 eventq_index=0
291 extraAssumedLat=0
292 extraCommitLat=0
293 extraCommitLatExpr=Null
294 mask=0
295 match=0
296 opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
297 srcRegsRelativeLats=2
298 suppress=false
299
300 [system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
301 type=MinorOpClassSet
302 eventq_index=0
303 opClasses=
304
305 [system.cpu.executeFuncUnits.funcUnits1]
306 type=MinorFU
307 children=opClasses timings
308 cantForwardFromFUIndices=
309 eventq_index=0
310 issueLat=1
311 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
312 opLat=3
313 timings=system.cpu.executeFuncUnits.funcUnits1.timings
314
315 [system.cpu.executeFuncUnits.funcUnits1.opClasses]
316 type=MinorOpClassSet
317 children=opClasses
318 eventq_index=0
319 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
320
321 [system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
322 type=MinorOpClass
323 eventq_index=0
324 opClass=IntAlu
325
326 [system.cpu.executeFuncUnits.funcUnits1.timings]
327 type=MinorFUTiming
328 children=opClasses
329 description=Int
330 eventq_index=0
331 extraAssumedLat=0
332 extraCommitLat=0
333 extraCommitLatExpr=Null
334 mask=0
335 match=0
336 opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
337 srcRegsRelativeLats=2
338 suppress=false
339
340 [system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
341 type=MinorOpClassSet
342 eventq_index=0
343 opClasses=
344
345 [system.cpu.executeFuncUnits.funcUnits2]
346 type=MinorFU
347 children=opClasses timings
348 cantForwardFromFUIndices=
349 eventq_index=0
350 issueLat=1
351 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
352 opLat=3
353 timings=system.cpu.executeFuncUnits.funcUnits2.timings
354
355 [system.cpu.executeFuncUnits.funcUnits2.opClasses]
356 type=MinorOpClassSet
357 children=opClasses
358 eventq_index=0
359 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
360
361 [system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
362 type=MinorOpClass
363 eventq_index=0
364 opClass=IntMult
365
366 [system.cpu.executeFuncUnits.funcUnits2.timings]
367 type=MinorFUTiming
368 children=opClasses
369 description=Mul
370 eventq_index=0
371 extraAssumedLat=0
372 extraCommitLat=0
373 extraCommitLatExpr=Null
374 mask=0
375 match=0
376 opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
377 srcRegsRelativeLats=0
378 suppress=false
379
380 [system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
381 type=MinorOpClassSet
382 eventq_index=0
383 opClasses=
384
385 [system.cpu.executeFuncUnits.funcUnits3]
386 type=MinorFU
387 children=opClasses
388 cantForwardFromFUIndices=
389 eventq_index=0
390 issueLat=9
391 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
392 opLat=9
393 timings=
394
395 [system.cpu.executeFuncUnits.funcUnits3.opClasses]
396 type=MinorOpClassSet
397 children=opClasses
398 eventq_index=0
399 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
400
401 [system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
402 type=MinorOpClass
403 eventq_index=0
404 opClass=IntDiv
405
406 [system.cpu.executeFuncUnits.funcUnits4]
407 type=MinorFU
408 children=opClasses timings
409 cantForwardFromFUIndices=
410 eventq_index=0
411 issueLat=1
412 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
413 opLat=6
414 timings=system.cpu.executeFuncUnits.funcUnits4.timings
415
416 [system.cpu.executeFuncUnits.funcUnits4.opClasses]
417 type=MinorOpClassSet
418 children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
419 eventq_index=0
420 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25
421
422 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
423 type=MinorOpClass
424 eventq_index=0
425 opClass=FloatAdd
426
427 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
428 type=MinorOpClass
429 eventq_index=0
430 opClass=FloatCmp
431
432 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
433 type=MinorOpClass
434 eventq_index=0
435 opClass=FloatCvt
436
437 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
438 type=MinorOpClass
439 eventq_index=0
440 opClass=FloatMult
441
442 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
443 type=MinorOpClass
444 eventq_index=0
445 opClass=FloatDiv
446
447 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
448 type=MinorOpClass
449 eventq_index=0
450 opClass=FloatSqrt
451
452 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
453 type=MinorOpClass
454 eventq_index=0
455 opClass=SimdAdd
456
457 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
458 type=MinorOpClass
459 eventq_index=0
460 opClass=SimdAddAcc
461
462 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
463 type=MinorOpClass
464 eventq_index=0
465 opClass=SimdAlu
466
467 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
468 type=MinorOpClass
469 eventq_index=0
470 opClass=SimdCmp
471
472 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
473 type=MinorOpClass
474 eventq_index=0
475 opClass=SimdCvt
476
477 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
478 type=MinorOpClass
479 eventq_index=0
480 opClass=SimdMisc
481
482 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
483 type=MinorOpClass
484 eventq_index=0
485 opClass=SimdMult
486
487 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
488 type=MinorOpClass
489 eventq_index=0
490 opClass=SimdMultAcc
491
492 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
493 type=MinorOpClass
494 eventq_index=0
495 opClass=SimdShift
496
497 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
498 type=MinorOpClass
499 eventq_index=0
500 opClass=SimdShiftAcc
501
502 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
503 type=MinorOpClass
504 eventq_index=0
505 opClass=SimdSqrt
506
507 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
508 type=MinorOpClass
509 eventq_index=0
510 opClass=SimdFloatAdd
511
512 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
513 type=MinorOpClass
514 eventq_index=0
515 opClass=SimdFloatAlu
516
517 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
518 type=MinorOpClass
519 eventq_index=0
520 opClass=SimdFloatCmp
521
522 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
523 type=MinorOpClass
524 eventq_index=0
525 opClass=SimdFloatCvt
526
527 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
528 type=MinorOpClass
529 eventq_index=0
530 opClass=SimdFloatDiv
531
532 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
533 type=MinorOpClass
534 eventq_index=0
535 opClass=SimdFloatMisc
536
537 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
538 type=MinorOpClass
539 eventq_index=0
540 opClass=SimdFloatMult
541
542 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
543 type=MinorOpClass
544 eventq_index=0
545 opClass=SimdFloatMultAcc
546
547 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
548 type=MinorOpClass
549 eventq_index=0
550 opClass=SimdFloatSqrt
551
552 [system.cpu.executeFuncUnits.funcUnits4.timings]
553 type=MinorFUTiming
554 children=opClasses
555 description=FloatSimd
556 eventq_index=0
557 extraAssumedLat=0
558 extraCommitLat=0
559 extraCommitLatExpr=Null
560 mask=0
561 match=0
562 opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
563 srcRegsRelativeLats=2
564 suppress=false
565
566 [system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
567 type=MinorOpClassSet
568 eventq_index=0
569 opClasses=
570
571 [system.cpu.executeFuncUnits.funcUnits5]
572 type=MinorFU
573 children=opClasses timings
574 cantForwardFromFUIndices=
575 eventq_index=0
576 issueLat=1
577 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
578 opLat=1
579 timings=system.cpu.executeFuncUnits.funcUnits5.timings
580
581 [system.cpu.executeFuncUnits.funcUnits5.opClasses]
582 type=MinorOpClassSet
583 children=opClasses0 opClasses1
584 eventq_index=0
585 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1
586
587 [system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
588 type=MinorOpClass
589 eventq_index=0
590 opClass=MemRead
591
592 [system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
593 type=MinorOpClass
594 eventq_index=0
595 opClass=MemWrite
596
597 [system.cpu.executeFuncUnits.funcUnits5.timings]
598 type=MinorFUTiming
599 children=opClasses
600 description=Mem
601 eventq_index=0
602 extraAssumedLat=2
603 extraCommitLat=0
604 extraCommitLatExpr=Null
605 mask=0
606 match=0
607 opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
608 srcRegsRelativeLats=1
609 suppress=false
610
611 [system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
612 type=MinorOpClassSet
613 eventq_index=0
614 opClasses=
615
616 [system.cpu.executeFuncUnits.funcUnits6]
617 type=MinorFU
618 children=opClasses
619 cantForwardFromFUIndices=
620 eventq_index=0
621 issueLat=1
622 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
623 opLat=1
624 timings=
625
626 [system.cpu.executeFuncUnits.funcUnits6.opClasses]
627 type=MinorOpClassSet
628 children=opClasses0 opClasses1
629 eventq_index=0
630 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
631
632 [system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
633 type=MinorOpClass
634 eventq_index=0
635 opClass=IprAccess
636
637 [system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
638 type=MinorOpClass
639 eventq_index=0
640 opClass=InstPrefetch
641
642 [system.cpu.icache]
643 type=BaseCache
644 children=tags
645 addr_ranges=0:18446744073709551615
646 assoc=1
647 clk_domain=system.cpu_clk_domain
648 eventq_index=0
649 forward_snoops=true
650 hit_latency=2
651 is_top_level=true
652 max_miss_count=0
653 mshrs=4
654 prefetch_on_access=false
655 prefetcher=Null
656 response_latency=2
657 sequential_access=false
658 size=32768
659 system=system
660 tags=system.cpu.icache.tags
661 tgts_per_mshr=20
662 two_queue=false
663 write_buffers=8
664 cpu_side=system.cpu.icache_port
665 mem_side=system.cpu.toL2Bus.slave[0]
666
667 [system.cpu.icache.tags]
668 type=LRU
669 assoc=1
670 block_size=64
671 clk_domain=system.cpu_clk_domain
672 eventq_index=0
673 hit_latency=2
674 sequential_access=false
675 size=32768
676
677 [system.cpu.interrupts]
678 type=ArmInterrupts
679 eventq_index=0
680
681 [system.cpu.isa]
682 type=ArmISA
683 eventq_index=0
684 fpsid=1090793632
685 id_aa64afr0_el1=0
686 id_aa64afr1_el1=0
687 id_aa64dfr0_el1=1052678
688 id_aa64dfr1_el1=0
689 id_aa64isar0_el1=0
690 id_aa64isar1_el1=0
691 id_aa64mmfr0_el1=15728642
692 id_aa64mmfr1_el1=0
693 id_aa64pfr0_el1=17
694 id_aa64pfr1_el1=0
695 id_isar0=34607377
696 id_isar1=34677009
697 id_isar2=555950401
698 id_isar3=17899825
699 id_isar4=268501314
700 id_isar5=0
701 id_mmfr0=270536963
702 id_mmfr1=0
703 id_mmfr2=19070976
704 id_mmfr3=34611729
705 id_pfr0=49
706 id_pfr1=4113
707 midr=1091551472
708 system=system
709
710 [system.cpu.istage2_mmu]
711 type=ArmStage2MMU
712 children=stage2_tlb
713 eventq_index=0
714 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
715 tlb=system.cpu.itb
716
717 [system.cpu.istage2_mmu.stage2_tlb]
718 type=ArmTLB
719 children=walker
720 eventq_index=0
721 is_stage2=true
722 size=32
723 walker=system.cpu.istage2_mmu.stage2_tlb.walker
724
725 [system.cpu.istage2_mmu.stage2_tlb.walker]
726 type=ArmTableWalker
727 clk_domain=system.cpu_clk_domain
728 eventq_index=0
729 is_stage2=true
730 num_squash_per_cycle=2
731 sys=system
732 port=system.cpu.toL2Bus.slave[4]
733
734 [system.cpu.itb]
735 type=ArmTLB
736 children=walker
737 eventq_index=0
738 is_stage2=false
739 size=64
740 walker=system.cpu.itb.walker
741
742 [system.cpu.itb.walker]
743 type=ArmTableWalker
744 clk_domain=system.cpu_clk_domain
745 eventq_index=0
746 is_stage2=false
747 num_squash_per_cycle=2
748 sys=system
749 port=system.cpu.toL2Bus.slave[2]
750
751 [system.cpu.l2cache]
752 type=BaseCache
753 children=tags
754 addr_ranges=0:18446744073709551615
755 assoc=8
756 clk_domain=system.cpu_clk_domain
757 eventq_index=0
758 forward_snoops=true
759 hit_latency=20
760 is_top_level=false
761 max_miss_count=0
762 mshrs=20
763 prefetch_on_access=false
764 prefetcher=Null
765 response_latency=20
766 sequential_access=false
767 size=4194304
768 system=system
769 tags=system.cpu.l2cache.tags
770 tgts_per_mshr=12
771 two_queue=false
772 write_buffers=8
773 cpu_side=system.cpu.toL2Bus.master[0]
774 mem_side=system.membus.slave[1]
775
776 [system.cpu.l2cache.tags]
777 type=LRU
778 assoc=8
779 block_size=64
780 clk_domain=system.cpu_clk_domain
781 eventq_index=0
782 hit_latency=20
783 sequential_access=false
784 size=4194304
785
786 [system.cpu.toL2Bus]
787 type=CoherentXBar
788 clk_domain=system.cpu_clk_domain
789 eventq_index=0
790 header_cycles=1
791 snoop_filter=Null
792 system=system
793 use_default_range=false
794 width=32
795 master=system.cpu.l2cache.cpu_side
796 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
797
798 [system.cpu.tracer]
799 type=ExeTracer
800 eventq_index=0
801
802 [system.cpu_clk_domain]
803 type=SrcClockDomain
804 clock=500
805 domain_id=-1
806 eventq_index=0
807 init_perf_level=0
808 voltage_domain=system.voltage_domain
809
810 [system.dvfs_handler]
811 type=DVFSHandler
812 domains=
813 enable=false
814 eventq_index=0
815 sys_clk_domain=system.clk_domain
816 transition_latency=100000000
817
818 [system.intrctrl]
819 type=IntrControl
820 eventq_index=0
821 sys=system
822
823 [system.iobus]
824 type=NoncoherentXBar
825 clk_domain=system.clk_domain
826 eventq_index=0
827 header_cycles=1
828 use_default_range=false
829 width=8
830 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.realview.energy_ctrl.pio system.iocache.cpu_side
831 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
832
833 [system.iocache]
834 type=BaseCache
835 children=tags
836 addr_ranges=0:134217727
837 assoc=8
838 clk_domain=system.clk_domain
839 eventq_index=0
840 forward_snoops=false
841 hit_latency=50
842 is_top_level=true
843 max_miss_count=0
844 mshrs=20
845 prefetch_on_access=false
846 prefetcher=Null
847 response_latency=50
848 sequential_access=false
849 size=1024
850 system=system
851 tags=system.iocache.tags
852 tgts_per_mshr=12
853 two_queue=false
854 write_buffers=8
855 cpu_side=system.iobus.master[26]
856 mem_side=system.membus.slave[2]
857
858 [system.iocache.tags]
859 type=LRU
860 assoc=8
861 block_size=64
862 clk_domain=system.clk_domain
863 eventq_index=0
864 hit_latency=50
865 sequential_access=false
866 size=1024
867
868 [system.membus]
869 type=CoherentXBar
870 children=badaddr_responder
871 clk_domain=system.clk_domain
872 eventq_index=0
873 header_cycles=1
874 snoop_filter=Null
875 system=system
876 use_default_range=false
877 width=8
878 default=system.membus.badaddr_responder.pio
879 master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
880 slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
881
882 [system.membus.badaddr_responder]
883 type=IsaFake
884 clk_domain=system.clk_domain
885 eventq_index=0
886 fake_mem=false
887 pio_addr=0
888 pio_latency=100000
889 pio_size=8
890 ret_bad_addr=true
891 ret_data16=65535
892 ret_data32=4294967295
893 ret_data64=18446744073709551615
894 ret_data8=255
895 system=system
896 update_data=false
897 warn_access=warn
898 pio=system.membus.default
899
900 [system.physmem]
901 type=DRAMCtrl
902 IDD0=0.075000
903 IDD02=0.000000
904 IDD2N=0.050000
905 IDD2N2=0.000000
906 IDD2P0=0.000000
907 IDD2P02=0.000000
908 IDD2P1=0.000000
909 IDD2P12=0.000000
910 IDD3N=0.057000
911 IDD3N2=0.000000
912 IDD3P0=0.000000
913 IDD3P02=0.000000
914 IDD3P1=0.000000
915 IDD3P12=0.000000
916 IDD4R=0.187000
917 IDD4R2=0.000000
918 IDD4W=0.165000
919 IDD4W2=0.000000
920 IDD5=0.220000
921 IDD52=0.000000
922 IDD6=0.000000
923 IDD62=0.000000
924 VDD=1.500000
925 VDD2=0.000000
926 activation_limit=4
927 addr_mapping=RoRaBaChCo
928 bank_groups_per_rank=0
929 banks_per_rank=8
930 burst_length=8
931 channels=1
932 clk_domain=system.clk_domain
933 conf_table_reported=true
934 device_bus_width=8
935 device_rowbuffer_size=1024
936 devices_per_rank=8
937 dll=true
938 eventq_index=0
939 in_addr_map=true
940 max_accesses_per_row=16
941 mem_sched_policy=frfcfs
942 min_writes_per_switch=16
943 null=false
944 page_policy=open_adaptive
945 range=0:134217727
946 ranks_per_channel=2
947 read_buffer_size=32
948 static_backend_latency=10000
949 static_frontend_latency=10000
950 tBURST=5000
951 tCCD_L=0
952 tCK=1250
953 tCL=13750
954 tCS=2500
955 tRAS=35000
956 tRCD=13750
957 tREFI=7800000
958 tRFC=260000
959 tRP=13750
960 tRRD=6000
961 tRRD_L=0
962 tRTP=7500
963 tRTW=2500
964 tWR=15000
965 tWTR=7500
966 tXAW=30000
967 tXP=0
968 tXPDLL=0
969 tXS=0
970 tXSDLL=0
971 write_buffer_size=64
972 write_high_thresh_perc=85
973 write_low_thresh_perc=50
974 port=system.membus.master[6]
975
976 [system.realview]
977 type=RealView
978 children=a9scu aaci_fake cf_ctrl clcd dmac_fake energy_ctrl flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
979 eventq_index=0
980 intrctrl=system.intrctrl
981 pci_cfg_base=0
982 pci_cfg_gen_offsets=false
983 pci_io_base=0
984 system=system
985
986 [system.realview.a9scu]
987 type=A9SCU
988 clk_domain=system.clk_domain
989 eventq_index=0
990 pio_addr=520093696
991 pio_latency=100000
992 system=system
993 pio=system.membus.master[4]
994
995 [system.realview.aaci_fake]
996 type=AmbaFake
997 amba_id=0
998 clk_domain=system.clk_domain
999 eventq_index=0
1000 ignore_access=false
1001 pio_addr=268451840
1002 pio_latency=100000
1003 system=system
1004 pio=system.iobus.master[21]
1005
1006 [system.realview.cf_ctrl]
1007 type=IdeController
1008 BAR0=402653184
1009 BAR0LegacyIO=true
1010 BAR0Size=16
1011 BAR1=402653440
1012 BAR1LegacyIO=true
1013 BAR1Size=1
1014 BAR2=1
1015 BAR2LegacyIO=false
1016 BAR2Size=8
1017 BAR3=1
1018 BAR3LegacyIO=false
1019 BAR3Size=4
1020 BAR4=1
1021 BAR4LegacyIO=false
1022 BAR4Size=16
1023 BAR5=1
1024 BAR5LegacyIO=false
1025 BAR5Size=0
1026 BIST=0
1027 CacheLineSize=0
1028 CapabilityPtr=0
1029 CardbusCIS=0
1030 ClassCode=1
1031 Command=1
1032 DeviceID=28945
1033 ExpansionROM=0
1034 HeaderType=0
1035 InterruptLine=31
1036 InterruptPin=1
1037 LatencyTimer=0
1038 LegacyIOBase=0
1039 MSICAPBaseOffset=0
1040 MSICAPCapId=0
1041 MSICAPMaskBits=0
1042 MSICAPMsgAddr=0
1043 MSICAPMsgCtrl=0
1044 MSICAPMsgData=0
1045 MSICAPMsgUpperAddr=0
1046 MSICAPNextCapability=0
1047 MSICAPPendingBits=0
1048 MSIXCAPBaseOffset=0
1049 MSIXCAPCapId=0
1050 MSIXCAPNextCapability=0
1051 MSIXMsgCtrl=0
1052 MSIXPbaOffset=0
1053 MSIXTableOffset=0
1054 MaximumLatency=0
1055 MinimumGrant=0
1056 PMCAPBaseOffset=0
1057 PMCAPCapId=0
1058 PMCAPCapabilities=0
1059 PMCAPCtrlStatus=0
1060 PMCAPNextCapability=0
1061 PXCAPBaseOffset=0
1062 PXCAPCapId=0
1063 PXCAPCapabilities=0
1064 PXCAPDevCap2=0
1065 PXCAPDevCapabilities=0
1066 PXCAPDevCtrl=0
1067 PXCAPDevCtrl2=0
1068 PXCAPDevStatus=0
1069 PXCAPLinkCap=0
1070 PXCAPLinkCtrl=0
1071 PXCAPLinkStatus=0
1072 PXCAPNextCapability=0
1073 ProgIF=133
1074 Revision=0
1075 Status=640
1076 SubClassCode=1
1077 SubsystemID=0
1078 SubsystemVendorID=0
1079 VendorID=32902
1080 clk_domain=system.clk_domain
1081 config_latency=20000
1082 ctrl_offset=2
1083 disks=system.cf0
1084 eventq_index=0
1085 io_shift=1
1086 pci_bus=2
1087 pci_dev=7
1088 pci_func=0
1089 pio_latency=30000
1090 platform=system.realview
1091 system=system
1092 config=system.iobus.master[8]
1093 dma=system.iobus.slave[2]
1094 pio=system.iobus.master[7]
1095
1096 [system.realview.clcd]
1097 type=Pl111
1098 amba_id=1315089
1099 clk_domain=system.clk_domain
1100 enable_capture=true
1101 eventq_index=0
1102 gic=system.realview.gic
1103 int_num=55
1104 pio_addr=268566528
1105 pio_latency=10000
1106 pixel_clock=41667
1107 system=system
1108 vnc=system.vncserver
1109 dma=system.iobus.slave[1]
1110 pio=system.iobus.master[4]
1111
1112 [system.realview.dmac_fake]
1113 type=AmbaFake
1114 amba_id=0
1115 clk_domain=system.clk_domain
1116 eventq_index=0
1117 ignore_access=false
1118 pio_addr=268632064
1119 pio_latency=100000
1120 system=system
1121 pio=system.iobus.master[9]
1122
1123 [system.realview.energy_ctrl]
1124 type=EnergyCtrl
1125 clk_domain=system.clk_domain
1126 dvfs_handler=system.dvfs_handler
1127 eventq_index=0
1128 pio_addr=268496896
1129 pio_latency=100000
1130 system=system
1131 pio=system.iobus.master[25]
1132
1133 [system.realview.flash_fake]
1134 type=IsaFake
1135 clk_domain=system.clk_domain
1136 eventq_index=0
1137 fake_mem=true
1138 pio_addr=1073741824
1139 pio_latency=100000
1140 pio_size=536870912
1141 ret_bad_addr=false
1142 ret_data16=65535
1143 ret_data32=4294967295
1144 ret_data64=18446744073709551615
1145 ret_data8=255
1146 system=system
1147 update_data=false
1148 warn_access=
1149 pio=system.iobus.master[24]
1150
1151 [system.realview.gic]
1152 type=Pl390
1153 clk_domain=system.clk_domain
1154 cpu_addr=520093952
1155 cpu_pio_delay=10000
1156 dist_addr=520097792
1157 dist_pio_delay=10000
1158 eventq_index=0
1159 int_latency=10000
1160 it_lines=128
1161 msix_addr=0
1162 platform=system.realview
1163 system=system
1164 pio=system.membus.master[2]
1165
1166 [system.realview.gpio0_fake]
1167 type=AmbaFake
1168 amba_id=0
1169 clk_domain=system.clk_domain
1170 eventq_index=0
1171 ignore_access=false
1172 pio_addr=268513280
1173 pio_latency=100000
1174 system=system
1175 pio=system.iobus.master[16]
1176
1177 [system.realview.gpio1_fake]
1178 type=AmbaFake
1179 amba_id=0
1180 clk_domain=system.clk_domain
1181 eventq_index=0
1182 ignore_access=false
1183 pio_addr=268517376
1184 pio_latency=100000
1185 system=system
1186 pio=system.iobus.master[17]
1187
1188 [system.realview.gpio2_fake]
1189 type=AmbaFake
1190 amba_id=0
1191 clk_domain=system.clk_domain
1192 eventq_index=0
1193 ignore_access=false
1194 pio_addr=268521472
1195 pio_latency=100000
1196 system=system
1197 pio=system.iobus.master[18]
1198
1199 [system.realview.kmi0]
1200 type=Pl050
1201 amba_id=1314896
1202 clk_domain=system.clk_domain
1203 eventq_index=0
1204 gic=system.realview.gic
1205 int_delay=1000000
1206 int_num=52
1207 is_mouse=false
1208 pio_addr=268460032
1209 pio_latency=100000
1210 system=system
1211 vnc=system.vncserver
1212 pio=system.iobus.master[5]
1213
1214 [system.realview.kmi1]
1215 type=Pl050
1216 amba_id=1314896
1217 clk_domain=system.clk_domain
1218 eventq_index=0
1219 gic=system.realview.gic
1220 int_delay=1000000
1221 int_num=53
1222 is_mouse=true
1223 pio_addr=268464128
1224 pio_latency=100000
1225 system=system
1226 vnc=system.vncserver
1227 pio=system.iobus.master[6]
1228
1229 [system.realview.l2x0_fake]
1230 type=IsaFake
1231 clk_domain=system.clk_domain
1232 eventq_index=0
1233 fake_mem=false
1234 pio_addr=520101888
1235 pio_latency=100000
1236 pio_size=4095
1237 ret_bad_addr=false
1238 ret_data16=65535
1239 ret_data32=4294967295
1240 ret_data64=18446744073709551615
1241 ret_data8=255
1242 system=system
1243 update_data=false
1244 warn_access=
1245 pio=system.membus.master[3]
1246
1247 [system.realview.local_cpu_timer]
1248 type=CpuLocalTimer
1249 clk_domain=system.clk_domain
1250 eventq_index=0
1251 gic=system.realview.gic
1252 int_num_timer=29
1253 int_num_watchdog=30
1254 pio_addr=520095232
1255 pio_latency=100000
1256 system=system
1257 pio=system.membus.master[5]
1258
1259 [system.realview.mmc_fake]
1260 type=AmbaFake
1261 amba_id=0
1262 clk_domain=system.clk_domain
1263 eventq_index=0
1264 ignore_access=false
1265 pio_addr=268455936
1266 pio_latency=100000
1267 system=system
1268 pio=system.iobus.master[22]
1269
1270 [system.realview.nvmem]
1271 type=SimpleMemory
1272 bandwidth=73.000000
1273 clk_domain=system.clk_domain
1274 conf_table_reported=false
1275 eventq_index=0
1276 in_addr_map=true
1277 latency=30000
1278 latency_var=0
1279 null=false
1280 range=2147483648:2214592511
1281 port=system.membus.master[1]
1282
1283 [system.realview.realview_io]
1284 type=RealViewCtrl
1285 clk_domain=system.clk_domain
1286 eventq_index=0
1287 idreg=0
1288 pio_addr=268435456
1289 pio_latency=100000
1290 proc_id0=201326592
1291 proc_id1=201327138
1292 system=system
1293 pio=system.iobus.master[1]
1294
1295 [system.realview.rtc]
1296 type=PL031
1297 amba_id=3412017
1298 clk_domain=system.clk_domain
1299 eventq_index=0
1300 gic=system.realview.gic
1301 int_delay=100000
1302 int_num=42
1303 pio_addr=268529664
1304 pio_latency=100000
1305 system=system
1306 time=Thu Jan 1 00:00:00 2009
1307 pio=system.iobus.master[23]
1308
1309 [system.realview.sci_fake]
1310 type=AmbaFake
1311 amba_id=0
1312 clk_domain=system.clk_domain
1313 eventq_index=0
1314 ignore_access=false
1315 pio_addr=268492800
1316 pio_latency=100000
1317 system=system
1318 pio=system.iobus.master[20]
1319
1320 [system.realview.smc_fake]
1321 type=AmbaFake
1322 amba_id=0
1323 clk_domain=system.clk_domain
1324 eventq_index=0
1325 ignore_access=false
1326 pio_addr=269357056
1327 pio_latency=100000
1328 system=system
1329 pio=system.iobus.master[13]
1330
1331 [system.realview.sp810_fake]
1332 type=AmbaFake
1333 amba_id=0
1334 clk_domain=system.clk_domain
1335 eventq_index=0
1336 ignore_access=true
1337 pio_addr=268439552
1338 pio_latency=100000
1339 system=system
1340 pio=system.iobus.master[14]
1341
1342 [system.realview.ssp_fake]
1343 type=AmbaFake
1344 amba_id=0
1345 clk_domain=system.clk_domain
1346 eventq_index=0
1347 ignore_access=false
1348 pio_addr=268488704
1349 pio_latency=100000
1350 system=system
1351 pio=system.iobus.master[19]
1352
1353 [system.realview.timer0]
1354 type=Sp804
1355 amba_id=1316868
1356 clk_domain=system.clk_domain
1357 clock0=1000000
1358 clock1=1000000
1359 eventq_index=0
1360 gic=system.realview.gic
1361 int_num0=36
1362 int_num1=36
1363 pio_addr=268505088
1364 pio_latency=100000
1365 system=system
1366 pio=system.iobus.master[2]
1367
1368 [system.realview.timer1]
1369 type=Sp804
1370 amba_id=1316868
1371 clk_domain=system.clk_domain
1372 clock0=1000000
1373 clock1=1000000
1374 eventq_index=0
1375 gic=system.realview.gic
1376 int_num0=37
1377 int_num1=37
1378 pio_addr=268509184
1379 pio_latency=100000
1380 system=system
1381 pio=system.iobus.master[3]
1382
1383 [system.realview.uart]
1384 type=Pl011
1385 clk_domain=system.clk_domain
1386 end_on_eot=false
1387 eventq_index=0
1388 gic=system.realview.gic
1389 int_delay=100000
1390 int_num=44
1391 pio_addr=268472320
1392 pio_latency=100000
1393 platform=system.realview
1394 system=system
1395 terminal=system.terminal
1396 pio=system.iobus.master[0]
1397
1398 [system.realview.uart1_fake]
1399 type=AmbaFake
1400 amba_id=0
1401 clk_domain=system.clk_domain
1402 eventq_index=0
1403 ignore_access=false
1404 pio_addr=268476416
1405 pio_latency=100000
1406 system=system
1407 pio=system.iobus.master[10]
1408
1409 [system.realview.uart2_fake]
1410 type=AmbaFake
1411 amba_id=0
1412 clk_domain=system.clk_domain
1413 eventq_index=0
1414 ignore_access=false
1415 pio_addr=268480512
1416 pio_latency=100000
1417 system=system
1418 pio=system.iobus.master[11]
1419
1420 [system.realview.uart3_fake]
1421 type=AmbaFake
1422 amba_id=0
1423 clk_domain=system.clk_domain
1424 eventq_index=0
1425 ignore_access=false
1426 pio_addr=268484608
1427 pio_latency=100000
1428 system=system
1429 pio=system.iobus.master[12]
1430
1431 [system.realview.watchdog_fake]
1432 type=AmbaFake
1433 amba_id=0
1434 clk_domain=system.clk_domain
1435 eventq_index=0
1436 ignore_access=false
1437 pio_addr=268500992
1438 pio_latency=100000
1439 system=system
1440 pio=system.iobus.master[15]
1441
1442 [system.terminal]
1443 type=Terminal
1444 eventq_index=0
1445 intr_control=system.intrctrl
1446 number=0
1447 output=true
1448 port=3456
1449
1450 [system.vncserver]
1451 type=VncServer
1452 eventq_index=0
1453 frame_capture=false
1454 number=0
1455 port=5900
1456
1457 [system.voltage_domain]
1458 type=VoltageDomain
1459 eventq_index=0
1460 voltage=1.000000
1461