8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
15 boot_loader=/work/gem5/dist/binaries/boot_emm.arm
16 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
18 clk_domain=system.clk_domain
19 dtb_filename=/work/gem5/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
20 early_kernel_symbols=false
21 enable_context_switch_stats_dump=false
24 gic_cpu_addr=738205696
25 have_large_asid_64=false
28 have_virtualization=false
29 highest_el_is_64=false
31 kernel=/work/gem5/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5
32 kernel_addr_check=true
33 load_addr_mask=268435455
34 load_offset=2147483648
35 machine_type=VExpress_EMM
37 mem_ranges=2147483648:2415919103
38 memories=system.physmem system.realview.nvmem system.realview.vram
39 mmap_using_noreserve=false
45 readfile=/work/gem5/outgoing/gem5/tests/halt.sh
48 work_begin_ckpt_count=0
49 work_begin_cpu_id_exit=-1
50 work_begin_exit_count=0
51 work_cpus_ckpt_count=0
55 system_port=system.membus.slave[1]
59 clk_domain=system.clk_domain
62 ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
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66 slave=system.membus.master[0]
74 image=system.cf0.image
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88 image_file=/work/gem5/dist/disks/linux-aarch32-ael.img
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104 clk_domain=system.cpu_clk_domain
106 decodeCycleInput=true
107 decodeInputBufferSize=3
109 decodeToExecuteForwardDelay=1
110 do_checkpoint_insts=true
112 do_statistics_insts=true
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120 executeCycleInput=true
121 executeFuncUnits=system.cpu0.executeFuncUnits
122 executeInputBufferSize=7
125 executeLSQMaxStoreBufferStoresPerCycle=2
126 executeLSQRequestsQueueSize=1
127 executeLSQStoreBufferSize=5
128 executeLSQTransfersQueueSize=2
129 executeMaxAccessesInMemory=2
130 executeMemoryCommitLimit=1
131 executeMemoryIssueLimit=1
133 executeSetTraceTimeOnCommit=true
134 executeSetTraceTimeOnIssue=false
136 fetch1LineSnapWidth=0
138 fetch1ToFetch2BackwardDelay=1
139 fetch1ToFetch2ForwardDelay=1
140 fetch2CycleInput=true
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142 fetch2ToDecodeForwardDelay=1
144 function_trace_start=0
145 interrupts=system.cpu0.interrupts
147 istage2_mmu=system.cpu0.istage2_mmu
149 max_insts_all_threads=0
150 max_insts_any_thread=0
151 max_loads_all_threads=0
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178 localPredictorSize=2048
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187 demand_mshr_reserve=1
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685 id_aa64dfr0_el1=1052678
689 id_aa64mmfr0_el1=15728642
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818 snoop_response_latency=1
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850 executeCycleInput=true
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852 executeInputBufferSize=7
855 executeLSQMaxStoreBufferStoresPerCycle=2
856 executeLSQRequestsQueueSize=1
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858 executeLSQTransfersQueueSize=2
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860 executeMemoryCommitLimit=1
861 executeMemoryIssueLimit=1
863 executeSetTraceTimeOnCommit=true
864 executeSetTraceTimeOnIssue=false
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880 max_insts_any_thread=0
881 max_loads_all_threads=0
882 max_loads_any_thread=0
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1145 type=MinorOpClassSet
1146 children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
1148 opClasses=system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses25
1150 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses00]
1155 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses01]
1160 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses02]
1165 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses03]
1170 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses04]
1175 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses05]
1180 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses06]
1185 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses07]
1190 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses08]
1195 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses09]
1200 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses10]
1205 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses11]
1210 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses12]
1215 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses13]
1220 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses14]
1225 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses15]
1228 opClass=SimdShiftAcc
1230 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses16]
1235 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses17]
1238 opClass=SimdFloatAdd
1240 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses18]
1243 opClass=SimdFloatAlu
1245 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses19]
1248 opClass=SimdFloatCmp
1250 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses20]
1253 opClass=SimdFloatCvt
1255 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses21]
1258 opClass=SimdFloatDiv
1260 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses22]
1263 opClass=SimdFloatMisc
1265 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses23]
1268 opClass=SimdFloatMult
1270 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses24]
1273 opClass=SimdFloatMultAcc
1275 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses25]
1278 opClass=SimdFloatSqrt
1280 [system.cpu1.executeFuncUnits.funcUnits4.timings]
1283 description=FloatSimd
1287 extraCommitLatExpr=Null
1290 opClasses=system.cpu1.executeFuncUnits.funcUnits4.timings.opClasses
1291 srcRegsRelativeLats=2
1294 [system.cpu1.executeFuncUnits.funcUnits4.timings.opClasses]
1295 type=MinorOpClassSet
1299 [system.cpu1.executeFuncUnits.funcUnits5]
1301 children=opClasses timings
1302 cantForwardFromFUIndices=
1305 opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses
1307 timings=system.cpu1.executeFuncUnits.funcUnits5.timings
1309 [system.cpu1.executeFuncUnits.funcUnits5.opClasses]
1310 type=MinorOpClassSet
1311 children=opClasses0 opClasses1
1313 opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses1
1315 [system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses0]
1320 [system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses1]
1325 [system.cpu1.executeFuncUnits.funcUnits5.timings]
1332 extraCommitLatExpr=Null
1335 opClasses=system.cpu1.executeFuncUnits.funcUnits5.timings.opClasses
1336 srcRegsRelativeLats=1
1339 [system.cpu1.executeFuncUnits.funcUnits5.timings.opClasses]
1340 type=MinorOpClassSet
1344 [system.cpu1.executeFuncUnits.funcUnits6]
1347 cantForwardFromFUIndices=
1350 opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses
1354 [system.cpu1.executeFuncUnits.funcUnits6.opClasses]
1355 type=MinorOpClassSet
1356 children=opClasses0 opClasses1
1358 opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses1
1360 [system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses0]
1365 [system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses1]
1368 opClass=InstPrefetch
1370 [system.cpu1.icache]
1373 addr_ranges=0:18446744073709551615
1375 clk_domain=system.cpu_clk_domain
1376 demand_mshr_reserve=1
1378 forward_snoops=false
1383 prefetch_on_access=false
1386 sequential_access=false
1389 tags=system.cpu1.icache.tags
1392 cpu_side=system.cpu1.icache_port
1393 mem_side=system.cpu1.toL2Bus.slave[0]
1395 [system.cpu1.icache.tags]
1399 clk_domain=system.cpu_clk_domain
1402 sequential_access=false
1405 [system.cpu1.interrupts]
1415 id_aa64dfr0_el1=1052678
1419 id_aa64mmfr0_el1=15728642
1439 [system.cpu1.istage2_mmu]
1443 stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
1447 [system.cpu1.istage2_mmu.stage2_tlb]
1453 walker=system.cpu1.istage2_mmu.stage2_tlb.walker
1455 [system.cpu1.istage2_mmu.stage2_tlb.walker]
1457 clk_domain=system.cpu_clk_domain
1460 num_squash_per_cycle=2
1469 walker=system.cpu1.itb.walker
1471 [system.cpu1.itb.walker]
1473 clk_domain=system.cpu_clk_domain
1476 num_squash_per_cycle=2
1478 port=system.cpu1.toL2Bus.slave[2]
1480 [system.cpu1.l2cache]
1482 children=prefetcher tags
1483 addr_ranges=0:18446744073709551615
1485 clk_domain=system.cpu_clk_domain
1486 demand_mshr_reserve=1
1493 prefetch_on_access=true
1494 prefetcher=system.cpu1.l2cache.prefetcher
1496 sequential_access=false
1499 tags=system.cpu1.l2cache.tags
1502 cpu_side=system.cpu1.toL2Bus.master[0]
1503 mem_side=system.toL2Bus.slave[1]
1505 [system.cpu1.l2cache.prefetcher]
1506 type=StridePrefetcher
1508 clk_domain=system.cpu_clk_domain
1530 [system.cpu1.l2cache.tags]
1534 clk_domain=system.cpu_clk_domain
1537 sequential_access=false
1540 [system.cpu1.toL2Bus]
1542 clk_domain=system.cpu_clk_domain
1548 snoop_response_latency=1
1550 use_default_range=false
1552 master=system.cpu1.l2cache.cpu_side
1553 slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
1555 [system.cpu1.tracer]
1559 [system.cpu_clk_domain]
1565 voltage_domain=system.voltage_domain
1567 [system.dvfs_handler]
1572 sys_clk_domain=system.clk_domain
1573 transition_latency=100000000
1581 type=NoncoherentXBar
1582 clk_domain=system.clk_domain
1587 use_default_range=true
1589 default=system.realview.pciconfig.pio
1590 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
1591 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
1596 addr_ranges=2147483648:2415919103
1598 clk_domain=system.clk_domain
1599 demand_mshr_reserve=1
1601 forward_snoops=false
1606 prefetch_on_access=false
1609 sequential_access=false
1612 tags=system.iocache.tags
1615 cpu_side=system.iobus.master[27]
1616 mem_side=system.membus.slave[3]
1618 [system.iocache.tags]
1622 clk_domain=system.clk_domain
1625 sequential_access=false
1631 addr_ranges=0:18446744073709551615
1633 clk_domain=system.cpu_clk_domain
1634 demand_mshr_reserve=1
1641 prefetch_on_access=false
1644 sequential_access=false
1647 tags=system.l2c.tags
1650 cpu_side=system.toL2Bus.master[0]
1651 mem_side=system.membus.slave[2]
1657 clk_domain=system.cpu_clk_domain
1660 sequential_access=false
1665 children=badaddr_responder
1666 clk_domain=system.clk_domain
1672 snoop_response_latency=4
1674 use_default_range=false
1676 default=system.membus.badaddr_responder.pio
1677 master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
1678 slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
1680 [system.membus.badaddr_responder]
1682 clk_domain=system.clk_domain
1690 ret_data32=4294967295
1691 ret_data64=18446744073709551615
1696 pio=system.membus.default
1725 addr_mapping=RoRaBaCoCh
1726 bank_groups_per_rank=0
1730 clk_domain=system.clk_domain
1731 conf_table_reported=true
1733 device_rowbuffer_size=1024
1734 device_size=536870912
1739 max_accesses_per_row=16
1740 mem_sched_policy=frfcfs
1741 min_writes_per_switch=16
1743 page_policy=open_adaptive
1744 range=2147483648:2415919103
1747 static_backend_latency=10000
1748 static_frontend_latency=10000
1770 write_buffer_size=64
1771 write_high_thresh_perc=85
1772 write_low_thresh_perc=50
1773 port=system.membus.master[5]
1777 children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
1779 intrctrl=system.intrctrl
1780 pci_cfg_base=805306368
1781 pci_cfg_gen_offsets=false
1785 [system.realview.aaci_fake]
1788 clk_domain=system.clk_domain
1794 pio=system.iobus.master[18]
1796 [system.realview.cf_ctrl]
1835 MSICAPMsgUpperAddr=0
1836 MSICAPNextCapability=0
1840 MSIXCAPNextCapability=0
1850 PMCAPNextCapability=0
1855 PXCAPDevCapabilities=0
1862 PXCAPNextCapability=0
1870 clk_domain=system.clk_domain
1871 config_latency=20000
1880 platform=system.realview
1882 config=system.iobus.master[9]
1883 dma=system.iobus.slave[2]
1884 pio=system.iobus.master[8]
1886 [system.realview.clcd]
1889 clk_domain=system.clk_domain
1892 gic=system.realview.gic
1898 vnc=system.vncserver
1899 dma=system.iobus.slave[1]
1900 pio=system.iobus.master[4]
1902 [system.realview.energy_ctrl]
1904 clk_domain=system.clk_domain
1905 dvfs_handler=system.dvfs_handler
1910 pio=system.iobus.master[22]
1912 [system.realview.ethernet]
1951 MSICAPMsgUpperAddr=0
1952 MSICAPNextCapability=0
1956 MSIXCAPNextCapability=0
1966 PMCAPNextCapability=0
1971 PXCAPDevCapabilities=0
1978 PXCAPNextCapability=0
1984 SubsystemVendorID=32902
1986 clk_domain=system.clk_domain
1987 config_latency=20000
1989 fetch_comp_delay=10000
1991 hardware_address=00:90:00:00:00:01
1998 platform=system.realview
1999 rx_desc_cache_size=64
2003 tx_desc_cache_size=64
2008 config=system.iobus.master[26]
2009 dma=system.iobus.slave[4]
2010 pio=system.iobus.master[25]
2012 [system.realview.generic_timer]
2015 gic=system.realview.gic
2020 [system.realview.gic]
2022 clk_domain=system.clk_domain
2026 dist_pio_delay=10000
2030 platform=system.realview
2032 pio=system.membus.master[2]
2034 [system.realview.hdlcd]
2037 clk_domain=system.clk_domain
2040 gic=system.realview.gic
2046 vnc=system.vncserver
2047 workaround_swap_rb=true
2048 dma=system.membus.slave[0]
2049 pio=system.iobus.master[5]
2051 [system.realview.ide]
2090 MSICAPMsgUpperAddr=0
2091 MSICAPNextCapability=0
2095 MSIXCAPNextCapability=0
2105 PMCAPNextCapability=0
2110 PXCAPDevCapabilities=0
2117 PXCAPNextCapability=0
2125 clk_domain=system.clk_domain
2126 config_latency=20000
2135 platform=system.realview
2137 config=system.iobus.master[24]
2138 dma=system.iobus.slave[3]
2139 pio=system.iobus.master[23]
2141 [system.realview.kmi0]
2144 clk_domain=system.clk_domain
2146 gic=system.realview.gic
2153 vnc=system.vncserver
2154 pio=system.iobus.master[6]
2156 [system.realview.kmi1]
2159 clk_domain=system.clk_domain
2161 gic=system.realview.gic
2168 vnc=system.vncserver
2169 pio=system.iobus.master[7]
2171 [system.realview.l2x0_fake]
2173 clk_domain=system.clk_domain
2181 ret_data32=4294967295
2182 ret_data64=18446744073709551615
2187 pio=system.iobus.master[12]
2189 [system.realview.lan_fake]
2191 clk_domain=system.clk_domain
2199 ret_data32=4294967295
2200 ret_data64=18446744073709551615
2205 pio=system.iobus.master[19]
2207 [system.realview.local_cpu_timer]
2209 clk_domain=system.clk_domain
2211 gic=system.realview.gic
2217 pio=system.membus.master[4]
2219 [system.realview.mmc_fake]
2222 clk_domain=system.clk_domain
2228 pio=system.iobus.master[21]
2230 [system.realview.nvmem]
2233 clk_domain=system.clk_domain
2234 conf_table_reported=false
2241 port=system.membus.master[1]
2243 [system.realview.pciconfig]
2246 clk_domain=system.clk_domain
2250 platform=system.realview
2253 pio=system.iobus.default
2255 [system.realview.realview_io]
2257 clk_domain=system.clk_domain
2265 pio=system.iobus.master[1]
2267 [system.realview.rtc]
2270 clk_domain=system.clk_domain
2272 gic=system.realview.gic
2278 time=Thu Jan 1 00:00:00 2009
2279 pio=system.iobus.master[10]
2281 [system.realview.sp810_fake]
2284 clk_domain=system.clk_domain
2290 pio=system.iobus.master[16]
2292 [system.realview.timer0]
2295 clk_domain=system.clk_domain
2299 gic=system.realview.gic
2305 pio=system.iobus.master[2]
2307 [system.realview.timer1]
2310 clk_domain=system.clk_domain
2314 gic=system.realview.gic
2320 pio=system.iobus.master[3]
2322 [system.realview.uart]
2324 clk_domain=system.clk_domain
2327 gic=system.realview.gic
2332 platform=system.realview
2334 terminal=system.terminal
2335 pio=system.iobus.master[0]
2337 [system.realview.uart1_fake]
2340 clk_domain=system.clk_domain
2346 pio=system.iobus.master[13]
2348 [system.realview.uart2_fake]
2351 clk_domain=system.clk_domain
2357 pio=system.iobus.master[14]
2359 [system.realview.uart3_fake]
2362 clk_domain=system.clk_domain
2368 pio=system.iobus.master[15]
2370 [system.realview.usb_fake]
2372 clk_domain=system.clk_domain
2380 ret_data32=4294967295
2381 ret_data64=18446744073709551615
2386 pio=system.iobus.master[20]
2388 [system.realview.vgic]
2390 clk_domain=system.clk_domain
2392 gic=system.realview.gic
2395 platform=system.realview
2399 pio=system.membus.master[3]
2401 [system.realview.vram]
2404 clk_domain=system.clk_domain
2405 conf_table_reported=false
2411 range=402653184:436207615
2412 port=system.iobus.master[11]
2414 [system.realview.watchdog_fake]
2417 clk_domain=system.clk_domain
2423 pio=system.iobus.master[17]
2428 intr_control=system.intrctrl
2435 clk_domain=system.cpu_clk_domain
2441 snoop_response_latency=1
2443 use_default_range=false
2445 master=system.l2c.cpu_side
2446 slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side
2455 [system.voltage_domain]