tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 eventq_index=0
   5 full_system=true
   6 sim_quantum=0
   7 time_sync_enable=false
   8 time_sync_period=100000000000
   9 time_sync_spin_threshold=100000000
  10
  11 [system]
  12 type=LinuxArmSystem
  13 children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
  14 atags_addr=134217728
  15 boot_loader=/dist/m5/system/binaries/boot_emm.arm
  16 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
  17 boot_release_addr=65528
  18 cache_line_size=64
  19 clk_domain=system.clk_domain
  20 dtb_filename=/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb
  21 early_kernel_symbols=false
  22 enable_context_switch_stats_dump=false
  23 eventq_index=0
  24 flags_addr=469827632
  25 gic_cpu_addr=738205696
  26 have_generic_timer=false
  27 have_large_asid_64=false
  28 have_lpae=false
  29 have_security=false
  30 have_virtualization=false
  31 highest_el_is_64=false
  32 init_param=0
  33 kernel=/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
  34 kernel_addr_check=true
  35 load_addr_mask=268435455
  36 load_offset=2147483648
  37 machine_type=VExpress_EMM
  38 mem_mode=timing
  39 mem_ranges=2147483648:2415919103
  40 memories=system.physmem system.realview.nvmem system.realview.vram
  41 mmap_using_noreserve=false
  42 multi_proc=true
  43 num_work_ids=16
  44 panic_on_oops=true
  45 panic_on_panic=true
  46 phys_addr_range_64=40
  47 readfile=/z/stever/hg/gem5/tests/halt.sh
  48 reset_addr_64=0
  49 symbolfile=
  50 work_begin_ckpt_count=0
  51 work_begin_cpu_id_exit=-1
  52 work_begin_exit_count=0
  53 work_cpus_ckpt_count=0
  54 work_end_ckpt_count=0
  55 work_end_exit_count=0
  56 work_item_id=-1
  57 system_port=system.membus.slave[1]
  58
  59 [system.bridge]
  60 type=Bridge
  61 clk_domain=system.clk_domain
  62 delay=50000
  63 eventq_index=0
  64 ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
  65 req_size=16
  66 resp_size=16
  67 master=system.iobus.slave[0]
  68 slave=system.membus.master[0]
  69
  70 [system.cf0]
  71 type=IdeDisk
  72 children=image
  73 delay=1000000
  74 driveID=master
  75 eventq_index=0
  76 image=system.cf0.image
  77
  78 [system.cf0.image]
  79 type=CowDiskImage
  80 children=child
  81 child=system.cf0.image.child
  82 eventq_index=0
  83 image_file=
  84 read_only=false
  85 table_size=65536
  86
  87 [system.cf0.image.child]
  88 type=RawDiskImage
  89 eventq_index=0
  90 image_file=/dist/m5/system/disks/linux-aarch32-ael.img
  91 read_only=true
  92
  93 [system.clk_domain]
  94 type=SrcClockDomain
  95 clock=1000
  96 domain_id=-1
  97 eventq_index=0
  98 init_perf_level=0
  99 voltage_domain=system.voltage_domain
 100
 101 [system.cpu0]
 102 type=MinorCPU
 103 children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
 104 branchPred=system.cpu0.branchPred
 105 checker=Null
 106 clk_domain=system.cpu_clk_domain
 107 cpu_id=0
 108 decodeCycleInput=true
 109 decodeInputBufferSize=3
 110 decodeInputWidth=2
 111 decodeToExecuteForwardDelay=1
 112 do_checkpoint_insts=true
 113 do_quiesce=true
 114 do_statistics_insts=true
 115 dstage2_mmu=system.cpu0.dstage2_mmu
 116 dtb=system.cpu0.dtb
 117 enableIdling=true
 118 eventq_index=0
 119 executeAllowEarlyMemoryIssue=true
 120 executeBranchDelay=1
 121 executeCommitLimit=2
 122 executeCycleInput=true
 123 executeFuncUnits=system.cpu0.executeFuncUnits
 124 executeInputBufferSize=7
 125 executeInputWidth=2
 126 executeIssueLimit=2
 127 executeLSQMaxStoreBufferStoresPerCycle=2
 128 executeLSQRequestsQueueSize=1
 129 executeLSQStoreBufferSize=5
 130 executeLSQTransfersQueueSize=2
 131 executeMaxAccessesInMemory=2
 132 executeMemoryCommitLimit=1
 133 executeMemoryIssueLimit=1
 134 executeMemoryWidth=0
 135 executeSetTraceTimeOnCommit=true
 136 executeSetTraceTimeOnIssue=false
 137 fetch1FetchLimit=1
 138 fetch1LineSnapWidth=0
 139 fetch1LineWidth=0
 140 fetch1ToFetch2BackwardDelay=1
 141 fetch1ToFetch2ForwardDelay=1
 142 fetch2CycleInput=true
 143 fetch2InputBufferSize=2
 144 fetch2ToDecodeForwardDelay=1
 145 function_trace=false
 146 function_trace_start=0
 147 interrupts=system.cpu0.interrupts
 148 isa=system.cpu0.isa
 149 istage2_mmu=system.cpu0.istage2_mmu
 150 itb=system.cpu0.itb
 151 max_insts_all_threads=0
 152 max_insts_any_thread=0
 153 max_loads_all_threads=0
 154 max_loads_any_thread=0
 155 numThreads=1
 156 profile=0
 157 progress_interval=0
 158 simpoint_start_insts=
 159 socket_id=0
 160 switched_out=false
 161 system=system
 162 tracer=system.cpu0.tracer
 163 workload=
 164 dcache_port=system.cpu0.dcache.cpu_side
 165 icache_port=system.cpu0.icache.cpu_side
 166
 167 [system.cpu0.branchPred]
 168 type=BranchPredictor
 169 BTBEntries=4096
 170 BTBTagSize=16
 171 RASSize=16
 172 choiceCtrBits=2
 173 choicePredictorSize=8192
 174 eventq_index=0
 175 globalCtrBits=2
 176 globalPredictorSize=8192
 177 instShiftAmt=2
 178 localCtrBits=2
 179 localHistoryTableSize=2048
 180 localPredictorSize=2048
 181 numThreads=1
 182 predType=tournament
 183
 184 [system.cpu0.dcache]
 185 type=BaseCache
 186 children=tags
 187 addr_ranges=0:18446744073709551615
 188 assoc=2
 189 clk_domain=system.cpu_clk_domain
 190 demand_mshr_reserve=1
 191 eventq_index=0
 192 forward_snoops=true
 193 hit_latency=2
 194 is_top_level=true
 195 max_miss_count=0
 196 mshrs=6
 197 prefetch_on_access=false
 198 prefetcher=Null
 199 response_latency=2
 200 sequential_access=false
 201 size=32768
 202 system=system
 203 tags=system.cpu0.dcache.tags
 204 tgts_per_mshr=8
 205 two_queue=false
 206 write_buffers=16
 207 cpu_side=system.cpu0.dcache_port
 208 mem_side=system.cpu0.toL2Bus.slave[1]
 209
 210 [system.cpu0.dcache.tags]
 211 type=LRU
 212 assoc=2
 213 block_size=64
 214 clk_domain=system.cpu_clk_domain
 215 eventq_index=0
 216 hit_latency=2
 217 sequential_access=false
 218 size=32768
 219
 220 [system.cpu0.dstage2_mmu]
 221 type=ArmStage2MMU
 222 children=stage2_tlb
 223 eventq_index=0
 224 stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb
 225 sys=system
 226 tlb=system.cpu0.dtb
 227
 228 [system.cpu0.dstage2_mmu.stage2_tlb]
 229 type=ArmTLB
 230 children=walker
 231 eventq_index=0
 232 is_stage2=true
 233 size=32
 234 walker=system.cpu0.dstage2_mmu.stage2_tlb.walker
 235
 236 [system.cpu0.dstage2_mmu.stage2_tlb.walker]
 237 type=ArmTableWalker
 238 clk_domain=system.cpu_clk_domain
 239 eventq_index=0
 240 is_stage2=true
 241 num_squash_per_cycle=2
 242 sys=system
 243
 244 [system.cpu0.dtb]
 245 type=ArmTLB
 246 children=walker
 247 eventq_index=0
 248 is_stage2=false
 249 size=64
 250 walker=system.cpu0.dtb.walker
 251
 252 [system.cpu0.dtb.walker]
 253 type=ArmTableWalker
 254 clk_domain=system.cpu_clk_domain
 255 eventq_index=0
 256 is_stage2=false
 257 num_squash_per_cycle=2
 258 sys=system
 259 port=system.cpu0.toL2Bus.slave[3]
 260
 261 [system.cpu0.executeFuncUnits]
 262 type=MinorFUPool
 263 children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
 264 eventq_index=0
 265 funcUnits=system.cpu0.executeFuncUnits.funcUnits0 system.cpu0.executeFuncUnits.funcUnits1 system.cpu0.executeFuncUnits.funcUnits2 system.cpu0.executeFuncUnits.funcUnits3 system.cpu0.executeFuncUnits.funcUnits4 system.cpu0.executeFuncUnits.funcUnits5 system.cpu0.executeFuncUnits.funcUnits6
 266
 267 [system.cpu0.executeFuncUnits.funcUnits0]
 268 type=MinorFU
 269 children=opClasses timings
 270 cantForwardFromFUIndices=
 271 eventq_index=0
 272 issueLat=1
 273 opClasses=system.cpu0.executeFuncUnits.funcUnits0.opClasses
 274 opLat=3
 275 timings=system.cpu0.executeFuncUnits.funcUnits0.timings
 276
 277 [system.cpu0.executeFuncUnits.funcUnits0.opClasses]
 278 type=MinorOpClassSet
 279 children=opClasses
 280 eventq_index=0
 281 opClasses=system.cpu0.executeFuncUnits.funcUnits0.opClasses.opClasses
 282
 283 [system.cpu0.executeFuncUnits.funcUnits0.opClasses.opClasses]
 284 type=MinorOpClass
 285 eventq_index=0
 286 opClass=IntAlu
 287
 288 [system.cpu0.executeFuncUnits.funcUnits0.timings]
 289 type=MinorFUTiming
 290 children=opClasses
 291 description=Int
 292 eventq_index=0
 293 extraAssumedLat=0
 294 extraCommitLat=0
 295 extraCommitLatExpr=Null
 296 mask=0
 297 match=0
 298 opClasses=system.cpu0.executeFuncUnits.funcUnits0.timings.opClasses
 299 srcRegsRelativeLats=2
 300 suppress=false
 301
 302 [system.cpu0.executeFuncUnits.funcUnits0.timings.opClasses]
 303 type=MinorOpClassSet
 304 eventq_index=0
 305 opClasses=
 306
 307 [system.cpu0.executeFuncUnits.funcUnits1]
 308 type=MinorFU
 309 children=opClasses timings
 310 cantForwardFromFUIndices=
 311 eventq_index=0
 312 issueLat=1
 313 opClasses=system.cpu0.executeFuncUnits.funcUnits1.opClasses
 314 opLat=3
 315 timings=system.cpu0.executeFuncUnits.funcUnits1.timings
 316
 317 [system.cpu0.executeFuncUnits.funcUnits1.opClasses]
 318 type=MinorOpClassSet
 319 children=opClasses
 320 eventq_index=0
 321 opClasses=system.cpu0.executeFuncUnits.funcUnits1.opClasses.opClasses
 322
 323 [system.cpu0.executeFuncUnits.funcUnits1.opClasses.opClasses]
 324 type=MinorOpClass
 325 eventq_index=0
 326 opClass=IntAlu
 327
 328 [system.cpu0.executeFuncUnits.funcUnits1.timings]
 329 type=MinorFUTiming
 330 children=opClasses
 331 description=Int
 332 eventq_index=0
 333 extraAssumedLat=0
 334 extraCommitLat=0
 335 extraCommitLatExpr=Null
 336 mask=0
 337 match=0
 338 opClasses=system.cpu0.executeFuncUnits.funcUnits1.timings.opClasses
 339 srcRegsRelativeLats=2
 340 suppress=false
 341
 342 [system.cpu0.executeFuncUnits.funcUnits1.timings.opClasses]
 343 type=MinorOpClassSet
 344 eventq_index=0
 345 opClasses=
 346
 347 [system.cpu0.executeFuncUnits.funcUnits2]
 348 type=MinorFU
 349 children=opClasses timings
 350 cantForwardFromFUIndices=
 351 eventq_index=0
 352 issueLat=1
 353 opClasses=system.cpu0.executeFuncUnits.funcUnits2.opClasses
 354 opLat=3
 355 timings=system.cpu0.executeFuncUnits.funcUnits2.timings
 356
 357 [system.cpu0.executeFuncUnits.funcUnits2.opClasses]
 358 type=MinorOpClassSet
 359 children=opClasses
 360 eventq_index=0
 361 opClasses=system.cpu0.executeFuncUnits.funcUnits2.opClasses.opClasses
 362
 363 [system.cpu0.executeFuncUnits.funcUnits2.opClasses.opClasses]
 364 type=MinorOpClass
 365 eventq_index=0
 366 opClass=IntMult
 367
 368 [system.cpu0.executeFuncUnits.funcUnits2.timings]
 369 type=MinorFUTiming
 370 children=opClasses
 371 description=Mul
 372 eventq_index=0
 373 extraAssumedLat=0
 374 extraCommitLat=0
 375 extraCommitLatExpr=Null
 376 mask=0
 377 match=0
 378 opClasses=system.cpu0.executeFuncUnits.funcUnits2.timings.opClasses
 379 srcRegsRelativeLats=0
 380 suppress=false
 381
 382 [system.cpu0.executeFuncUnits.funcUnits2.timings.opClasses]
 383 type=MinorOpClassSet
 384 eventq_index=0
 385 opClasses=
 386
 387 [system.cpu0.executeFuncUnits.funcUnits3]
 388 type=MinorFU
 389 children=opClasses
 390 cantForwardFromFUIndices=
 391 eventq_index=0
 392 issueLat=9
 393 opClasses=system.cpu0.executeFuncUnits.funcUnits3.opClasses
 394 opLat=9
 395 timings=
 396
 397 [system.cpu0.executeFuncUnits.funcUnits3.opClasses]
 398 type=MinorOpClassSet
 399 children=opClasses
 400 eventq_index=0
 401 opClasses=system.cpu0.executeFuncUnits.funcUnits3.opClasses.opClasses
 402
 403 [system.cpu0.executeFuncUnits.funcUnits3.opClasses.opClasses]
 404 type=MinorOpClass
 405 eventq_index=0
 406 opClass=IntDiv
 407
 408 [system.cpu0.executeFuncUnits.funcUnits4]
 409 type=MinorFU
 410 children=opClasses timings
 411 cantForwardFromFUIndices=
 412 eventq_index=0
 413 issueLat=1
 414 opClasses=system.cpu0.executeFuncUnits.funcUnits4.opClasses
 415 opLat=6
 416 timings=system.cpu0.executeFuncUnits.funcUnits4.timings
 417
 418 [system.cpu0.executeFuncUnits.funcUnits4.opClasses]
 419 type=MinorOpClassSet
 420 children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
 421 eventq_index=0
 422 opClasses=system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses25
 423
 424 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses00]
 425 type=MinorOpClass
 426 eventq_index=0
 427 opClass=FloatAdd
 428
 429 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses01]
 430 type=MinorOpClass
 431 eventq_index=0
 432 opClass=FloatCmp
 433
 434 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses02]
 435 type=MinorOpClass
 436 eventq_index=0
 437 opClass=FloatCvt
 438
 439 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses03]
 440 type=MinorOpClass
 441 eventq_index=0
 442 opClass=FloatMult
 443
 444 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses04]
 445 type=MinorOpClass
 446 eventq_index=0
 447 opClass=FloatDiv
 448
 449 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses05]
 450 type=MinorOpClass
 451 eventq_index=0
 452 opClass=FloatSqrt
 453
 454 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses06]
 455 type=MinorOpClass
 456 eventq_index=0
 457 opClass=SimdAdd
 458
 459 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses07]
 460 type=MinorOpClass
 461 eventq_index=0
 462 opClass=SimdAddAcc
 463
 464 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses08]
 465 type=MinorOpClass
 466 eventq_index=0
 467 opClass=SimdAlu
 468
 469 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses09]
 470 type=MinorOpClass
 471 eventq_index=0
 472 opClass=SimdCmp
 473
 474 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses10]
 475 type=MinorOpClass
 476 eventq_index=0
 477 opClass=SimdCvt
 478
 479 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses11]
 480 type=MinorOpClass
 481 eventq_index=0
 482 opClass=SimdMisc
 483
 484 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses12]
 485 type=MinorOpClass
 486 eventq_index=0
 487 opClass=SimdMult
 488
 489 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses13]
 490 type=MinorOpClass
 491 eventq_index=0
 492 opClass=SimdMultAcc
 493
 494 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses14]
 495 type=MinorOpClass
 496 eventq_index=0
 497 opClass=SimdShift
 498
 499 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses15]
 500 type=MinorOpClass
 501 eventq_index=0
 502 opClass=SimdShiftAcc
 503
 504 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses16]
 505 type=MinorOpClass
 506 eventq_index=0
 507 opClass=SimdSqrt
 508
 509 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses17]
 510 type=MinorOpClass
 511 eventq_index=0
 512 opClass=SimdFloatAdd
 513
 514 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses18]
 515 type=MinorOpClass
 516 eventq_index=0
 517 opClass=SimdFloatAlu
 518
 519 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses19]
 520 type=MinorOpClass
 521 eventq_index=0
 522 opClass=SimdFloatCmp
 523
 524 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses20]
 525 type=MinorOpClass
 526 eventq_index=0
 527 opClass=SimdFloatCvt
 528
 529 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses21]
 530 type=MinorOpClass
 531 eventq_index=0
 532 opClass=SimdFloatDiv
 533
 534 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses22]
 535 type=MinorOpClass
 536 eventq_index=0
 537 opClass=SimdFloatMisc
 538
 539 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses23]
 540 type=MinorOpClass
 541 eventq_index=0
 542 opClass=SimdFloatMult
 543
 544 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses24]
 545 type=MinorOpClass
 546 eventq_index=0
 547 opClass=SimdFloatMultAcc
 548
 549 [system.cpu0.executeFuncUnits.funcUnits4.opClasses.opClasses25]
 550 type=MinorOpClass
 551 eventq_index=0
 552 opClass=SimdFloatSqrt
 553
 554 [system.cpu0.executeFuncUnits.funcUnits4.timings]
 555 type=MinorFUTiming
 556 children=opClasses
 557 description=FloatSimd
 558 eventq_index=0
 559 extraAssumedLat=0
 560 extraCommitLat=0
 561 extraCommitLatExpr=Null
 562 mask=0
 563 match=0
 564 opClasses=system.cpu0.executeFuncUnits.funcUnits4.timings.opClasses
 565 srcRegsRelativeLats=2
 566 suppress=false
 567
 568 [system.cpu0.executeFuncUnits.funcUnits4.timings.opClasses]
 569 type=MinorOpClassSet
 570 eventq_index=0
 571 opClasses=
 572
 573 [system.cpu0.executeFuncUnits.funcUnits5]
 574 type=MinorFU
 575 children=opClasses timings
 576 cantForwardFromFUIndices=
 577 eventq_index=0
 578 issueLat=1
 579 opClasses=system.cpu0.executeFuncUnits.funcUnits5.opClasses
 580 opLat=1
 581 timings=system.cpu0.executeFuncUnits.funcUnits5.timings
 582
 583 [system.cpu0.executeFuncUnits.funcUnits5.opClasses]
 584 type=MinorOpClassSet
 585 children=opClasses0 opClasses1
 586 eventq_index=0
 587 opClasses=system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses1
 588
 589 [system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses0]
 590 type=MinorOpClass
 591 eventq_index=0
 592 opClass=MemRead
 593
 594 [system.cpu0.executeFuncUnits.funcUnits5.opClasses.opClasses1]
 595 type=MinorOpClass
 596 eventq_index=0
 597 opClass=MemWrite
 598
 599 [system.cpu0.executeFuncUnits.funcUnits5.timings]
 600 type=MinorFUTiming
 601 children=opClasses
 602 description=Mem
 603 eventq_index=0
 604 extraAssumedLat=2
 605 extraCommitLat=0
 606 extraCommitLatExpr=Null
 607 mask=0
 608 match=0
 609 opClasses=system.cpu0.executeFuncUnits.funcUnits5.timings.opClasses
 610 srcRegsRelativeLats=1
 611 suppress=false
 612
 613 [system.cpu0.executeFuncUnits.funcUnits5.timings.opClasses]
 614 type=MinorOpClassSet
 615 eventq_index=0
 616 opClasses=
 617
 618 [system.cpu0.executeFuncUnits.funcUnits6]
 619 type=MinorFU
 620 children=opClasses
 621 cantForwardFromFUIndices=
 622 eventq_index=0
 623 issueLat=1
 624 opClasses=system.cpu0.executeFuncUnits.funcUnits6.opClasses
 625 opLat=1
 626 timings=
 627
 628 [system.cpu0.executeFuncUnits.funcUnits6.opClasses]
 629 type=MinorOpClassSet
 630 children=opClasses0 opClasses1
 631 eventq_index=0
 632 opClasses=system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses1
 633
 634 [system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses0]
 635 type=MinorOpClass
 636 eventq_index=0
 637 opClass=IprAccess
 638
 639 [system.cpu0.executeFuncUnits.funcUnits6.opClasses.opClasses1]
 640 type=MinorOpClass
 641 eventq_index=0
 642 opClass=InstPrefetch
 643
 644 [system.cpu0.icache]
 645 type=BaseCache
 646 children=tags
 647 addr_ranges=0:18446744073709551615
 648 assoc=2
 649 clk_domain=system.cpu_clk_domain
 650 demand_mshr_reserve=1
 651 eventq_index=0
 652 forward_snoops=true
 653 hit_latency=1
 654 is_top_level=true
 655 max_miss_count=0
 656 mshrs=2
 657 prefetch_on_access=false
 658 prefetcher=Null
 659 response_latency=1
 660 sequential_access=false
 661 size=32768
 662 system=system
 663 tags=system.cpu0.icache.tags
 664 tgts_per_mshr=8
 665 two_queue=false
 666 write_buffers=8
 667 cpu_side=system.cpu0.icache_port
 668 mem_side=system.cpu0.toL2Bus.slave[0]
 669
 670 [system.cpu0.icache.tags]
 671 type=LRU
 672 assoc=2
 673 block_size=64
 674 clk_domain=system.cpu_clk_domain
 675 eventq_index=0
 676 hit_latency=1
 677 sequential_access=false
 678 size=32768
 679
 680 [system.cpu0.interrupts]
 681 type=ArmInterrupts
 682 eventq_index=0
 683
 684 [system.cpu0.isa]
 685 type=ArmISA
 686 eventq_index=0
 687 fpsid=1090793632
 688 id_aa64afr0_el1=0
 689 id_aa64afr1_el1=0
 690 id_aa64dfr0_el1=1052678
 691 id_aa64dfr1_el1=0
 692 id_aa64isar0_el1=0
 693 id_aa64isar1_el1=0
 694 id_aa64mmfr0_el1=15728642
 695 id_aa64mmfr1_el1=0
 696 id_aa64pfr0_el1=17
 697 id_aa64pfr1_el1=0
 698 id_isar0=34607377
 699 id_isar1=34677009
 700 id_isar2=555950401
 701 id_isar3=17899825
 702 id_isar4=268501314
 703 id_isar5=0
 704 id_mmfr0=270536963
 705 id_mmfr1=0
 706 id_mmfr2=19070976
 707 id_mmfr3=34611729
 708 id_pfr0=49
 709 id_pfr1=4113
 710 midr=1091551472
 711 pmu=Null
 712 system=system
 713
 714 [system.cpu0.istage2_mmu]
 715 type=ArmStage2MMU
 716 children=stage2_tlb
 717 eventq_index=0
 718 stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb
 719 sys=system
 720 tlb=system.cpu0.itb
 721
 722 [system.cpu0.istage2_mmu.stage2_tlb]
 723 type=ArmTLB
 724 children=walker
 725 eventq_index=0
 726 is_stage2=true
 727 size=32
 728 walker=system.cpu0.istage2_mmu.stage2_tlb.walker
 729
 730 [system.cpu0.istage2_mmu.stage2_tlb.walker]
 731 type=ArmTableWalker
 732 clk_domain=system.cpu_clk_domain
 733 eventq_index=0
 734 is_stage2=true
 735 num_squash_per_cycle=2
 736 sys=system
 737
 738 [system.cpu0.itb]
 739 type=ArmTLB
 740 children=walker
 741 eventq_index=0
 742 is_stage2=false
 743 size=64
 744 walker=system.cpu0.itb.walker
 745
 746 [system.cpu0.itb.walker]
 747 type=ArmTableWalker
 748 clk_domain=system.cpu_clk_domain
 749 eventq_index=0
 750 is_stage2=false
 751 num_squash_per_cycle=2
 752 sys=system
 753 port=system.cpu0.toL2Bus.slave[2]
 754
 755 [system.cpu0.l2cache]
 756 type=BaseCache
 757 children=prefetcher tags
 758 addr_ranges=0:18446744073709551615
 759 assoc=16
 760 clk_domain=system.cpu_clk_domain
 761 demand_mshr_reserve=1
 762 eventq_index=0
 763 forward_snoops=true
 764 hit_latency=12
 765 is_top_level=false
 766 max_miss_count=0
 767 mshrs=16
 768 prefetch_on_access=true
 769 prefetcher=system.cpu0.l2cache.prefetcher
 770 response_latency=12
 771 sequential_access=false
 772 size=1048576
 773 system=system
 774 tags=system.cpu0.l2cache.tags
 775 tgts_per_mshr=8
 776 two_queue=false
 777 write_buffers=8
 778 cpu_side=system.cpu0.toL2Bus.master[0]
 779 mem_side=system.toL2Bus.slave[0]
 780
 781 [system.cpu0.l2cache.prefetcher]
 782 type=StridePrefetcher
 783 cache_snoop=false
 784 clk_domain=system.cpu_clk_domain
 785 degree=8
 786 eventq_index=0
 787 latency=1
 788 max_conf=7
 789 min_conf=0
 790 on_data=true
 791 on_inst=true
 792 on_miss=false
 793 on_read=true
 794 on_write=true
 795 queue_filter=true
 796 queue_size=32
 797 queue_squash=true
 798 start_conf=4
 799 sys=system
 800 table_assoc=4
 801 table_sets=16
 802 tag_prefetch=true
 803 thresh_conf=4
 804 use_master_id=true
 805
 806 [system.cpu0.l2cache.tags]
 807 type=RandomRepl
 808 assoc=16
 809 block_size=64
 810 clk_domain=system.cpu_clk_domain
 811 eventq_index=0
 812 hit_latency=12
 813 sequential_access=false
 814 size=1048576
 815
 816 [system.cpu0.toL2Bus]
 817 type=CoherentXBar
 818 clk_domain=system.cpu_clk_domain
 819 eventq_index=0
 820 forward_latency=0
 821 frontend_latency=1
 822 response_latency=1
 823 snoop_filter=Null
 824 snoop_response_latency=1
 825 system=system
 826 use_default_range=false
 827 width=32
 828 master=system.cpu0.l2cache.cpu_side
 829 slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
 830
 831 [system.cpu0.tracer]
 832 type=ExeTracer
 833 eventq_index=0
 834
 835 [system.cpu1]
 836 type=MinorCPU
 837 children=branchPred dcache dstage2_mmu dtb executeFuncUnits icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
 838 branchPred=system.cpu1.branchPred
 839 checker=Null
 840 clk_domain=system.cpu_clk_domain
 841 cpu_id=1
 842 decodeCycleInput=true
 843 decodeInputBufferSize=3
 844 decodeInputWidth=2
 845 decodeToExecuteForwardDelay=1
 846 do_checkpoint_insts=true
 847 do_quiesce=true
 848 do_statistics_insts=true
 849 dstage2_mmu=system.cpu1.dstage2_mmu
 850 dtb=system.cpu1.dtb
 851 enableIdling=true
 852 eventq_index=0
 853 executeAllowEarlyMemoryIssue=true
 854 executeBranchDelay=1
 855 executeCommitLimit=2
 856 executeCycleInput=true
 857 executeFuncUnits=system.cpu1.executeFuncUnits
 858 executeInputBufferSize=7
 859 executeInputWidth=2
 860 executeIssueLimit=2
 861 executeLSQMaxStoreBufferStoresPerCycle=2
 862 executeLSQRequestsQueueSize=1
 863 executeLSQStoreBufferSize=5
 864 executeLSQTransfersQueueSize=2
 865 executeMaxAccessesInMemory=2
 866 executeMemoryCommitLimit=1
 867 executeMemoryIssueLimit=1
 868 executeMemoryWidth=0
 869 executeSetTraceTimeOnCommit=true
 870 executeSetTraceTimeOnIssue=false
 871 fetch1FetchLimit=1
 872 fetch1LineSnapWidth=0
 873 fetch1LineWidth=0
 874 fetch1ToFetch2BackwardDelay=1
 875 fetch1ToFetch2ForwardDelay=1
 876 fetch2CycleInput=true
 877 fetch2InputBufferSize=2
 878 fetch2ToDecodeForwardDelay=1
 879 function_trace=false
 880 function_trace_start=0
 881 interrupts=system.cpu1.interrupts
 882 isa=system.cpu1.isa
 883 istage2_mmu=system.cpu1.istage2_mmu
 884 itb=system.cpu1.itb
 885 max_insts_all_threads=0
 886 max_insts_any_thread=0
 887 max_loads_all_threads=0
 888 max_loads_any_thread=0
 889 numThreads=1
 890 profile=0
 891 progress_interval=0
 892 simpoint_start_insts=
 893 socket_id=0
 894 switched_out=false
 895 system=system
 896 tracer=system.cpu1.tracer
 897 workload=
 898 dcache_port=system.cpu1.dcache.cpu_side
 899 icache_port=system.cpu1.icache.cpu_side
 900
 901 [system.cpu1.branchPred]
 902 type=BranchPredictor
 903 BTBEntries=4096
 904 BTBTagSize=16
 905 RASSize=16
 906 choiceCtrBits=2
 907 choicePredictorSize=8192
 908 eventq_index=0
 909 globalCtrBits=2
 910 globalPredictorSize=8192
 911 instShiftAmt=2
 912 localCtrBits=2
 913 localHistoryTableSize=2048
 914 localPredictorSize=2048
 915 numThreads=1
 916 predType=tournament
 917
 918 [system.cpu1.dcache]
 919 type=BaseCache
 920 children=tags
 921 addr_ranges=0:18446744073709551615
 922 assoc=2
 923 clk_domain=system.cpu_clk_domain
 924 demand_mshr_reserve=1
 925 eventq_index=0
 926 forward_snoops=true
 927 hit_latency=2
 928 is_top_level=true
 929 max_miss_count=0
 930 mshrs=6
 931 prefetch_on_access=false
 932 prefetcher=Null
 933 response_latency=2
 934 sequential_access=false
 935 size=32768
 936 system=system
 937 tags=system.cpu1.dcache.tags
 938 tgts_per_mshr=8
 939 two_queue=false
 940 write_buffers=16
 941 cpu_side=system.cpu1.dcache_port
 942 mem_side=system.cpu1.toL2Bus.slave[1]
 943
 944 [system.cpu1.dcache.tags]
 945 type=LRU
 946 assoc=2
 947 block_size=64
 948 clk_domain=system.cpu_clk_domain
 949 eventq_index=0
 950 hit_latency=2
 951 sequential_access=false
 952 size=32768
 953
 954 [system.cpu1.dstage2_mmu]
 955 type=ArmStage2MMU
 956 children=stage2_tlb
 957 eventq_index=0
 958 stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb
 959 sys=system
 960 tlb=system.cpu1.dtb
 961
 962 [system.cpu1.dstage2_mmu.stage2_tlb]
 963 type=ArmTLB
 964 children=walker
 965 eventq_index=0
 966 is_stage2=true
 967 size=32
 968 walker=system.cpu1.dstage2_mmu.stage2_tlb.walker
 969
 970 [system.cpu1.dstage2_mmu.stage2_tlb.walker]
 971 type=ArmTableWalker
 972 clk_domain=system.cpu_clk_domain
 973 eventq_index=0
 974 is_stage2=true
 975 num_squash_per_cycle=2
 976 sys=system
 977
 978 [system.cpu1.dtb]
 979 type=ArmTLB
 980 children=walker
 981 eventq_index=0
 982 is_stage2=false
 983 size=64
 984 walker=system.cpu1.dtb.walker
 985
 986 [system.cpu1.dtb.walker]
 987 type=ArmTableWalker
 988 clk_domain=system.cpu_clk_domain
 989 eventq_index=0
 990 is_stage2=false
 991 num_squash_per_cycle=2
 992 sys=system
 993 port=system.cpu1.toL2Bus.slave[3]
 994
 995 [system.cpu1.executeFuncUnits]
 996 type=MinorFUPool
 997 children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
 998 eventq_index=0
 999 funcUnits=system.cpu1.executeFuncUnits.funcUnits0 system.cpu1.executeFuncUnits.funcUnits1 system.cpu1.executeFuncUnits.funcUnits2 system.cpu1.executeFuncUnits.funcUnits3 system.cpu1.executeFuncUnits.funcUnits4 system.cpu1.executeFuncUnits.funcUnits5 system.cpu1.executeFuncUnits.funcUnits6
1000
1001 [system.cpu1.executeFuncUnits.funcUnits0]
1002 type=MinorFU
1003 children=opClasses timings
1004 cantForwardFromFUIndices=
1005 eventq_index=0
1006 issueLat=1
1007 opClasses=system.cpu1.executeFuncUnits.funcUnits0.opClasses
1008 opLat=3
1009 timings=system.cpu1.executeFuncUnits.funcUnits0.timings
1010
1011 [system.cpu1.executeFuncUnits.funcUnits0.opClasses]
1012 type=MinorOpClassSet
1013 children=opClasses
1014 eventq_index=0
1015 opClasses=system.cpu1.executeFuncUnits.funcUnits0.opClasses.opClasses
1016
1017 [system.cpu1.executeFuncUnits.funcUnits0.opClasses.opClasses]
1018 type=MinorOpClass
1019 eventq_index=0
1020 opClass=IntAlu
1021
1022 [system.cpu1.executeFuncUnits.funcUnits0.timings]
1023 type=MinorFUTiming
1024 children=opClasses
1025 description=Int
1026 eventq_index=0
1027 extraAssumedLat=0
1028 extraCommitLat=0
1029 extraCommitLatExpr=Null
1030 mask=0
1031 match=0
1032 opClasses=system.cpu1.executeFuncUnits.funcUnits0.timings.opClasses
1033 srcRegsRelativeLats=2
1034 suppress=false
1035
1036 [system.cpu1.executeFuncUnits.funcUnits0.timings.opClasses]
1037 type=MinorOpClassSet
1038 eventq_index=0
1039 opClasses=
1040
1041 [system.cpu1.executeFuncUnits.funcUnits1]
1042 type=MinorFU
1043 children=opClasses timings
1044 cantForwardFromFUIndices=
1045 eventq_index=0
1046 issueLat=1
1047 opClasses=system.cpu1.executeFuncUnits.funcUnits1.opClasses
1048 opLat=3
1049 timings=system.cpu1.executeFuncUnits.funcUnits1.timings
1050
1051 [system.cpu1.executeFuncUnits.funcUnits1.opClasses]
1052 type=MinorOpClassSet
1053 children=opClasses
1054 eventq_index=0
1055 opClasses=system.cpu1.executeFuncUnits.funcUnits1.opClasses.opClasses
1056
1057 [system.cpu1.executeFuncUnits.funcUnits1.opClasses.opClasses]
1058 type=MinorOpClass
1059 eventq_index=0
1060 opClass=IntAlu
1061
1062 [system.cpu1.executeFuncUnits.funcUnits1.timings]
1063 type=MinorFUTiming
1064 children=opClasses
1065 description=Int
1066 eventq_index=0
1067 extraAssumedLat=0
1068 extraCommitLat=0
1069 extraCommitLatExpr=Null
1070 mask=0
1071 match=0
1072 opClasses=system.cpu1.executeFuncUnits.funcUnits1.timings.opClasses
1073 srcRegsRelativeLats=2
1074 suppress=false
1075
1076 [system.cpu1.executeFuncUnits.funcUnits1.timings.opClasses]
1077 type=MinorOpClassSet
1078 eventq_index=0
1079 opClasses=
1080
1081 [system.cpu1.executeFuncUnits.funcUnits2]
1082 type=MinorFU
1083 children=opClasses timings
1084 cantForwardFromFUIndices=
1085 eventq_index=0
1086 issueLat=1
1087 opClasses=system.cpu1.executeFuncUnits.funcUnits2.opClasses
1088 opLat=3
1089 timings=system.cpu1.executeFuncUnits.funcUnits2.timings
1090
1091 [system.cpu1.executeFuncUnits.funcUnits2.opClasses]
1092 type=MinorOpClassSet
1093 children=opClasses
1094 eventq_index=0
1095 opClasses=system.cpu1.executeFuncUnits.funcUnits2.opClasses.opClasses
1096
1097 [system.cpu1.executeFuncUnits.funcUnits2.opClasses.opClasses]
1098 type=MinorOpClass
1099 eventq_index=0
1100 opClass=IntMult
1101
1102 [system.cpu1.executeFuncUnits.funcUnits2.timings]
1103 type=MinorFUTiming
1104 children=opClasses
1105 description=Mul
1106 eventq_index=0
1107 extraAssumedLat=0
1108 extraCommitLat=0
1109 extraCommitLatExpr=Null
1110 mask=0
1111 match=0
1112 opClasses=system.cpu1.executeFuncUnits.funcUnits2.timings.opClasses
1113 srcRegsRelativeLats=0
1114 suppress=false
1115
1116 [system.cpu1.executeFuncUnits.funcUnits2.timings.opClasses]
1117 type=MinorOpClassSet
1118 eventq_index=0
1119 opClasses=
1120
1121 [system.cpu1.executeFuncUnits.funcUnits3]
1122 type=MinorFU
1123 children=opClasses
1124 cantForwardFromFUIndices=
1125 eventq_index=0
1126 issueLat=9
1127 opClasses=system.cpu1.executeFuncUnits.funcUnits3.opClasses
1128 opLat=9
1129 timings=
1130
1131 [system.cpu1.executeFuncUnits.funcUnits3.opClasses]
1132 type=MinorOpClassSet
1133 children=opClasses
1134 eventq_index=0
1135 opClasses=system.cpu1.executeFuncUnits.funcUnits3.opClasses.opClasses
1136
1137 [system.cpu1.executeFuncUnits.funcUnits3.opClasses.opClasses]
1138 type=MinorOpClass
1139 eventq_index=0
1140 opClass=IntDiv
1141
1142 [system.cpu1.executeFuncUnits.funcUnits4]
1143 type=MinorFU
1144 children=opClasses timings
1145 cantForwardFromFUIndices=
1146 eventq_index=0
1147 issueLat=1
1148 opClasses=system.cpu1.executeFuncUnits.funcUnits4.opClasses
1149 opLat=6
1150 timings=system.cpu1.executeFuncUnits.funcUnits4.timings
1151
1152 [system.cpu1.executeFuncUnits.funcUnits4.opClasses]
1153 type=MinorOpClassSet
1154 children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
1155 eventq_index=0
1156 opClasses=system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses25
1157
1158 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses00]
1159 type=MinorOpClass
1160 eventq_index=0
1161 opClass=FloatAdd
1162
1163 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses01]
1164 type=MinorOpClass
1165 eventq_index=0
1166 opClass=FloatCmp
1167
1168 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses02]
1169 type=MinorOpClass
1170 eventq_index=0
1171 opClass=FloatCvt
1172
1173 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses03]
1174 type=MinorOpClass
1175 eventq_index=0
1176 opClass=FloatMult
1177
1178 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses04]
1179 type=MinorOpClass
1180 eventq_index=0
1181 opClass=FloatDiv
1182
1183 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses05]
1184 type=MinorOpClass
1185 eventq_index=0
1186 opClass=FloatSqrt
1187
1188 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses06]
1189 type=MinorOpClass
1190 eventq_index=0
1191 opClass=SimdAdd
1192
1193 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses07]
1194 type=MinorOpClass
1195 eventq_index=0
1196 opClass=SimdAddAcc
1197
1198 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses08]
1199 type=MinorOpClass
1200 eventq_index=0
1201 opClass=SimdAlu
1202
1203 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses09]
1204 type=MinorOpClass
1205 eventq_index=0
1206 opClass=SimdCmp
1207
1208 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses10]
1209 type=MinorOpClass
1210 eventq_index=0
1211 opClass=SimdCvt
1212
1213 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses11]
1214 type=MinorOpClass
1215 eventq_index=0
1216 opClass=SimdMisc
1217
1218 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses12]
1219 type=MinorOpClass
1220 eventq_index=0
1221 opClass=SimdMult
1222
1223 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses13]
1224 type=MinorOpClass
1225 eventq_index=0
1226 opClass=SimdMultAcc
1227
1228 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses14]
1229 type=MinorOpClass
1230 eventq_index=0
1231 opClass=SimdShift
1232
1233 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses15]
1234 type=MinorOpClass
1235 eventq_index=0
1236 opClass=SimdShiftAcc
1237
1238 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses16]
1239 type=MinorOpClass
1240 eventq_index=0
1241 opClass=SimdSqrt
1242
1243 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses17]
1244 type=MinorOpClass
1245 eventq_index=0
1246 opClass=SimdFloatAdd
1247
1248 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses18]
1249 type=MinorOpClass
1250 eventq_index=0
1251 opClass=SimdFloatAlu
1252
1253 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses19]
1254 type=MinorOpClass
1255 eventq_index=0
1256 opClass=SimdFloatCmp
1257
1258 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses20]
1259 type=MinorOpClass
1260 eventq_index=0
1261 opClass=SimdFloatCvt
1262
1263 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses21]
1264 type=MinorOpClass
1265 eventq_index=0
1266 opClass=SimdFloatDiv
1267
1268 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses22]
1269 type=MinorOpClass
1270 eventq_index=0
1271 opClass=SimdFloatMisc
1272
1273 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses23]
1274 type=MinorOpClass
1275 eventq_index=0
1276 opClass=SimdFloatMult
1277
1278 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses24]
1279 type=MinorOpClass
1280 eventq_index=0
1281 opClass=SimdFloatMultAcc
1282
1283 [system.cpu1.executeFuncUnits.funcUnits4.opClasses.opClasses25]
1284 type=MinorOpClass
1285 eventq_index=0
1286 opClass=SimdFloatSqrt
1287
1288 [system.cpu1.executeFuncUnits.funcUnits4.timings]
1289 type=MinorFUTiming
1290 children=opClasses
1291 description=FloatSimd
1292 eventq_index=0
1293 extraAssumedLat=0
1294 extraCommitLat=0
1295 extraCommitLatExpr=Null
1296 mask=0
1297 match=0
1298 opClasses=system.cpu1.executeFuncUnits.funcUnits4.timings.opClasses
1299 srcRegsRelativeLats=2
1300 suppress=false
1301
1302 [system.cpu1.executeFuncUnits.funcUnits4.timings.opClasses]
1303 type=MinorOpClassSet
1304 eventq_index=0
1305 opClasses=
1306
1307 [system.cpu1.executeFuncUnits.funcUnits5]
1308 type=MinorFU
1309 children=opClasses timings
1310 cantForwardFromFUIndices=
1311 eventq_index=0
1312 issueLat=1
1313 opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses
1314 opLat=1
1315 timings=system.cpu1.executeFuncUnits.funcUnits5.timings
1316
1317 [system.cpu1.executeFuncUnits.funcUnits5.opClasses]
1318 type=MinorOpClassSet
1319 children=opClasses0 opClasses1
1320 eventq_index=0
1321 opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses1
1322
1323 [system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses0]
1324 type=MinorOpClass
1325 eventq_index=0
1326 opClass=MemRead
1327
1328 [system.cpu1.executeFuncUnits.funcUnits5.opClasses.opClasses1]
1329 type=MinorOpClass
1330 eventq_index=0
1331 opClass=MemWrite
1332
1333 [system.cpu1.executeFuncUnits.funcUnits5.timings]
1334 type=MinorFUTiming
1335 children=opClasses
1336 description=Mem
1337 eventq_index=0
1338 extraAssumedLat=2
1339 extraCommitLat=0
1340 extraCommitLatExpr=Null
1341 mask=0
1342 match=0
1343 opClasses=system.cpu1.executeFuncUnits.funcUnits5.timings.opClasses
1344 srcRegsRelativeLats=1
1345 suppress=false
1346
1347 [system.cpu1.executeFuncUnits.funcUnits5.timings.opClasses]
1348 type=MinorOpClassSet
1349 eventq_index=0
1350 opClasses=
1351
1352 [system.cpu1.executeFuncUnits.funcUnits6]
1353 type=MinorFU
1354 children=opClasses
1355 cantForwardFromFUIndices=
1356 eventq_index=0
1357 issueLat=1
1358 opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses
1359 opLat=1
1360 timings=
1361
1362 [system.cpu1.executeFuncUnits.funcUnits6.opClasses]
1363 type=MinorOpClassSet
1364 children=opClasses0 opClasses1
1365 eventq_index=0
1366 opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses1
1367
1368 [system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses0]
1369 type=MinorOpClass
1370 eventq_index=0
1371 opClass=IprAccess
1372
1373 [system.cpu1.executeFuncUnits.funcUnits6.opClasses.opClasses1]
1374 type=MinorOpClass
1375 eventq_index=0
1376 opClass=InstPrefetch
1377
1378 [system.cpu1.icache]
1379 type=BaseCache
1380 children=tags
1381 addr_ranges=0:18446744073709551615
1382 assoc=2
1383 clk_domain=system.cpu_clk_domain
1384 demand_mshr_reserve=1
1385 eventq_index=0
1386 forward_snoops=true
1387 hit_latency=1
1388 is_top_level=true
1389 max_miss_count=0
1390 mshrs=2
1391 prefetch_on_access=false
1392 prefetcher=Null
1393 response_latency=1
1394 sequential_access=false
1395 size=32768
1396 system=system
1397 tags=system.cpu1.icache.tags
1398 tgts_per_mshr=8
1399 two_queue=false
1400 write_buffers=8
1401 cpu_side=system.cpu1.icache_port
1402 mem_side=system.cpu1.toL2Bus.slave[0]
1403
1404 [system.cpu1.icache.tags]
1405 type=LRU
1406 assoc=2
1407 block_size=64
1408 clk_domain=system.cpu_clk_domain
1409 eventq_index=0
1410 hit_latency=1
1411 sequential_access=false
1412 size=32768
1413
1414 [system.cpu1.interrupts]
1415 type=ArmInterrupts
1416 eventq_index=0
1417
1418 [system.cpu1.isa]
1419 type=ArmISA
1420 eventq_index=0
1421 fpsid=1090793632
1422 id_aa64afr0_el1=0
1423 id_aa64afr1_el1=0
1424 id_aa64dfr0_el1=1052678
1425 id_aa64dfr1_el1=0
1426 id_aa64isar0_el1=0
1427 id_aa64isar1_el1=0
1428 id_aa64mmfr0_el1=15728642
1429 id_aa64mmfr1_el1=0
1430 id_aa64pfr0_el1=17
1431 id_aa64pfr1_el1=0
1432 id_isar0=34607377
1433 id_isar1=34677009
1434 id_isar2=555950401
1435 id_isar3=17899825
1436 id_isar4=268501314
1437 id_isar5=0
1438 id_mmfr0=270536963
1439 id_mmfr1=0
1440 id_mmfr2=19070976
1441 id_mmfr3=34611729
1442 id_pfr0=49
1443 id_pfr1=4113
1444 midr=1091551472
1445 pmu=Null
1446 system=system
1447
1448 [system.cpu1.istage2_mmu]
1449 type=ArmStage2MMU
1450 children=stage2_tlb
1451 eventq_index=0
1452 stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
1453 sys=system
1454 tlb=system.cpu1.itb
1455
1456 [system.cpu1.istage2_mmu.stage2_tlb]
1457 type=ArmTLB
1458 children=walker
1459 eventq_index=0
1460 is_stage2=true
1461 size=32
1462 walker=system.cpu1.istage2_mmu.stage2_tlb.walker
1463
1464 [system.cpu1.istage2_mmu.stage2_tlb.walker]
1465 type=ArmTableWalker
1466 clk_domain=system.cpu_clk_domain
1467 eventq_index=0
1468 is_stage2=true
1469 num_squash_per_cycle=2
1470 sys=system
1471
1472 [system.cpu1.itb]
1473 type=ArmTLB
1474 children=walker
1475 eventq_index=0
1476 is_stage2=false
1477 size=64
1478 walker=system.cpu1.itb.walker
1479
1480 [system.cpu1.itb.walker]
1481 type=ArmTableWalker
1482 clk_domain=system.cpu_clk_domain
1483 eventq_index=0
1484 is_stage2=false
1485 num_squash_per_cycle=2
1486 sys=system
1487 port=system.cpu1.toL2Bus.slave[2]
1488
1489 [system.cpu1.l2cache]
1490 type=BaseCache
1491 children=prefetcher tags
1492 addr_ranges=0:18446744073709551615
1493 assoc=16
1494 clk_domain=system.cpu_clk_domain
1495 demand_mshr_reserve=1
1496 eventq_index=0
1497 forward_snoops=true
1498 hit_latency=12
1499 is_top_level=false
1500 max_miss_count=0
1501 mshrs=16
1502 prefetch_on_access=true
1503 prefetcher=system.cpu1.l2cache.prefetcher
1504 response_latency=12
1505 sequential_access=false
1506 size=1048576
1507 system=system
1508 tags=system.cpu1.l2cache.tags
1509 tgts_per_mshr=8
1510 two_queue=false
1511 write_buffers=8
1512 cpu_side=system.cpu1.toL2Bus.master[0]
1513 mem_side=system.toL2Bus.slave[1]
1514
1515 [system.cpu1.l2cache.prefetcher]
1516 type=StridePrefetcher
1517 cache_snoop=false
1518 clk_domain=system.cpu_clk_domain
1519 degree=8
1520 eventq_index=0
1521 latency=1
1522 max_conf=7
1523 min_conf=0
1524 on_data=true
1525 on_inst=true
1526 on_miss=false
1527 on_read=true
1528 on_write=true
1529 queue_filter=true
1530 queue_size=32
1531 queue_squash=true
1532 start_conf=4
1533 sys=system
1534 table_assoc=4
1535 table_sets=16
1536 tag_prefetch=true
1537 thresh_conf=4
1538 use_master_id=true
1539
1540 [system.cpu1.l2cache.tags]
1541 type=RandomRepl
1542 assoc=16
1543 block_size=64
1544 clk_domain=system.cpu_clk_domain
1545 eventq_index=0
1546 hit_latency=12
1547 sequential_access=false
1548 size=1048576
1549
1550 [system.cpu1.toL2Bus]
1551 type=CoherentXBar
1552 clk_domain=system.cpu_clk_domain
1553 eventq_index=0
1554 forward_latency=0
1555 frontend_latency=1
1556 response_latency=1
1557 snoop_filter=Null
1558 snoop_response_latency=1
1559 system=system
1560 use_default_range=false
1561 width=32
1562 master=system.cpu1.l2cache.cpu_side
1563 slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
1564
1565 [system.cpu1.tracer]
1566 type=ExeTracer
1567 eventq_index=0
1568
1569 [system.cpu_clk_domain]
1570 type=SrcClockDomain
1571 clock=500
1572 domain_id=-1
1573 eventq_index=0
1574 init_perf_level=0
1575 voltage_domain=system.voltage_domain
1576
1577 [system.dvfs_handler]
1578 type=DVFSHandler
1579 domains=
1580 enable=false
1581 eventq_index=0
1582 sys_clk_domain=system.clk_domain
1583 transition_latency=100000000
1584
1585 [system.intrctrl]
1586 type=IntrControl
1587 eventq_index=0
1588 sys=system
1589
1590 [system.iobus]
1591 type=NoncoherentXBar
1592 clk_domain=system.clk_domain
1593 eventq_index=0
1594 forward_latency=1
1595 frontend_latency=2
1596 response_latency=2
1597 use_default_range=true
1598 width=16
1599 default=system.realview.pciconfig.pio
1600 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
1601 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
1602
1603 [system.iocache]
1604 type=BaseCache
1605 children=tags
1606 addr_ranges=2147483648:2415919103
1607 assoc=8
1608 clk_domain=system.clk_domain
1609 demand_mshr_reserve=1
1610 eventq_index=0
1611 forward_snoops=false
1612 hit_latency=50
1613 is_top_level=true
1614 max_miss_count=0
1615 mshrs=20
1616 prefetch_on_access=false
1617 prefetcher=Null
1618 response_latency=50
1619 sequential_access=false
1620 size=1024
1621 system=system
1622 tags=system.iocache.tags
1623 tgts_per_mshr=12
1624 two_queue=false
1625 write_buffers=8
1626 cpu_side=system.iobus.master[27]
1627 mem_side=system.membus.slave[3]
1628
1629 [system.iocache.tags]
1630 type=LRU
1631 assoc=8
1632 block_size=64
1633 clk_domain=system.clk_domain
1634 eventq_index=0
1635 hit_latency=50
1636 sequential_access=false
1637 size=1024
1638
1639 [system.l2c]
1640 type=BaseCache
1641 children=tags
1642 addr_ranges=0:18446744073709551615
1643 assoc=8
1644 clk_domain=system.cpu_clk_domain
1645 demand_mshr_reserve=1
1646 eventq_index=0
1647 forward_snoops=true
1648 hit_latency=20
1649 is_top_level=false
1650 max_miss_count=0
1651 mshrs=20
1652 prefetch_on_access=false
1653 prefetcher=Null
1654 response_latency=20
1655 sequential_access=false
1656 size=4194304
1657 system=system
1658 tags=system.l2c.tags
1659 tgts_per_mshr=12
1660 two_queue=false
1661 write_buffers=8
1662 cpu_side=system.toL2Bus.master[0]
1663 mem_side=system.membus.slave[2]
1664
1665 [system.l2c.tags]
1666 type=LRU
1667 assoc=8
1668 block_size=64
1669 clk_domain=system.cpu_clk_domain
1670 eventq_index=0
1671 hit_latency=20
1672 sequential_access=false
1673 size=4194304
1674
1675 [system.membus]
1676 type=CoherentXBar
1677 children=badaddr_responder
1678 clk_domain=system.clk_domain
1679 eventq_index=0
1680 forward_latency=4
1681 frontend_latency=3
1682 response_latency=2
1683 snoop_filter=Null
1684 snoop_response_latency=4
1685 system=system
1686 use_default_range=false
1687 width=16
1688 default=system.membus.badaddr_responder.pio
1689 master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.local_cpu_timer.pio system.realview.vgic.pio system.physmem.port
1690 slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
1691
1692 [system.membus.badaddr_responder]
1693 type=IsaFake
1694 clk_domain=system.clk_domain
1695 eventq_index=0
1696 fake_mem=false
1697 pio_addr=0
1698 pio_latency=100000
1699 pio_size=8
1700 ret_bad_addr=true
1701 ret_data16=65535
1702 ret_data32=4294967295
1703 ret_data64=18446744073709551615
1704 ret_data8=255
1705 system=system
1706 update_data=false
1707 warn_access=warn
1708 pio=system.membus.default
1709
1710 [system.physmem]
1711 type=DRAMCtrl
1712 IDD0=0.075000
1713 IDD02=0.000000
1714 IDD2N=0.050000
1715 IDD2N2=0.000000
1716 IDD2P0=0.000000
1717 IDD2P02=0.000000
1718 IDD2P1=0.000000
1719 IDD2P12=0.000000
1720 IDD3N=0.057000
1721 IDD3N2=0.000000
1722 IDD3P0=0.000000
1723 IDD3P02=0.000000
1724 IDD3P1=0.000000
1725 IDD3P12=0.000000
1726 IDD4R=0.187000
1727 IDD4R2=0.000000
1728 IDD4W=0.165000
1729 IDD4W2=0.000000
1730 IDD5=0.220000
1731 IDD52=0.000000
1732 IDD6=0.000000
1733 IDD62=0.000000
1734 VDD=1.500000
1735 VDD2=0.000000
1736 activation_limit=4
1737 addr_mapping=RoRaBaCoCh
1738 bank_groups_per_rank=0
1739 banks_per_rank=8
1740 burst_length=8
1741 channels=1
1742 clk_domain=system.clk_domain
1743 conf_table_reported=true
1744 device_bus_width=8
1745 device_rowbuffer_size=1024
1746 device_size=536870912
1747 devices_per_rank=8
1748 dll=true
1749 eventq_index=0
1750 in_addr_map=true
1751 max_accesses_per_row=16
1752 mem_sched_policy=frfcfs
1753 min_writes_per_switch=16
1754 null=false
1755 page_policy=open_adaptive
1756 range=2147483648:2415919103
1757 ranks_per_channel=2
1758 read_buffer_size=32
1759 static_backend_latency=10000
1760 static_frontend_latency=10000
1761 tBURST=5000
1762 tCCD_L=0
1763 tCK=1250
1764 tCL=13750
1765 tCS=2500
1766 tRAS=35000
1767 tRCD=13750
1768 tREFI=7800000
1769 tRFC=260000
1770 tRP=13750
1771 tRRD=6000
1772 tRRD_L=0
1773 tRTP=7500
1774 tRTW=2500
1775 tWR=15000
1776 tWTR=7500
1777 tXAW=30000
1778 tXP=0
1779 tXPDLL=0
1780 tXS=0
1781 tXSDLL=0
1782 write_buffer_size=64
1783 write_high_thresh_perc=85
1784 write_low_thresh_perc=50
1785 port=system.membus.master[5]
1786
1787 [system.realview]
1788 type=RealView
1789 children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
1790 eventq_index=0
1791 intrctrl=system.intrctrl
1792 pci_cfg_base=805306368
1793 pci_cfg_gen_offsets=false
1794 pci_io_base=0
1795 system=system
1796
1797 [system.realview.aaci_fake]
1798 type=AmbaFake
1799 amba_id=0
1800 clk_domain=system.clk_domain
1801 eventq_index=0
1802 ignore_access=false
1803 pio_addr=470024192
1804 pio_latency=100000
1805 system=system
1806 pio=system.iobus.master[18]
1807
1808 [system.realview.cf_ctrl]
1809 type=IdeController
1810 BAR0=471465984
1811 BAR0LegacyIO=true
1812 BAR0Size=256
1813 BAR1=471466240
1814 BAR1LegacyIO=true
1815 BAR1Size=4096
1816 BAR2=1
1817 BAR2LegacyIO=false
1818 BAR2Size=8
1819 BAR3=1
1820 BAR3LegacyIO=false
1821 BAR3Size=4
1822 BAR4=1
1823 BAR4LegacyIO=false
1824 BAR4Size=16
1825 BAR5=1
1826 BAR5LegacyIO=false
1827 BAR5Size=0
1828 BIST=0
1829 CacheLineSize=0
1830 CapabilityPtr=0
1831 CardbusCIS=0
1832 ClassCode=1
1833 Command=1
1834 DeviceID=28945
1835 ExpansionROM=0
1836 HeaderType=0
1837 InterruptLine=31
1838 InterruptPin=1
1839 LatencyTimer=0
1840 LegacyIOBase=0
1841 MSICAPBaseOffset=0
1842 MSICAPCapId=0
1843 MSICAPMaskBits=0
1844 MSICAPMsgAddr=0
1845 MSICAPMsgCtrl=0
1846 MSICAPMsgData=0
1847 MSICAPMsgUpperAddr=0
1848 MSICAPNextCapability=0
1849 MSICAPPendingBits=0
1850 MSIXCAPBaseOffset=0
1851 MSIXCAPCapId=0
1852 MSIXCAPNextCapability=0
1853 MSIXMsgCtrl=0
1854 MSIXPbaOffset=0
1855 MSIXTableOffset=0
1856 MaximumLatency=0
1857 MinimumGrant=0
1858 PMCAPBaseOffset=0
1859 PMCAPCapId=0
1860 PMCAPCapabilities=0
1861 PMCAPCtrlStatus=0
1862 PMCAPNextCapability=0
1863 PXCAPBaseOffset=0
1864 PXCAPCapId=0
1865 PXCAPCapabilities=0
1866 PXCAPDevCap2=0
1867 PXCAPDevCapabilities=0
1868 PXCAPDevCtrl=0
1869 PXCAPDevCtrl2=0
1870 PXCAPDevStatus=0
1871 PXCAPLinkCap=0
1872 PXCAPLinkCtrl=0
1873 PXCAPLinkStatus=0
1874 PXCAPNextCapability=0
1875 ProgIF=133
1876 Revision=0
1877 Status=640
1878 SubClassCode=1
1879 SubsystemID=0
1880 SubsystemVendorID=0
1881 VendorID=32902
1882 clk_domain=system.clk_domain
1883 config_latency=20000
1884 ctrl_offset=2
1885 disks=
1886 eventq_index=0
1887 io_shift=2
1888 pci_bus=2
1889 pci_dev=0
1890 pci_func=0
1891 pio_latency=30000
1892 platform=system.realview
1893 system=system
1894 config=system.iobus.master[9]
1895 dma=system.iobus.slave[2]
1896 pio=system.iobus.master[8]
1897
1898 [system.realview.clcd]
1899 type=Pl111
1900 amba_id=1315089
1901 clk_domain=system.clk_domain
1902 enable_capture=true
1903 eventq_index=0
1904 gic=system.realview.gic
1905 int_num=46
1906 pio_addr=471793664
1907 pio_latency=10000
1908 pixel_clock=41667
1909 system=system
1910 vnc=system.vncserver
1911 dma=system.iobus.slave[1]
1912 pio=system.iobus.master[4]
1913
1914 [system.realview.energy_ctrl]
1915 type=EnergyCtrl
1916 clk_domain=system.clk_domain
1917 dvfs_handler=system.dvfs_handler
1918 eventq_index=0
1919 pio_addr=470286336
1920 pio_latency=100000
1921 system=system
1922 pio=system.iobus.master[22]
1923
1924 [system.realview.ethernet]
1925 type=IGbE
1926 BAR0=0
1927 BAR0LegacyIO=false
1928 BAR0Size=131072
1929 BAR1=0
1930 BAR1LegacyIO=false
1931 BAR1Size=0
1932 BAR2=0
1933 BAR2LegacyIO=false
1934 BAR2Size=0
1935 BAR3=0
1936 BAR3LegacyIO=false
1937 BAR3Size=0
1938 BAR4=0
1939 BAR4LegacyIO=false
1940 BAR4Size=0
1941 BAR5=0
1942 BAR5LegacyIO=false
1943 BAR5Size=0
1944 BIST=0
1945 CacheLineSize=0
1946 CapabilityPtr=0
1947 CardbusCIS=0
1948 ClassCode=2
1949 Command=0
1950 DeviceID=4213
1951 ExpansionROM=0
1952 HeaderType=0
1953 InterruptLine=1
1954 InterruptPin=1
1955 LatencyTimer=0
1956 LegacyIOBase=0
1957 MSICAPBaseOffset=0
1958 MSICAPCapId=0
1959 MSICAPMaskBits=0
1960 MSICAPMsgAddr=0
1961 MSICAPMsgCtrl=0
1962 MSICAPMsgData=0
1963 MSICAPMsgUpperAddr=0
1964 MSICAPNextCapability=0
1965 MSICAPPendingBits=0
1966 MSIXCAPBaseOffset=0
1967 MSIXCAPCapId=0
1968 MSIXCAPNextCapability=0
1969 MSIXMsgCtrl=0
1970 MSIXPbaOffset=0
1971 MSIXTableOffset=0
1972 MaximumLatency=0
1973 MinimumGrant=255
1974 PMCAPBaseOffset=0
1975 PMCAPCapId=0
1976 PMCAPCapabilities=0
1977 PMCAPCtrlStatus=0
1978 PMCAPNextCapability=0
1979 PXCAPBaseOffset=0
1980 PXCAPCapId=0
1981 PXCAPCapabilities=0
1982 PXCAPDevCap2=0
1983 PXCAPDevCapabilities=0
1984 PXCAPDevCtrl=0
1985 PXCAPDevCtrl2=0
1986 PXCAPDevStatus=0
1987 PXCAPLinkCap=0
1988 PXCAPLinkCtrl=0
1989 PXCAPLinkStatus=0
1990 PXCAPNextCapability=0
1991 ProgIF=0
1992 Revision=0
1993 Status=0
1994 SubClassCode=0
1995 SubsystemID=4104
1996 SubsystemVendorID=32902
1997 VendorID=32902
1998 clk_domain=system.clk_domain
1999 config_latency=20000
2000 eventq_index=0
2001 fetch_comp_delay=10000
2002 fetch_delay=10000
2003 hardware_address=00:90:00:00:00:01
2004 pci_bus=0
2005 pci_dev=0
2006 pci_func=0
2007 phy_epid=896
2008 phy_pid=680
2009 pio_latency=30000
2010 platform=system.realview
2011 rx_desc_cache_size=64
2012 rx_fifo_size=393216
2013 rx_write_delay=0
2014 system=system
2015 tx_desc_cache_size=64
2016 tx_fifo_size=393216
2017 tx_read_delay=0
2018 wb_comp_delay=10000
2019 wb_delay=10000
2020 config=system.iobus.master[26]
2021 dma=system.iobus.slave[4]
2022 pio=system.iobus.master[25]
2023
2024 [system.realview.generic_timer]
2025 type=GenericTimer
2026 eventq_index=0
2027 gic=system.realview.gic
2028 int_num=29
2029 system=system
2030
2031 [system.realview.gic]
2032 type=Pl390
2033 clk_domain=system.clk_domain
2034 cpu_addr=738205696
2035 cpu_pio_delay=10000
2036 dist_addr=738201600
2037 dist_pio_delay=10000
2038 eventq_index=0
2039 int_latency=10000
2040 it_lines=128
2041 msix_addr=0
2042 platform=system.realview
2043 system=system
2044 pio=system.membus.master[2]
2045
2046 [system.realview.hdlcd]
2047 type=HDLcd
2048 amba_id=1314816
2049 clk_domain=system.clk_domain
2050 enable_capture=true
2051 eventq_index=0
2052 gic=system.realview.gic
2053 int_num=117
2054 pio_addr=721420288
2055 pio_latency=10000
2056 pixel_clock=7299
2057 system=system
2058 vnc=system.vncserver
2059 dma=system.membus.slave[0]
2060 pio=system.iobus.master[5]
2061
2062 [system.realview.ide]
2063 type=IdeController
2064 BAR0=1
2065 BAR0LegacyIO=false
2066 BAR0Size=8
2067 BAR1=1
2068 BAR1LegacyIO=false
2069 BAR1Size=4
2070 BAR2=1
2071 BAR2LegacyIO=false
2072 BAR2Size=8
2073 BAR3=1
2074 BAR3LegacyIO=false
2075 BAR3Size=4
2076 BAR4=1
2077 BAR4LegacyIO=false
2078 BAR4Size=16
2079 BAR5=1
2080 BAR5LegacyIO=false
2081 BAR5Size=0
2082 BIST=0
2083 CacheLineSize=0
2084 CapabilityPtr=0
2085 CardbusCIS=0
2086 ClassCode=1
2087 Command=0
2088 DeviceID=28945
2089 ExpansionROM=0
2090 HeaderType=0
2091 InterruptLine=2
2092 InterruptPin=2
2093 LatencyTimer=0
2094 LegacyIOBase=0
2095 MSICAPBaseOffset=0
2096 MSICAPCapId=0
2097 MSICAPMaskBits=0
2098 MSICAPMsgAddr=0
2099 MSICAPMsgCtrl=0
2100 MSICAPMsgData=0
2101 MSICAPMsgUpperAddr=0
2102 MSICAPNextCapability=0
2103 MSICAPPendingBits=0
2104 MSIXCAPBaseOffset=0
2105 MSIXCAPCapId=0
2106 MSIXCAPNextCapability=0
2107 MSIXMsgCtrl=0
2108 MSIXPbaOffset=0
2109 MSIXTableOffset=0
2110 MaximumLatency=0
2111 MinimumGrant=0
2112 PMCAPBaseOffset=0
2113 PMCAPCapId=0
2114 PMCAPCapabilities=0
2115 PMCAPCtrlStatus=0
2116 PMCAPNextCapability=0
2117 PXCAPBaseOffset=0
2118 PXCAPCapId=0
2119 PXCAPCapabilities=0
2120 PXCAPDevCap2=0
2121 PXCAPDevCapabilities=0
2122 PXCAPDevCtrl=0
2123 PXCAPDevCtrl2=0
2124 PXCAPDevStatus=0
2125 PXCAPLinkCap=0
2126 PXCAPLinkCtrl=0
2127 PXCAPLinkStatus=0
2128 PXCAPNextCapability=0
2129 ProgIF=133
2130 Revision=0
2131 Status=640
2132 SubClassCode=1
2133 SubsystemID=0
2134 SubsystemVendorID=0
2135 VendorID=32902
2136 clk_domain=system.clk_domain
2137 config_latency=20000
2138 ctrl_offset=0
2139 disks=system.cf0
2140 eventq_index=0
2141 io_shift=0
2142 pci_bus=0
2143 pci_dev=1
2144 pci_func=0
2145 pio_latency=30000
2146 platform=system.realview
2147 system=system
2148 config=system.iobus.master[24]
2149 dma=system.iobus.slave[3]
2150 pio=system.iobus.master[23]
2151
2152 [system.realview.kmi0]
2153 type=Pl050
2154 amba_id=1314896
2155 clk_domain=system.clk_domain
2156 eventq_index=0
2157 gic=system.realview.gic
2158 int_delay=1000000
2159 int_num=44
2160 is_mouse=false
2161 pio_addr=470155264
2162 pio_latency=100000
2163 system=system
2164 vnc=system.vncserver
2165 pio=system.iobus.master[6]
2166
2167 [system.realview.kmi1]
2168 type=Pl050
2169 amba_id=1314896
2170 clk_domain=system.clk_domain
2171 eventq_index=0
2172 gic=system.realview.gic
2173 int_delay=1000000
2174 int_num=45
2175 is_mouse=true
2176 pio_addr=470220800
2177 pio_latency=100000
2178 system=system
2179 vnc=system.vncserver
2180 pio=system.iobus.master[7]
2181
2182 [system.realview.l2x0_fake]
2183 type=IsaFake
2184 clk_domain=system.clk_domain
2185 eventq_index=0
2186 fake_mem=false
2187 pio_addr=739246080
2188 pio_latency=100000
2189 pio_size=4095
2190 ret_bad_addr=false
2191 ret_data16=65535
2192 ret_data32=4294967295
2193 ret_data64=18446744073709551615
2194 ret_data8=255
2195 system=system
2196 update_data=false
2197 warn_access=
2198 pio=system.iobus.master[12]
2199
2200 [system.realview.lan_fake]
2201 type=IsaFake
2202 clk_domain=system.clk_domain
2203 eventq_index=0
2204 fake_mem=false
2205 pio_addr=436207616
2206 pio_latency=100000
2207 pio_size=65535
2208 ret_bad_addr=false
2209 ret_data16=65535
2210 ret_data32=4294967295
2211 ret_data64=18446744073709551615
2212 ret_data8=255
2213 system=system
2214 update_data=false
2215 warn_access=
2216 pio=system.iobus.master[19]
2217
2218 [system.realview.local_cpu_timer]
2219 type=CpuLocalTimer
2220 clk_domain=system.clk_domain
2221 eventq_index=0
2222 gic=system.realview.gic
2223 int_num_timer=29
2224 int_num_watchdog=30
2225 pio_addr=738721792
2226 pio_latency=100000
2227 system=system
2228 pio=system.membus.master[3]
2229
2230 [system.realview.mmc_fake]
2231 type=AmbaFake
2232 amba_id=0
2233 clk_domain=system.clk_domain
2234 eventq_index=0
2235 ignore_access=false
2236 pio_addr=470089728
2237 pio_latency=100000
2238 system=system
2239 pio=system.iobus.master[21]
2240
2241 [system.realview.nvmem]
2242 type=SimpleMemory
2243 bandwidth=73.000000
2244 clk_domain=system.clk_domain
2245 conf_table_reported=false
2246 eventq_index=0
2247 in_addr_map=true
2248 latency=30000
2249 latency_var=0
2250 null=false
2251 range=0:67108863
2252 port=system.membus.master[1]
2253
2254 [system.realview.pciconfig]
2255 type=PciConfigAll
2256 bus=0
2257 clk_domain=system.clk_domain
2258 eventq_index=0
2259 pio_addr=0
2260 pio_latency=30000
2261 platform=system.realview
2262 size=268435456
2263 system=system
2264 pio=system.iobus.default
2265
2266 [system.realview.realview_io]
2267 type=RealViewCtrl
2268 clk_domain=system.clk_domain
2269 eventq_index=0
2270 idreg=35979264
2271 pio_addr=469827584
2272 pio_latency=100000
2273 proc_id0=335544320
2274 proc_id1=335544320
2275 system=system
2276 pio=system.iobus.master[1]
2277
2278 [system.realview.rtc]
2279 type=PL031
2280 amba_id=3412017
2281 clk_domain=system.clk_domain
2282 eventq_index=0
2283 gic=system.realview.gic
2284 int_delay=100000
2285 int_num=36
2286 pio_addr=471269376
2287 pio_latency=100000
2288 system=system
2289 time=Thu Jan  1 00:00:00 2009
2290 pio=system.iobus.master[10]
2291
2292 [system.realview.sp810_fake]
2293 type=AmbaFake
2294 amba_id=0
2295 clk_domain=system.clk_domain
2296 eventq_index=0
2297 ignore_access=true
2298 pio_addr=469893120
2299 pio_latency=100000
2300 system=system
2301 pio=system.iobus.master[16]
2302
2303 [system.realview.timer0]
2304 type=Sp804
2305 amba_id=1316868
2306 clk_domain=system.clk_domain
2307 clock0=1000000
2308 clock1=1000000
2309 eventq_index=0
2310 gic=system.realview.gic
2311 int_num0=34
2312 int_num1=34
2313 pio_addr=470876160
2314 pio_latency=100000
2315 system=system
2316 pio=system.iobus.master[2]
2317
2318 [system.realview.timer1]
2319 type=Sp804
2320 amba_id=1316868
2321 clk_domain=system.clk_domain
2322 clock0=1000000
2323 clock1=1000000
2324 eventq_index=0
2325 gic=system.realview.gic
2326 int_num0=35
2327 int_num1=35
2328 pio_addr=470941696
2329 pio_latency=100000
2330 system=system
2331 pio=system.iobus.master[3]
2332
2333 [system.realview.uart]
2334 type=Pl011
2335 clk_domain=system.clk_domain
2336 end_on_eot=false
2337 eventq_index=0
2338 gic=system.realview.gic
2339 int_delay=100000
2340 int_num=37
2341 pio_addr=470351872
2342 pio_latency=100000
2343 platform=system.realview
2344 system=system
2345 terminal=system.terminal
2346 pio=system.iobus.master[0]
2347
2348 [system.realview.uart1_fake]
2349 type=AmbaFake
2350 amba_id=0
2351 clk_domain=system.clk_domain
2352 eventq_index=0
2353 ignore_access=false
2354 pio_addr=470417408
2355 pio_latency=100000
2356 system=system
2357 pio=system.iobus.master[13]
2358
2359 [system.realview.uart2_fake]
2360 type=AmbaFake
2361 amba_id=0
2362 clk_domain=system.clk_domain
2363 eventq_index=0
2364 ignore_access=false
2365 pio_addr=470482944
2366 pio_latency=100000
2367 system=system
2368 pio=system.iobus.master[14]
2369
2370 [system.realview.uart3_fake]
2371 type=AmbaFake
2372 amba_id=0
2373 clk_domain=system.clk_domain
2374 eventq_index=0
2375 ignore_access=false
2376 pio_addr=470548480
2377 pio_latency=100000
2378 system=system
2379 pio=system.iobus.master[15]
2380
2381 [system.realview.usb_fake]
2382 type=IsaFake
2383 clk_domain=system.clk_domain
2384 eventq_index=0
2385 fake_mem=false
2386 pio_addr=452984832
2387 pio_latency=100000
2388 pio_size=131071
2389 ret_bad_addr=false
2390 ret_data16=65535
2391 ret_data32=4294967295
2392 ret_data64=18446744073709551615
2393 ret_data8=255
2394 system=system
2395 update_data=false
2396 warn_access=
2397 pio=system.iobus.master[20]
2398
2399 [system.realview.vgic]
2400 type=VGic
2401 clk_domain=system.clk_domain
2402 eventq_index=0
2403 gic=system.realview.gic
2404 hv_addr=738213888
2405 pio_delay=10000
2406 platform=system.realview
2407 ppint=25
2408 system=system
2409 vcpu_addr=738222080
2410 pio=system.membus.master[4]
2411
2412 [system.realview.vram]
2413 type=SimpleMemory
2414 bandwidth=73.000000
2415 clk_domain=system.clk_domain
2416 conf_table_reported=false
2417 eventq_index=0
2418 in_addr_map=true
2419 latency=30000
2420 latency_var=0
2421 null=false
2422 range=402653184:436207615
2423 port=system.iobus.master[11]
2424
2425 [system.realview.watchdog_fake]
2426 type=AmbaFake
2427 amba_id=0
2428 clk_domain=system.clk_domain
2429 eventq_index=0
2430 ignore_access=false
2431 pio_addr=470745088
2432 pio_latency=100000
2433 system=system
2434 pio=system.iobus.master[17]
2435
2436 [system.terminal]
2437 type=Terminal
2438 eventq_index=0
2439 intr_control=system.intrctrl
2440 number=0
2441 output=true
2442 port=3456
2443
2444 [system.toL2Bus]
2445 type=CoherentXBar
2446 clk_domain=system.cpu_clk_domain
2447 eventq_index=0
2448 forward_latency=0
2449 frontend_latency=1
2450 response_latency=1
2451 snoop_filter=Null
2452 snoop_response_latency=1
2453 system=system
2454 use_default_range=false
2455 width=32
2456 master=system.l2c.cpu_side
2457 slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side
2458
2459 [system.vncserver]
2460 type=VncServer
2461 eventq_index=0
2462 frame_capture=false
2463 number=0
2464 port=5900
2465
2466 [system.voltage_domain]
2467 type=VoltageDomain
2468 eventq_index=0
2469 voltage=1.000000
2470