bcdf8c1ecc24c6422805a03a16d950e3cb95d5ef
[gem5.git] / tests / long / fs / 10.linux-boot / ref / arm / linux / realview-minor-dual / simerr
1 warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
2 info: kernel located at: /usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
3 warn: Sockets disabled, not accepting vnc client connections
4 warn: Sockets disabled, not accepting terminal connections
5 warn: Sockets disabled, not accepting gdb connections
6 warn: ClockedObject: More than one power state change request encountered within the same simulation tick
7 warn: ClockedObject: More than one power state change request encountered within the same simulation tick
8 info: Using bootloader at address 0x10
9 info: Using kernel entry physical address at 0x80008000
10 info: Loading DTB file: /usr/local/google/home/gabeblack/gem5/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb at address 0x88000000
11 warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
12 info: Entering event queue @ 0. Starting simulation...
13 warn: Not doing anything for miscreg ACTLR
14 warn: Not doing anything for write of miscreg ACTLR
15 warn: The clidr register always reports 0 caches.
16 warn: clidr LoUIS field of 0b001 to match current ARM implementations.
17 warn: The csselr register isn't implemented.
18 warn: CP14 unimplemented crn[0], opc1[6], crm[0], opc2[0]
19 warn: CP14 unimplemented crn[0], opc1[6], crm[0], opc2[0]
20 warn: instruction 'mcr dccmvau' unimplemented
21 warn: instruction 'mcr icimvau' unimplemented
22 warn: instruction 'mcr bpiallis' unimplemented
23 warn: instruction 'mcr icialluis' unimplemented
24 warn: instruction 'mcr dccimvac' unimplemented
25 warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
26 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
27 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
28 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
29 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
30 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
31 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
32 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
33 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
34 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
35 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
36 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
37 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
38 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
39 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
40 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
41 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
42 warn: Not doing anything for miscreg ACTLR
43 warn: Not doing anything for write of miscreg ACTLR
44 warn: instruction 'mcr bpiall' unimplemented
45 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
46 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
47 warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4]
48 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
49 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
50 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
51 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
52 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
53 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0
54 warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
55 warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
56 warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
57 warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4]
58 warn: Returning zero for read from miscreg pmcr
59 warn: Ignoring write to miscreg pmcntenclr
60 warn: Ignoring write to miscreg pmintenclr
61 warn: Ignoring write to miscreg pmovsr
62 warn: Ignoring write to miscreg pmcr
63 warn: Ignoring write to miscreg pmcntenclr
64 warn: Ignoring write to miscreg pmintenclr
65 warn: Ignoring write to miscreg pmovsr
66 warn: Ignoring write to miscreg pmcr