6 time_sync_period=100000000000
7 time_sync_spin_threshold=100000000
11 children=bridge cf0 cpu intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver
13 boot_loader=/projects/pd/randd/dist/binaries/boot.arm
14 boot_loader_mem=system.realview.nvmem
15 boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
17 gic_cpu_addr=520093952
19 kernel=/projects/pd/randd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
20 load_addr_mask=268435455
21 machine_type=RealView_PBX
23 memories=system.physmem system.realview.nvmem
26 physmem=system.physmem
27 readfile=tests/halt.sh
29 work_begin_ckpt_count=0
30 work_begin_cpu_id_exit=-1
31 work_begin_exit_count=0
32 work_cpus_ckpt_count=0
36 system_port=system.membus.slave[0]
42 ranges=268435456:520093695 1073741824:1610612735
46 master=system.iobus.slave[0]
47 slave=system.membus.master[0]
54 image=system.cf0.image
59 child=system.cf0.image.child
64 [system.cf0.image.child]
66 image_file=/projects/pd/randd/dist/disks/linux-arm-ael.img
71 children=dcache dtb fuPool icache interrupts itb tracer
86 choicePredictorSize=8192
97 defer_registration=false
99 do_checkpoint_insts=true
101 do_statistics_insts=true
107 fuPool=system.cpu.fuPool
109 function_trace_start=0
112 globalPredictorSize=8192
118 interrupts=system.cpu.interrupts
119 issueToExecuteDelay=1
124 localHistoryTableSize=2048
125 localPredictorSize=2048
126 max_insts_all_threads=0
127 max_insts_any_thread=0
128 max_loads_all_threads=0
129 max_loads_any_thread=0
141 renameToDecodeDelay=1
146 smtCommitPolicy=RoundRobin
147 smtFetchPolicy=SingleThread
148 smtIQPolicy=Partitioned
150 smtLSQPolicy=Partitioned
152 smtNumFetchingThreads=1
153 smtROBPolicy=Partitioned
156 store_set_clear_period=250000
158 tracer=system.cpu.tracer
163 dcache_port=system.cpu.dcache.cpu_side
164 icache_port=system.cpu.icache.cpu_side
168 addr_ranges=0:18446744073709551615
177 prefetch_on_access=false
179 prioritizeRequests=false
188 cpu_side=system.cpu.dcache_port
189 mem_side=system.toL2Bus.slave[1]
195 walker=system.cpu.dtb.walker
197 [system.cpu.dtb.walker]
202 port=system.toL2Bus.slave[3]
206 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
207 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
209 [system.cpu.fuPool.FUList0]
213 opList=system.cpu.fuPool.FUList0.opList
215 [system.cpu.fuPool.FUList0.opList]
221 [system.cpu.fuPool.FUList1]
223 children=opList0 opList1
225 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
227 [system.cpu.fuPool.FUList1.opList0]
233 [system.cpu.fuPool.FUList1.opList1]
239 [system.cpu.fuPool.FUList2]
241 children=opList0 opList1 opList2
243 opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
245 [system.cpu.fuPool.FUList2.opList0]
251 [system.cpu.fuPool.FUList2.opList1]
257 [system.cpu.fuPool.FUList2.opList2]
263 [system.cpu.fuPool.FUList3]
265 children=opList0 opList1 opList2
267 opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
269 [system.cpu.fuPool.FUList3.opList0]
275 [system.cpu.fuPool.FUList3.opList1]
281 [system.cpu.fuPool.FUList3.opList2]
287 [system.cpu.fuPool.FUList4]
291 opList=system.cpu.fuPool.FUList4.opList
293 [system.cpu.fuPool.FUList4.opList]
299 [system.cpu.fuPool.FUList5]
301 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
303 opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
305 [system.cpu.fuPool.FUList5.opList00]
311 [system.cpu.fuPool.FUList5.opList01]
317 [system.cpu.fuPool.FUList5.opList02]
323 [system.cpu.fuPool.FUList5.opList03]
329 [system.cpu.fuPool.FUList5.opList04]
335 [system.cpu.fuPool.FUList5.opList05]
341 [system.cpu.fuPool.FUList5.opList06]
347 [system.cpu.fuPool.FUList5.opList07]
353 [system.cpu.fuPool.FUList5.opList08]
359 [system.cpu.fuPool.FUList5.opList09]
365 [system.cpu.fuPool.FUList5.opList10]
371 [system.cpu.fuPool.FUList5.opList11]
377 [system.cpu.fuPool.FUList5.opList12]
383 [system.cpu.fuPool.FUList5.opList13]
389 [system.cpu.fuPool.FUList5.opList14]
395 [system.cpu.fuPool.FUList5.opList15]
401 [system.cpu.fuPool.FUList5.opList16]
404 opClass=SimdFloatMisc
407 [system.cpu.fuPool.FUList5.opList17]
410 opClass=SimdFloatMult
413 [system.cpu.fuPool.FUList5.opList18]
416 opClass=SimdFloatMultAcc
419 [system.cpu.fuPool.FUList5.opList19]
422 opClass=SimdFloatSqrt
425 [system.cpu.fuPool.FUList6]
429 opList=system.cpu.fuPool.FUList6.opList
431 [system.cpu.fuPool.FUList6.opList]
437 [system.cpu.fuPool.FUList7]
439 children=opList0 opList1
441 opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
443 [system.cpu.fuPool.FUList7.opList0]
449 [system.cpu.fuPool.FUList7.opList1]
455 [system.cpu.fuPool.FUList8]
459 opList=system.cpu.fuPool.FUList8.opList
461 [system.cpu.fuPool.FUList8.opList]
469 addr_ranges=0:18446744073709551615
478 prefetch_on_access=false
480 prioritizeRequests=false
489 cpu_side=system.cpu.icache_port
490 mem_side=system.toL2Bus.slave[0]
492 [system.cpu.interrupts]
499 walker=system.cpu.itb.walker
501 [system.cpu.itb.walker]
506 port=system.toL2Bus.slave[2]
521 use_default_range=false
523 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side
524 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
528 addr_ranges=0:268435455
537 prefetch_on_access=false
539 prioritizeRequests=false
548 cpu_side=system.iobus.master[25]
549 mem_side=system.membus.slave[1]
553 addr_ranges=0:18446744073709551615
562 prefetch_on_access=false
564 prioritizeRequests=false
573 cpu_side=system.toL2Bus.master[0]
574 mem_side=system.membus.slave[2]
578 children=badaddr_responder
583 use_default_range=false
585 default=system.membus.badaddr_responder.pio
586 master=system.bridge.slave system.realview.nvmem.port[0] system.physmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio
587 slave=system.system_port system.iocache.mem_side system.l2c.mem_side
589 [system.membus.badaddr_responder]
597 ret_data32=4294967295
598 ret_data64=18446744073709551615
603 pio=system.membus.default
613 port=system.membus.master[2]
617 children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
618 intrctrl=system.intrctrl
619 max_mem_size=268435456
624 [system.realview.a9scu]
629 pio=system.membus.master[5]
631 [system.realview.aaci_fake]
638 pio=system.iobus.master[21]
640 [system.realview.cf_ctrl]
684 max_backoff_delay=10000000
685 min_backoff_delay=4000
690 platform=system.realview
692 config=system.iobus.master[8]
693 dma=system.iobus.slave[2]
694 pio=system.iobus.master[7]
696 [system.realview.clcd]
700 gic=system.realview.gic
702 max_backoff_delay=10000000
703 min_backoff_delay=4000
708 dma=system.iobus.slave[1]
709 pio=system.iobus.master[4]
711 [system.realview.dmac_fake]
718 pio=system.iobus.master[9]
720 [system.realview.flash_fake]
728 ret_data32=4294967295
729 ret_data64=18446744073709551615
734 pio=system.iobus.master[24]
736 [system.realview.gic]
744 platform=system.realview
746 pio=system.membus.master[3]
748 [system.realview.gpio0_fake]
755 pio=system.iobus.master[16]
757 [system.realview.gpio1_fake]
764 pio=system.iobus.master[17]
766 [system.realview.gpio2_fake]
773 pio=system.iobus.master[18]
775 [system.realview.kmi0]
778 gic=system.realview.gic
786 pio=system.iobus.master[5]
788 [system.realview.kmi1]
791 gic=system.realview.gic
799 pio=system.iobus.master[6]
801 [system.realview.l2x0_fake]
809 ret_data32=4294967295
810 ret_data64=18446744073709551615
815 pio=system.membus.master[4]
817 [system.realview.local_cpu_timer]
820 gic=system.realview.gic
826 pio=system.membus.master[6]
828 [system.realview.mmc_fake]
835 pio=system.iobus.master[22]
837 [system.realview.nvmem]
843 range=2147483648:2214592511
845 port=system.membus.master[1]
847 [system.realview.realview_io]
855 pio=system.iobus.master[1]
857 [system.realview.rtc]
860 gic=system.realview.gic
866 time=Thu Jan 1 00:00:00 2009
867 pio=system.iobus.master[23]
869 [system.realview.sci_fake]
876 pio=system.iobus.master[20]
878 [system.realview.smc_fake]
885 pio=system.iobus.master[13]
887 [system.realview.sp810_fake]
894 pio=system.iobus.master[14]
896 [system.realview.ssp_fake]
903 pio=system.iobus.master[19]
905 [system.realview.timer0]
910 gic=system.realview.gic
916 pio=system.iobus.master[2]
918 [system.realview.timer1]
923 gic=system.realview.gic
929 pio=system.iobus.master[3]
931 [system.realview.uart]
934 gic=system.realview.gic
939 platform=system.realview
941 terminal=system.terminal
942 pio=system.iobus.master[0]
944 [system.realview.uart1_fake]
951 pio=system.iobus.master[10]
953 [system.realview.uart2_fake]
960 pio=system.iobus.master[11]
962 [system.realview.uart3_fake]
969 pio=system.iobus.master[12]
971 [system.realview.watchdog_fake]
978 pio=system.iobus.master[15]
982 intr_control=system.intrctrl
993 use_default_range=false
995 master=system.l2c.cpu_side
996 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port