tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 time_sync_enable=false
   5 time_sync_period=100000000000
   6 time_sync_spin_threshold=100000000
   7
   8 [system]
   9 type=LinuxArmSystem
  10 children=bridge cf0 cpu intrctrl iobus iocache l2c membus nvmem physmem realview terminal toL2Bus vncserver
  11 boot_cpu_frequency=500
  12 boot_loader=/dist/m5/system/binaries/boot.arm
  13 boot_loader_mem=system.nvmem
  14 boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
  15 flags_addr=268435504
  16 gic_cpu_addr=520093952
  17 init_param=0
  18 kernel=/dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
  19 load_addr_mask=268435455
  20 machine_type=RealView_PBX
  21 mem_mode=timing
  22 memories=system.nvmem system.physmem
  23 midr_regval=890224640
  24 num_work_ids=16
  25 physmem=system.physmem
  26 readfile=tests/halt.sh
  27 symbolfile=
  28 work_begin_ckpt_count=0
  29 work_begin_cpu_id_exit=-1
  30 work_begin_exit_count=0
  31 work_cpus_ckpt_count=0
  32 work_end_ckpt_count=0
  33 work_end_exit_count=0
  34 work_item_id=-1
  35 system_port=system.membus.port[7]
  36
  37 [system.bridge]
  38 type=Bridge
  39 delay=50000
  40 nack_delay=4000
  41 ranges=268435456:520093695 1073741824:18446744073709551615
  42 req_size=16
  43 resp_size=16
  44 write_ack=false
  45 master=system.iobus.port[0]
  46 slave=system.membus.port[0]
  47
  48 [system.cf0]
  49 type=IdeDisk
  50 children=image
  51 delay=1000000
  52 driveID=master
  53 image=system.cf0.image
  54
  55 [system.cf0.image]
  56 type=CowDiskImage
  57 children=child
  58 child=system.cf0.image.child
  59 image_file=
  60 read_only=false
  61 table_size=65536
  62
  63 [system.cf0.image.child]
  64 type=RawDiskImage
  65 image_file=/dist/m5/system/disks/linux-arm-ael.img
  66 read_only=true
  67
  68 [system.cpu]
  69 type=DerivO3CPU
  70 children=dcache dtb fuPool icache interrupts itb tracer
  71 BTBEntries=4096
  72 BTBTagSize=16
  73 LFSTSize=1024
  74 LQEntries=32
  75 LSQCheckLoads=true
  76 LSQDepCheckShift=4
  77 RASSize=16
  78 SQEntries=32
  79 SSITSize=1024
  80 activity=0
  81 backComSize=5
  82 cachePorts=200
  83 checker=Null
  84 choiceCtrBits=2
  85 choicePredictorSize=8192
  86 clock=500
  87 commitToDecodeDelay=1
  88 commitToFetchDelay=1
  89 commitToIEWDelay=1
  90 commitToRenameDelay=1
  91 commitWidth=8
  92 cpu_id=0
  93 decodeToFetchDelay=1
  94 decodeToRenameDelay=1
  95 decodeWidth=8
  96 defer_registration=false
  97 dispatchWidth=8
  98 do_checkpoint_insts=true
  99 do_quiesce=true
 100 do_statistics_insts=true
 101 dtb=system.cpu.dtb
 102 fetchToDecodeDelay=1
 103 fetchTrapLatency=1
 104 fetchWidth=8
 105 forwardComSize=5
 106 fuPool=system.cpu.fuPool
 107 function_trace=false
 108 function_trace_start=0
 109 globalCtrBits=2
 110 globalHistoryBits=13
 111 globalPredictorSize=8192
 112 iewToCommitDelay=1
 113 iewToDecodeDelay=1
 114 iewToFetchDelay=1
 115 iewToRenameDelay=1
 116 instShiftAmt=2
 117 interrupts=system.cpu.interrupts
 118 issueToExecuteDelay=1
 119 issueWidth=8
 120 itb=system.cpu.itb
 121 localCtrBits=2
 122 localHistoryBits=11
 123 localHistoryTableSize=2048
 124 localPredictorSize=2048
 125 max_insts_all_threads=0
 126 max_insts_any_thread=0
 127 max_loads_all_threads=0
 128 max_loads_any_thread=0
 129 numIQEntries=64
 130 numPhysFloatRegs=256
 131 numPhysIntRegs=256
 132 numROBEntries=192
 133 numRobs=1
 134 numThreads=1
 135 phase=0
 136 predType=tournament
 137 profile=0
 138 progress_interval=0
 139 renameToDecodeDelay=1
 140 renameToFetchDelay=1
 141 renameToIEWDelay=2
 142 renameToROBDelay=1
 143 renameWidth=8
 144 smtCommitPolicy=RoundRobin
 145 smtFetchPolicy=SingleThread
 146 smtIQPolicy=Partitioned
 147 smtIQThreshold=100
 148 smtLSQPolicy=Partitioned
 149 smtLSQThreshold=100
 150 smtNumFetchingThreads=1
 151 smtROBPolicy=Partitioned
 152 smtROBThreshold=100
 153 squashWidth=8
 154 store_set_clear_period=250000
 155 system=system
 156 tracer=system.cpu.tracer
 157 trapLatency=13
 158 wbDepth=1
 159 wbWidth=8
 160 dcache_port=system.cpu.dcache.cpu_side
 161 icache_port=system.cpu.icache.cpu_side
 162
 163 [system.cpu.dcache]
 164 type=BaseCache
 165 addr_range=0:18446744073709551615
 166 assoc=4
 167 block_size=64
 168 forward_snoops=true
 169 hash_delay=1
 170 is_top_level=true
 171 latency=1000
 172 max_miss_count=0
 173 mshrs=4
 174 num_cpus=1
 175 prefetch_data_accesses_only=false
 176 prefetch_degree=1
 177 prefetch_latency=10000
 178 prefetch_on_access=false
 179 prefetch_past_page=false
 180 prefetch_policy=none
 181 prefetch_serial_squash=false
 182 prefetch_use_cpu_id=true
 183 prefetcher_size=100
 184 prioritizeRequests=false
 185 repl=Null
 186 size=32768
 187 subblock_size=0
 188 tgts_per_mshr=20
 189 trace_addr=0
 190 two_queue=false
 191 write_buffers=8
 192 cpu_side=system.cpu.dcache_port
 193 mem_side=system.toL2Bus.port[2]
 194
 195 [system.cpu.dtb]
 196 type=ArmTLB
 197 children=walker
 198 size=64
 199 walker=system.cpu.dtb.walker
 200
 201 [system.cpu.dtb.walker]
 202 type=ArmTableWalker
 203 max_backoff=100000
 204 min_backoff=0
 205 sys=system
 206 port=system.toL2Bus.port[4]
 207
 208 [system.cpu.fuPool]
 209 type=FUPool
 210 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
 211 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
 212
 213 [system.cpu.fuPool.FUList0]
 214 type=FUDesc
 215 children=opList
 216 count=6
 217 opList=system.cpu.fuPool.FUList0.opList
 218
 219 [system.cpu.fuPool.FUList0.opList]
 220 type=OpDesc
 221 issueLat=1
 222 opClass=IntAlu
 223 opLat=1
 224
 225 [system.cpu.fuPool.FUList1]
 226 type=FUDesc
 227 children=opList0 opList1
 228 count=2
 229 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
 230
 231 [system.cpu.fuPool.FUList1.opList0]
 232 type=OpDesc
 233 issueLat=1
 234 opClass=IntMult
 235 opLat=3
 236
 237 [system.cpu.fuPool.FUList1.opList1]
 238 type=OpDesc
 239 issueLat=19
 240 opClass=IntDiv
 241 opLat=20
 242
 243 [system.cpu.fuPool.FUList2]
 244 type=FUDesc
 245 children=opList0 opList1 opList2
 246 count=4
 247 opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
 248
 249 [system.cpu.fuPool.FUList2.opList0]
 250 type=OpDesc
 251 issueLat=1
 252 opClass=FloatAdd
 253 opLat=2
 254
 255 [system.cpu.fuPool.FUList2.opList1]
 256 type=OpDesc
 257 issueLat=1
 258 opClass=FloatCmp
 259 opLat=2
 260
 261 [system.cpu.fuPool.FUList2.opList2]
 262 type=OpDesc
 263 issueLat=1
 264 opClass=FloatCvt
 265 opLat=2
 266
 267 [system.cpu.fuPool.FUList3]
 268 type=FUDesc
 269 children=opList0 opList1 opList2
 270 count=2
 271 opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
 272
 273 [system.cpu.fuPool.FUList3.opList0]
 274 type=OpDesc
 275 issueLat=1
 276 opClass=FloatMult
 277 opLat=4
 278
 279 [system.cpu.fuPool.FUList3.opList1]
 280 type=OpDesc
 281 issueLat=12
 282 opClass=FloatDiv
 283 opLat=12
 284
 285 [system.cpu.fuPool.FUList3.opList2]
 286 type=OpDesc
 287 issueLat=24
 288 opClass=FloatSqrt
 289 opLat=24
 290
 291 [system.cpu.fuPool.FUList4]
 292 type=FUDesc
 293 children=opList
 294 count=0
 295 opList=system.cpu.fuPool.FUList4.opList
 296
 297 [system.cpu.fuPool.FUList4.opList]
 298 type=OpDesc
 299 issueLat=1
 300 opClass=MemRead
 301 opLat=1
 302
 303 [system.cpu.fuPool.FUList5]
 304 type=FUDesc
 305 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
 306 count=4
 307 opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
 308
 309 [system.cpu.fuPool.FUList5.opList00]
 310 type=OpDesc
 311 issueLat=1
 312 opClass=SimdAdd
 313 opLat=1
 314
 315 [system.cpu.fuPool.FUList5.opList01]
 316 type=OpDesc
 317 issueLat=1
 318 opClass=SimdAddAcc
 319 opLat=1
 320
 321 [system.cpu.fuPool.FUList5.opList02]
 322 type=OpDesc
 323 issueLat=1
 324 opClass=SimdAlu
 325 opLat=1
 326
 327 [system.cpu.fuPool.FUList5.opList03]
 328 type=OpDesc
 329 issueLat=1
 330 opClass=SimdCmp
 331 opLat=1
 332
 333 [system.cpu.fuPool.FUList5.opList04]
 334 type=OpDesc
 335 issueLat=1
 336 opClass=SimdCvt
 337 opLat=1
 338
 339 [system.cpu.fuPool.FUList5.opList05]
 340 type=OpDesc
 341 issueLat=1
 342 opClass=SimdMisc
 343 opLat=1
 344
 345 [system.cpu.fuPool.FUList5.opList06]
 346 type=OpDesc
 347 issueLat=1
 348 opClass=SimdMult
 349 opLat=1
 350
 351 [system.cpu.fuPool.FUList5.opList07]
 352 type=OpDesc
 353 issueLat=1
 354 opClass=SimdMultAcc
 355 opLat=1
 356
 357 [system.cpu.fuPool.FUList5.opList08]
 358 type=OpDesc
 359 issueLat=1
 360 opClass=SimdShift
 361 opLat=1
 362
 363 [system.cpu.fuPool.FUList5.opList09]
 364 type=OpDesc
 365 issueLat=1
 366 opClass=SimdShiftAcc
 367 opLat=1
 368
 369 [system.cpu.fuPool.FUList5.opList10]
 370 type=OpDesc
 371 issueLat=1
 372 opClass=SimdSqrt
 373 opLat=1
 374
 375 [system.cpu.fuPool.FUList5.opList11]
 376 type=OpDesc
 377 issueLat=1
 378 opClass=SimdFloatAdd
 379 opLat=1
 380
 381 [system.cpu.fuPool.FUList5.opList12]
 382 type=OpDesc
 383 issueLat=1
 384 opClass=SimdFloatAlu
 385 opLat=1
 386
 387 [system.cpu.fuPool.FUList5.opList13]
 388 type=OpDesc
 389 issueLat=1
 390 opClass=SimdFloatCmp
 391 opLat=1
 392
 393 [system.cpu.fuPool.FUList5.opList14]
 394 type=OpDesc
 395 issueLat=1
 396 opClass=SimdFloatCvt
 397 opLat=1
 398
 399 [system.cpu.fuPool.FUList5.opList15]
 400 type=OpDesc
 401 issueLat=1
 402 opClass=SimdFloatDiv
 403 opLat=1
 404
 405 [system.cpu.fuPool.FUList5.opList16]
 406 type=OpDesc
 407 issueLat=1
 408 opClass=SimdFloatMisc
 409 opLat=1
 410
 411 [system.cpu.fuPool.FUList5.opList17]
 412 type=OpDesc
 413 issueLat=1
 414 opClass=SimdFloatMult
 415 opLat=1
 416
 417 [system.cpu.fuPool.FUList5.opList18]
 418 type=OpDesc
 419 issueLat=1
 420 opClass=SimdFloatMultAcc
 421 opLat=1
 422
 423 [system.cpu.fuPool.FUList5.opList19]
 424 type=OpDesc
 425 issueLat=1
 426 opClass=SimdFloatSqrt
 427 opLat=1
 428
 429 [system.cpu.fuPool.FUList6]
 430 type=FUDesc
 431 children=opList
 432 count=0
 433 opList=system.cpu.fuPool.FUList6.opList
 434
 435 [system.cpu.fuPool.FUList6.opList]
 436 type=OpDesc
 437 issueLat=1
 438 opClass=MemWrite
 439 opLat=1
 440
 441 [system.cpu.fuPool.FUList7]
 442 type=FUDesc
 443 children=opList0 opList1
 444 count=4
 445 opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
 446
 447 [system.cpu.fuPool.FUList7.opList0]
 448 type=OpDesc
 449 issueLat=1
 450 opClass=MemRead
 451 opLat=1
 452
 453 [system.cpu.fuPool.FUList7.opList1]
 454 type=OpDesc
 455 issueLat=1
 456 opClass=MemWrite
 457 opLat=1
 458
 459 [system.cpu.fuPool.FUList8]
 460 type=FUDesc
 461 children=opList
 462 count=1
 463 opList=system.cpu.fuPool.FUList8.opList
 464
 465 [system.cpu.fuPool.FUList8.opList]
 466 type=OpDesc
 467 issueLat=3
 468 opClass=IprAccess
 469 opLat=3
 470
 471 [system.cpu.icache]
 472 type=BaseCache
 473 addr_range=0:18446744073709551615
 474 assoc=1
 475 block_size=64
 476 forward_snoops=true
 477 hash_delay=1
 478 is_top_level=true
 479 latency=1000
 480 max_miss_count=0
 481 mshrs=4
 482 num_cpus=1
 483 prefetch_data_accesses_only=false
 484 prefetch_degree=1
 485 prefetch_latency=10000
 486 prefetch_on_access=false
 487 prefetch_past_page=false
 488 prefetch_policy=none
 489 prefetch_serial_squash=false
 490 prefetch_use_cpu_id=true
 491 prefetcher_size=100
 492 prioritizeRequests=false
 493 repl=Null
 494 size=32768
 495 subblock_size=0
 496 tgts_per_mshr=20
 497 trace_addr=0
 498 two_queue=false
 499 write_buffers=8
 500 cpu_side=system.cpu.icache_port
 501 mem_side=system.toL2Bus.port[1]
 502
 503 [system.cpu.interrupts]
 504 type=ArmInterrupts
 505
 506 [system.cpu.itb]
 507 type=ArmTLB
 508 children=walker
 509 size=64
 510 walker=system.cpu.itb.walker
 511
 512 [system.cpu.itb.walker]
 513 type=ArmTableWalker
 514 max_backoff=100000
 515 min_backoff=0
 516 sys=system
 517 port=system.toL2Bus.port[3]
 518
 519 [system.cpu.tracer]
 520 type=ExeTracer
 521
 522 [system.intrctrl]
 523 type=IntrControl
 524 sys=system
 525
 526 [system.iobus]
 527 type=Bus
 528 block_size=64
 529 bus_id=0
 530 clock=1000
 531 header_cycles=1
 532 use_default_range=false
 533 width=64
 534 port=system.bridge.master system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.clcd.dma system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.cf_ctrl.dma system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc_fake.pio system.realview.flash_fake.pio system.iocache.cpu_side
 535
 536 [system.iocache]
 537 type=BaseCache
 538 addr_range=0:268435455
 539 assoc=8
 540 block_size=64
 541 forward_snoops=false
 542 hash_delay=1
 543 is_top_level=false
 544 latency=50000
 545 max_miss_count=0
 546 mshrs=20
 547 num_cpus=1
 548 prefetch_data_accesses_only=false
 549 prefetch_degree=1
 550 prefetch_latency=500000
 551 prefetch_on_access=false
 552 prefetch_past_page=false
 553 prefetch_policy=none
 554 prefetch_serial_squash=false
 555 prefetch_use_cpu_id=true
 556 prefetcher_size=100
 557 prioritizeRequests=false
 558 repl=Null
 559 size=1024
 560 subblock_size=0
 561 tgts_per_mshr=12
 562 trace_addr=0
 563 two_queue=false
 564 write_buffers=8
 565 cpu_side=system.iobus.port[28]
 566 mem_side=system.membus.port[8]
 567
 568 [system.l2c]
 569 type=BaseCache
 570 addr_range=0:18446744073709551615
 571 assoc=8
 572 block_size=64
 573 forward_snoops=true
 574 hash_delay=1
 575 is_top_level=false
 576 latency=10000
 577 max_miss_count=0
 578 mshrs=92
 579 num_cpus=1
 580 prefetch_data_accesses_only=false
 581 prefetch_degree=1
 582 prefetch_latency=100000
 583 prefetch_on_access=false
 584 prefetch_past_page=false
 585 prefetch_policy=none
 586 prefetch_serial_squash=false
 587 prefetch_use_cpu_id=true
 588 prefetcher_size=100
 589 prioritizeRequests=false
 590 repl=Null
 591 size=4194304
 592 subblock_size=0
 593 tgts_per_mshr=16
 594 trace_addr=0
 595 two_queue=false
 596 write_buffers=8
 597 cpu_side=system.toL2Bus.port[0]
 598 mem_side=system.membus.port[9]
 599
 600 [system.membus]
 601 type=Bus
 602 children=badaddr_responder
 603 block_size=64
 604 bus_id=1
 605 clock=1000
 606 header_cycles=1
 607 use_default_range=false
 608 width=64
 609 default=system.membus.badaddr_responder.pio
 610 port=system.bridge.slave system.nvmem.port[0] system.physmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.system_port system.iocache.mem_side system.l2c.mem_side
 611
 612 [system.membus.badaddr_responder]
 613 type=IsaFake
 614 fake_mem=false
 615 pio_addr=0
 616 pio_latency=1000
 617 pio_size=8
 618 platform=system.realview
 619 ret_bad_addr=true
 620 ret_data16=65535
 621 ret_data32=4294967295
 622 ret_data64=18446744073709551615
 623 ret_data8=255
 624 system=system
 625 update_data=false
 626 warn_access=warn
 627 pio=system.membus.default
 628
 629 [system.nvmem]
 630 type=PhysicalMemory
 631 file=
 632 latency=30000
 633 latency_var=0
 634 null=false
 635 range=2147483648:2214592511
 636 zero=true
 637 port=system.membus.port[1]
 638
 639 [system.physmem]
 640 type=PhysicalMemory
 641 file=
 642 latency=30000
 643 latency_var=0
 644 null=false
 645 range=0:134217727
 646 zero=true
 647 port=system.membus.port[2]
 648
 649 [system.realview]
 650 type=RealView
 651 children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake realview_io rtc_fake sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
 652 intrctrl=system.intrctrl
 653 pci_cfg_base=0
 654 system=system
 655
 656 [system.realview.a9scu]
 657 type=A9SCU
 658 pio_addr=520093696
 659 pio_latency=1000
 660 platform=system.realview
 661 system=system
 662 pio=system.membus.port[5]
 663
 664 [system.realview.aaci_fake]
 665 type=AmbaFake
 666 amba_id=0
 667 ignore_access=false
 668 pio_addr=268451840
 669 pio_latency=1000
 670 platform=system.realview
 671 system=system
 672 pio=system.iobus.port[24]
 673
 674 [system.realview.cf_ctrl]
 675 type=IdeController
 676 BAR0=402653184
 677 BAR0LegacyIO=true
 678 BAR0Size=16
 679 BAR1=402653440
 680 BAR1LegacyIO=true
 681 BAR1Size=1
 682 BAR2=1
 683 BAR2LegacyIO=false
 684 BAR2Size=8
 685 BAR3=1
 686 BAR3LegacyIO=false
 687 BAR3Size=4
 688 BAR4=1
 689 BAR4LegacyIO=false
 690 BAR4Size=16
 691 BAR5=1
 692 BAR5LegacyIO=false
 693 BAR5Size=0
 694 BIST=0
 695 CacheLineSize=0
 696 CardbusCIS=0
 697 ClassCode=1
 698 Command=1
 699 DeviceID=28945
 700 ExpansionROM=0
 701 HeaderType=0
 702 InterruptLine=31
 703 InterruptPin=1
 704 LatencyTimer=0
 705 MaximumLatency=0
 706 MinimumGrant=0
 707 ProgIF=133
 708 Revision=0
 709 Status=640
 710 SubClassCode=1
 711 SubsystemID=0
 712 SubsystemVendorID=0
 713 VendorID=32902
 714 config_latency=20000
 715 ctrl_offset=2
 716 disks=system.cf0
 717 io_shift=1
 718 max_backoff_delay=10000000
 719 min_backoff_delay=4000
 720 pci_bus=2
 721 pci_dev=7
 722 pci_func=0
 723 pio_latency=1000
 724 platform=system.realview
 725 system=system
 726 config=system.iobus.port[10]
 727 dma=system.iobus.port[11]
 728 pio=system.iobus.port[9]
 729
 730 [system.realview.clcd]
 731 type=Pl111
 732 amba_id=1315089
 733 clock=41667
 734 gic=system.realview.gic
 735 int_num=55
 736 max_backoff_delay=10000000
 737 min_backoff_delay=4000
 738 pio_addr=268566528
 739 pio_latency=10000
 740 platform=system.realview
 741 system=system
 742 vnc=system.vncserver
 743 dma=system.iobus.port[6]
 744 pio=system.iobus.port[5]
 745
 746 [system.realview.dmac_fake]
 747 type=AmbaFake
 748 amba_id=0
 749 ignore_access=false
 750 pio_addr=268632064
 751 pio_latency=1000
 752 platform=system.realview
 753 system=system
 754 pio=system.iobus.port[12]
 755
 756 [system.realview.flash_fake]
 757 type=IsaFake
 758 fake_mem=true
 759 pio_addr=1073741824
 760 pio_latency=1000
 761 pio_size=536870912
 762 platform=system.realview
 763 ret_bad_addr=false
 764 ret_data16=65535
 765 ret_data32=4294967295
 766 ret_data64=18446744073709551615
 767 ret_data8=255
 768 system=system
 769 update_data=false
 770 warn_access=
 771 pio=system.iobus.port[27]
 772
 773 [system.realview.gic]
 774 type=Gic
 775 cpu_addr=520093952
 776 cpu_pio_delay=10000
 777 dist_addr=520097792
 778 dist_pio_delay=10000
 779 int_latency=10000
 780 it_lines=128
 781 platform=system.realview
 782 system=system
 783 pio=system.membus.port[3]
 784
 785 [system.realview.gpio0_fake]
 786 type=AmbaFake
 787 amba_id=0
 788 ignore_access=false
 789 pio_addr=268513280
 790 pio_latency=1000
 791 platform=system.realview
 792 system=system
 793 pio=system.iobus.port[19]
 794
 795 [system.realview.gpio1_fake]
 796 type=AmbaFake
 797 amba_id=0
 798 ignore_access=false
 799 pio_addr=268517376
 800 pio_latency=1000
 801 platform=system.realview
 802 system=system
 803 pio=system.iobus.port[20]
 804
 805 [system.realview.gpio2_fake]
 806 type=AmbaFake
 807 amba_id=0
 808 ignore_access=false
 809 pio_addr=268521472
 810 pio_latency=1000
 811 platform=system.realview
 812 system=system
 813 pio=system.iobus.port[21]
 814
 815 [system.realview.kmi0]
 816 type=Pl050
 817 amba_id=1314896
 818 gic=system.realview.gic
 819 int_delay=1000000
 820 int_num=52
 821 is_mouse=false
 822 pio_addr=268460032
 823 pio_latency=1000
 824 platform=system.realview
 825 system=system
 826 vnc=system.vncserver
 827 pio=system.iobus.port[7]
 828
 829 [system.realview.kmi1]
 830 type=Pl050
 831 amba_id=1314896
 832 gic=system.realview.gic
 833 int_delay=1000000
 834 int_num=53
 835 is_mouse=true
 836 pio_addr=268464128
 837 pio_latency=1000
 838 platform=system.realview
 839 system=system
 840 vnc=system.vncserver
 841 pio=system.iobus.port[8]
 842
 843 [system.realview.l2x0_fake]
 844 type=IsaFake
 845 fake_mem=false
 846 pio_addr=520101888
 847 pio_latency=1000
 848 pio_size=4095
 849 platform=system.realview
 850 ret_bad_addr=false
 851 ret_data16=65535
 852 ret_data32=4294967295
 853 ret_data64=18446744073709551615
 854 ret_data8=255
 855 system=system
 856 update_data=false
 857 warn_access=
 858 pio=system.membus.port[4]
 859
 860 [system.realview.local_cpu_timer]
 861 type=CpuLocalTimer
 862 clock=1000
 863 gic=system.realview.gic
 864 int_num_timer=29
 865 int_num_watchdog=30
 866 pio_addr=520095232
 867 pio_latency=1000
 868 platform=system.realview
 869 system=system
 870 pio=system.membus.port[6]
 871
 872 [system.realview.mmc_fake]
 873 type=AmbaFake
 874 amba_id=0
 875 ignore_access=false
 876 pio_addr=268455936
 877 pio_latency=1000
 878 platform=system.realview
 879 system=system
 880 pio=system.iobus.port[25]
 881
 882 [system.realview.realview_io]
 883 type=RealViewCtrl
 884 idreg=0
 885 pio_addr=268435456
 886 pio_latency=1000
 887 platform=system.realview
 888 proc_id0=201326592
 889 proc_id1=201327138
 890 system=system
 891 pio=system.iobus.port[2]
 892
 893 [system.realview.rtc_fake]
 894 type=AmbaFake
 895 amba_id=266289
 896 ignore_access=false
 897 pio_addr=268529664
 898 pio_latency=1000
 899 platform=system.realview
 900 system=system
 901 pio=system.iobus.port[26]
 902
 903 [system.realview.sci_fake]
 904 type=AmbaFake
 905 amba_id=0
 906 ignore_access=false
 907 pio_addr=268492800
 908 pio_latency=1000
 909 platform=system.realview
 910 system=system
 911 pio=system.iobus.port[23]
 912
 913 [system.realview.smc_fake]
 914 type=AmbaFake
 915 amba_id=0
 916 ignore_access=false
 917 pio_addr=269357056
 918 pio_latency=1000
 919 platform=system.realview
 920 system=system
 921 pio=system.iobus.port[16]
 922
 923 [system.realview.sp810_fake]
 924 type=AmbaFake
 925 amba_id=0
 926 ignore_access=true
 927 pio_addr=268439552
 928 pio_latency=1000
 929 platform=system.realview
 930 system=system
 931 pio=system.iobus.port[17]
 932
 933 [system.realview.ssp_fake]
 934 type=AmbaFake
 935 amba_id=0
 936 ignore_access=false
 937 pio_addr=268488704
 938 pio_latency=1000
 939 platform=system.realview
 940 system=system
 941 pio=system.iobus.port[22]
 942
 943 [system.realview.timer0]
 944 type=Sp804
 945 amba_id=1316868
 946 clock0=1000000
 947 clock1=1000000
 948 gic=system.realview.gic
 949 int_num0=36
 950 int_num1=36
 951 pio_addr=268505088
 952 pio_latency=1000
 953 platform=system.realview
 954 system=system
 955 pio=system.iobus.port[3]
 956
 957 [system.realview.timer1]
 958 type=Sp804
 959 amba_id=1316868
 960 clock0=1000000
 961 clock1=1000000
 962 gic=system.realview.gic
 963 int_num0=37
 964 int_num1=37
 965 pio_addr=268509184
 966 pio_latency=1000
 967 platform=system.realview
 968 system=system
 969 pio=system.iobus.port[4]
 970
 971 [system.realview.uart]
 972 type=Pl011
 973 end_on_eot=false
 974 gic=system.realview.gic
 975 int_delay=100000
 976 int_num=44
 977 pio_addr=268472320
 978 pio_latency=1000
 979 platform=system.realview
 980 system=system
 981 terminal=system.terminal
 982 pio=system.iobus.port[1]
 983
 984 [system.realview.uart1_fake]
 985 type=AmbaFake
 986 amba_id=0
 987 ignore_access=false
 988 pio_addr=268476416
 989 pio_latency=1000
 990 platform=system.realview
 991 system=system
 992 pio=system.iobus.port[13]
 993
 994 [system.realview.uart2_fake]
 995 type=AmbaFake
 996 amba_id=0
 997 ignore_access=false
 998 pio_addr=268480512
 999 pio_latency=1000
1000 platform=system.realview
1001 system=system
1002 pio=system.iobus.port[14]
1003
1004 [system.realview.uart3_fake]
1005 type=AmbaFake
1006 amba_id=0
1007 ignore_access=false
1008 pio_addr=268484608
1009 pio_latency=1000
1010 platform=system.realview
1011 system=system
1012 pio=system.iobus.port[15]
1013
1014 [system.realview.watchdog_fake]
1015 type=AmbaFake
1016 amba_id=0
1017 ignore_access=false
1018 pio_addr=268500992
1019 pio_latency=1000
1020 platform=system.realview
1021 system=system
1022 pio=system.iobus.port[18]
1023
1024 [system.terminal]
1025 type=Terminal
1026 intr_control=system.intrctrl
1027 number=0
1028 output=true
1029 port=3456
1030
1031 [system.toL2Bus]
1032 type=Bus
1033 block_size=64
1034 bus_id=0
1035 clock=1000
1036 header_cycles=1
1037 use_default_range=false
1038 width=64
1039 port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
1040
1041 [system.vncserver]
1042 type=VncServer
1043 frame_capture=false
1044 number=0
1045 port=5900
1046