tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 eventq_index=0
   5 full_system=true
   6 sim_quantum=0
   7 time_sync_enable=false
   8 time_sync_period=100000000000
   9 time_sync_spin_threshold=100000000
  10
  11 [system]
  12 type=LinuxArmSystem
  13 children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
  14 atags_addr=134217728
  15 boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm
  16 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
  17 boot_release_addr=65528
  18 cache_line_size=64
  19 clk_domain=system.clk_domain
  20 dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
  21 early_kernel_symbols=false
  22 enable_context_switch_stats_dump=false
  23 eventq_index=0
  24 flags_addr=469827632
  25 gic_cpu_addr=738205696
  26 have_generic_timer=false
  27 have_large_asid_64=false
  28 have_lpae=false
  29 have_security=false
  30 have_virtualization=false
  31 highest_el_is_64=false
  32 init_param=0
  33 kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
  34 kernel_addr_check=true
  35 load_addr_mask=268435455
  36 load_offset=2147483648
  37 machine_type=VExpress_EMM
  38 mem_mode=timing
  39 mem_ranges=2147483648:2415919103
  40 memories=system.physmem system.realview.nvmem system.realview.vram
  41 mmap_using_noreserve=false
  42 multi_proc=true
  43 num_work_ids=16
  44 panic_on_oops=true
  45 panic_on_panic=true
  46 phys_addr_range_64=40
  47 readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
  48 reset_addr_64=0
  49 symbolfile=
  50 work_begin_ckpt_count=0
  51 work_begin_cpu_id_exit=-1
  52 work_begin_exit_count=0
  53 work_cpus_ckpt_count=0
  54 work_end_ckpt_count=0
  55 work_end_exit_count=0
  56 work_item_id=-1
  57 system_port=system.membus.slave[1]
  58
  59 [system.bridge]
  60 type=Bridge
  61 clk_domain=system.clk_domain
  62 delay=50000
  63 eventq_index=0
  64 ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
  65 req_size=16
  66 resp_size=16
  67 master=system.iobus.slave[0]
  68 slave=system.membus.master[0]
  69
  70 [system.cf0]
  71 type=IdeDisk
  72 children=image
  73 delay=1000000
  74 driveID=master
  75 eventq_index=0
  76 image=system.cf0.image
  77
  78 [system.cf0.image]
  79 type=CowDiskImage
  80 children=child
  81 child=system.cf0.image.child
  82 eventq_index=0
  83 image_file=
  84 read_only=false
  85 table_size=65536
  86
  87 [system.cf0.image.child]
  88 type=RawDiskImage
  89 eventq_index=0
  90 image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img
  91 read_only=true
  92
  93 [system.clk_domain]
  94 type=SrcClockDomain
  95 clock=1000
  96 domain_id=-1
  97 eventq_index=0
  98 init_perf_level=0
  99 voltage_domain=system.voltage_domain
 100
 101 [system.cpu]
 102 type=DerivO3CPU
 103 children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
 104 LFSTSize=1024
 105 LQEntries=16
 106 LSQCheckLoads=true
 107 LSQDepCheckShift=0
 108 SQEntries=16
 109 SSITSize=1024
 110 activity=0
 111 backComSize=5
 112 branchPred=system.cpu.branchPred
 113 cachePorts=200
 114 checker=Null
 115 clk_domain=system.cpu_clk_domain
 116 commitToDecodeDelay=1
 117 commitToFetchDelay=1
 118 commitToIEWDelay=1
 119 commitToRenameDelay=1
 120 commitWidth=8
 121 cpu_id=0
 122 decodeToFetchDelay=1
 123 decodeToRenameDelay=2
 124 decodeWidth=3
 125 dispatchWidth=6
 126 do_checkpoint_insts=true
 127 do_quiesce=true
 128 do_statistics_insts=true
 129 dstage2_mmu=system.cpu.dstage2_mmu
 130 dtb=system.cpu.dtb
 131 eventq_index=0
 132 fetchBufferSize=16
 133 fetchQueueSize=32
 134 fetchToDecodeDelay=3
 135 fetchTrapLatency=1
 136 fetchWidth=3
 137 forwardComSize=5
 138 fuPool=system.cpu.fuPool
 139 function_trace=false
 140 function_trace_start=0
 141 iewToCommitDelay=1
 142 iewToDecodeDelay=1
 143 iewToFetchDelay=1
 144 iewToRenameDelay=1
 145 interrupts=system.cpu.interrupts
 146 isa=system.cpu.isa
 147 issueToExecuteDelay=1
 148 issueWidth=8
 149 istage2_mmu=system.cpu.istage2_mmu
 150 itb=system.cpu.itb
 151 max_insts_all_threads=0
 152 max_insts_any_thread=0
 153 max_loads_all_threads=0
 154 max_loads_any_thread=0
 155 needsTSO=false
 156 numIQEntries=32
 157 numPhysCCRegs=640
 158 numPhysFloatRegs=192
 159 numPhysIntRegs=128
 160 numROBEntries=40
 161 numRobs=1
 162 numThreads=1
 163 profile=0
 164 progress_interval=0
 165 renameToDecodeDelay=1
 166 renameToFetchDelay=1
 167 renameToIEWDelay=1
 168 renameToROBDelay=1
 169 renameWidth=3
 170 simpoint_start_insts=
 171 smtCommitPolicy=RoundRobin
 172 smtFetchPolicy=SingleThread
 173 smtIQPolicy=Partitioned
 174 smtIQThreshold=100
 175 smtLSQPolicy=Partitioned
 176 smtLSQThreshold=100
 177 smtNumFetchingThreads=1
 178 smtROBPolicy=Partitioned
 179 smtROBThreshold=100
 180 socket_id=0
 181 squashWidth=8
 182 store_set_clear_period=250000
 183 switched_out=false
 184 system=system
 185 tracer=system.cpu.tracer
 186 trapLatency=13
 187 wbWidth=8
 188 workload=
 189 dcache_port=system.cpu.dcache.cpu_side
 190 icache_port=system.cpu.icache.cpu_side
 191
 192 [system.cpu.branchPred]
 193 type=BiModeBP
 194 BTBEntries=2048
 195 BTBTagSize=18
 196 RASSize=16
 197 choiceCtrBits=2
 198 choicePredictorSize=8192
 199 eventq_index=0
 200 globalCtrBits=2
 201 globalPredictorSize=8192
 202 instShiftAmt=2
 203 numThreads=1
 204
 205 [system.cpu.dcache]
 206 type=BaseCache
 207 children=tags
 208 addr_ranges=0:18446744073709551615
 209 assoc=4
 210 clk_domain=system.cpu_clk_domain
 211 demand_mshr_reserve=1
 212 eventq_index=0
 213 forward_snoops=true
 214 hit_latency=2
 215 is_read_only=false
 216 max_miss_count=0
 217 mshrs=4
 218 prefetch_on_access=false
 219 prefetcher=Null
 220 response_latency=2
 221 sequential_access=false
 222 size=32768
 223 system=system
 224 tags=system.cpu.dcache.tags
 225 tgts_per_mshr=20
 226 write_buffers=8
 227 cpu_side=system.cpu.dcache_port
 228 mem_side=system.cpu.toL2Bus.slave[1]
 229
 230 [system.cpu.dcache.tags]
 231 type=LRU
 232 assoc=4
 233 block_size=64
 234 clk_domain=system.cpu_clk_domain
 235 eventq_index=0
 236 hit_latency=2
 237 sequential_access=false
 238 size=32768
 239
 240 [system.cpu.dstage2_mmu]
 241 type=ArmStage2MMU
 242 children=stage2_tlb
 243 eventq_index=0
 244 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
 245 sys=system
 246 tlb=system.cpu.dtb
 247
 248 [system.cpu.dstage2_mmu.stage2_tlb]
 249 type=ArmTLB
 250 children=walker
 251 eventq_index=0
 252 is_stage2=true
 253 size=32
 254 walker=system.cpu.dstage2_mmu.stage2_tlb.walker
 255
 256 [system.cpu.dstage2_mmu.stage2_tlb.walker]
 257 type=ArmTableWalker
 258 clk_domain=system.cpu_clk_domain
 259 eventq_index=0
 260 is_stage2=true
 261 num_squash_per_cycle=2
 262 sys=system
 263
 264 [system.cpu.dtb]
 265 type=ArmTLB
 266 children=walker
 267 eventq_index=0
 268 is_stage2=false
 269 size=64
 270 walker=system.cpu.dtb.walker
 271
 272 [system.cpu.dtb.walker]
 273 type=ArmTableWalker
 274 clk_domain=system.cpu_clk_domain
 275 eventq_index=0
 276 is_stage2=false
 277 num_squash_per_cycle=2
 278 sys=system
 279 port=system.cpu.toL2Bus.slave[3]
 280
 281 [system.cpu.fuPool]
 282 type=FUPool
 283 children=FUList0 FUList1 FUList2 FUList3 FUList4
 284 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4
 285 eventq_index=0
 286
 287 [system.cpu.fuPool.FUList0]
 288 type=FUDesc
 289 children=opList
 290 count=2
 291 eventq_index=0
 292 opList=system.cpu.fuPool.FUList0.opList
 293
 294 [system.cpu.fuPool.FUList0.opList]
 295 type=OpDesc
 296 eventq_index=0
 297 opClass=IntAlu
 298 opLat=1
 299 pipelined=true
 300
 301 [system.cpu.fuPool.FUList1]
 302 type=FUDesc
 303 children=opList0 opList1 opList2
 304 count=1
 305 eventq_index=0
 306 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 system.cpu.fuPool.FUList1.opList2
 307
 308 [system.cpu.fuPool.FUList1.opList0]
 309 type=OpDesc
 310 eventq_index=0
 311 opClass=IntMult
 312 opLat=3
 313 pipelined=true
 314
 315 [system.cpu.fuPool.FUList1.opList1]
 316 type=OpDesc
 317 eventq_index=0
 318 opClass=IntDiv
 319 opLat=12
 320 pipelined=false
 321
 322 [system.cpu.fuPool.FUList1.opList2]
 323 type=OpDesc
 324 eventq_index=0
 325 opClass=IprAccess
 326 opLat=3
 327 pipelined=true
 328
 329 [system.cpu.fuPool.FUList2]
 330 type=FUDesc
 331 children=opList
 332 count=1
 333 eventq_index=0
 334 opList=system.cpu.fuPool.FUList2.opList
 335
 336 [system.cpu.fuPool.FUList2.opList]
 337 type=OpDesc
 338 eventq_index=0
 339 opClass=MemRead
 340 opLat=2
 341 pipelined=true
 342
 343 [system.cpu.fuPool.FUList3]
 344 type=FUDesc
 345 children=opList
 346 count=1
 347 eventq_index=0
 348 opList=system.cpu.fuPool.FUList3.opList
 349
 350 [system.cpu.fuPool.FUList3.opList]
 351 type=OpDesc
 352 eventq_index=0
 353 opClass=MemWrite
 354 opLat=2
 355 pipelined=true
 356
 357 [system.cpu.fuPool.FUList4]
 358 type=FUDesc
 359 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25
 360 count=2
 361 eventq_index=0
 362 opList=system.cpu.fuPool.FUList4.opList00 system.cpu.fuPool.FUList4.opList01 system.cpu.fuPool.FUList4.opList02 system.cpu.fuPool.FUList4.opList03 system.cpu.fuPool.FUList4.opList04 system.cpu.fuPool.FUList4.opList05 system.cpu.fuPool.FUList4.opList06 system.cpu.fuPool.FUList4.opList07 system.cpu.fuPool.FUList4.opList08 system.cpu.fuPool.FUList4.opList09 system.cpu.fuPool.FUList4.opList10 system.cpu.fuPool.FUList4.opList11 system.cpu.fuPool.FUList4.opList12 system.cpu.fuPool.FUList4.opList13 system.cpu.fuPool.FUList4.opList14 system.cpu.fuPool.FUList4.opList15 system.cpu.fuPool.FUList4.opList16 system.cpu.fuPool.FUList4.opList17 system.cpu.fuPool.FUList4.opList18 system.cpu.fuPool.FUList4.opList19 system.cpu.fuPool.FUList4.opList20 system.cpu.fuPool.FUList4.opList21 system.cpu.fuPool.FUList4.opList22 system.cpu.fuPool.FUList4.opList23 system.cpu.fuPool.FUList4.opList24 system.cpu.fuPool.FUList4.opList25
 363
 364 [system.cpu.fuPool.FUList4.opList00]
 365 type=OpDesc
 366 eventq_index=0
 367 opClass=SimdAdd
 368 opLat=4
 369 pipelined=true
 370
 371 [system.cpu.fuPool.FUList4.opList01]
 372 type=OpDesc
 373 eventq_index=0
 374 opClass=SimdAddAcc
 375 opLat=4
 376 pipelined=true
 377
 378 [system.cpu.fuPool.FUList4.opList02]
 379 type=OpDesc
 380 eventq_index=0
 381 opClass=SimdAlu
 382 opLat=4
 383 pipelined=true
 384
 385 [system.cpu.fuPool.FUList4.opList03]
 386 type=OpDesc
 387 eventq_index=0
 388 opClass=SimdCmp
 389 opLat=4
 390 pipelined=true
 391
 392 [system.cpu.fuPool.FUList4.opList04]
 393 type=OpDesc
 394 eventq_index=0
 395 opClass=SimdCvt
 396 opLat=3
 397 pipelined=true
 398
 399 [system.cpu.fuPool.FUList4.opList05]
 400 type=OpDesc
 401 eventq_index=0
 402 opClass=SimdMisc
 403 opLat=3
 404 pipelined=true
 405
 406 [system.cpu.fuPool.FUList4.opList06]
 407 type=OpDesc
 408 eventq_index=0
 409 opClass=SimdMult
 410 opLat=5
 411 pipelined=true
 412
 413 [system.cpu.fuPool.FUList4.opList07]
 414 type=OpDesc
 415 eventq_index=0
 416 opClass=SimdMultAcc
 417 opLat=5
 418 pipelined=true
 419
 420 [system.cpu.fuPool.FUList4.opList08]
 421 type=OpDesc
 422 eventq_index=0
 423 opClass=SimdShift
 424 opLat=3
 425 pipelined=true
 426
 427 [system.cpu.fuPool.FUList4.opList09]
 428 type=OpDesc
 429 eventq_index=0
 430 opClass=SimdShiftAcc
 431 opLat=3
 432 pipelined=true
 433
 434 [system.cpu.fuPool.FUList4.opList10]
 435 type=OpDesc
 436 eventq_index=0
 437 opClass=SimdSqrt
 438 opLat=9
 439 pipelined=true
 440
 441 [system.cpu.fuPool.FUList4.opList11]
 442 type=OpDesc
 443 eventq_index=0
 444 opClass=SimdFloatAdd
 445 opLat=5
 446 pipelined=true
 447
 448 [system.cpu.fuPool.FUList4.opList12]
 449 type=OpDesc
 450 eventq_index=0
 451 opClass=SimdFloatAlu
 452 opLat=5
 453 pipelined=true
 454
 455 [system.cpu.fuPool.FUList4.opList13]
 456 type=OpDesc
 457 eventq_index=0
 458 opClass=SimdFloatCmp
 459 opLat=3
 460 pipelined=true
 461
 462 [system.cpu.fuPool.FUList4.opList14]
 463 type=OpDesc
 464 eventq_index=0
 465 opClass=SimdFloatCvt
 466 opLat=3
 467 pipelined=true
 468
 469 [system.cpu.fuPool.FUList4.opList15]
 470 type=OpDesc
 471 eventq_index=0
 472 opClass=SimdFloatDiv
 473 opLat=3
 474 pipelined=true
 475
 476 [system.cpu.fuPool.FUList4.opList16]
 477 type=OpDesc
 478 eventq_index=0
 479 opClass=SimdFloatMisc
 480 opLat=3
 481 pipelined=true
 482
 483 [system.cpu.fuPool.FUList4.opList17]
 484 type=OpDesc
 485 eventq_index=0
 486 opClass=SimdFloatMult
 487 opLat=3
 488 pipelined=true
 489
 490 [system.cpu.fuPool.FUList4.opList18]
 491 type=OpDesc
 492 eventq_index=0
 493 opClass=SimdFloatMultAcc
 494 opLat=1
 495 pipelined=true
 496
 497 [system.cpu.fuPool.FUList4.opList19]
 498 type=OpDesc
 499 eventq_index=0
 500 opClass=SimdFloatSqrt
 501 opLat=9
 502 pipelined=true
 503
 504 [system.cpu.fuPool.FUList4.opList20]
 505 type=OpDesc
 506 eventq_index=0
 507 opClass=FloatAdd
 508 opLat=5
 509 pipelined=true
 510
 511 [system.cpu.fuPool.FUList4.opList21]
 512 type=OpDesc
 513 eventq_index=0
 514 opClass=FloatCmp
 515 opLat=5
 516 pipelined=true
 517
 518 [system.cpu.fuPool.FUList4.opList22]
 519 type=OpDesc
 520 eventq_index=0
 521 opClass=FloatCvt
 522 opLat=5
 523 pipelined=true
 524
 525 [system.cpu.fuPool.FUList4.opList23]
 526 type=OpDesc
 527 eventq_index=0
 528 opClass=FloatDiv
 529 opLat=9
 530 pipelined=false
 531
 532 [system.cpu.fuPool.FUList4.opList24]
 533 type=OpDesc
 534 eventq_index=0
 535 opClass=FloatSqrt
 536 opLat=33
 537 pipelined=false
 538
 539 [system.cpu.fuPool.FUList4.opList25]
 540 type=OpDesc
 541 eventq_index=0
 542 opClass=FloatMult
 543 opLat=4
 544 pipelined=true
 545
 546 [system.cpu.icache]
 547 type=BaseCache
 548 children=tags
 549 addr_ranges=0:18446744073709551615
 550 assoc=1
 551 clk_domain=system.cpu_clk_domain
 552 demand_mshr_reserve=1
 553 eventq_index=0
 554 forward_snoops=true
 555 hit_latency=2
 556 is_read_only=true
 557 max_miss_count=0
 558 mshrs=4
 559 prefetch_on_access=false
 560 prefetcher=Null
 561 response_latency=2
 562 sequential_access=false
 563 size=32768
 564 system=system
 565 tags=system.cpu.icache.tags
 566 tgts_per_mshr=20
 567 write_buffers=8
 568 cpu_side=system.cpu.icache_port
 569 mem_side=system.cpu.toL2Bus.slave[0]
 570
 571 [system.cpu.icache.tags]
 572 type=LRU
 573 assoc=1
 574 block_size=64
 575 clk_domain=system.cpu_clk_domain
 576 eventq_index=0
 577 hit_latency=2
 578 sequential_access=false
 579 size=32768
 580
 581 [system.cpu.interrupts]
 582 type=ArmInterrupts
 583 eventq_index=0
 584
 585 [system.cpu.isa]
 586 type=ArmISA
 587 eventq_index=0
 588 fpsid=1090793632
 589 id_aa64afr0_el1=0
 590 id_aa64afr1_el1=0
 591 id_aa64dfr0_el1=1052678
 592 id_aa64dfr1_el1=0
 593 id_aa64isar0_el1=0
 594 id_aa64isar1_el1=0
 595 id_aa64mmfr0_el1=15728642
 596 id_aa64mmfr1_el1=0
 597 id_aa64pfr0_el1=17
 598 id_aa64pfr1_el1=0
 599 id_isar0=34607377
 600 id_isar1=34677009
 601 id_isar2=555950401
 602 id_isar3=17899825
 603 id_isar4=268501314
 604 id_isar5=0
 605 id_mmfr0=270536963
 606 id_mmfr1=0
 607 id_mmfr2=19070976
 608 id_mmfr3=34611729
 609 id_pfr0=49
 610 id_pfr1=4113
 611 midr=1091551472
 612 pmu=Null
 613 system=system
 614
 615 [system.cpu.istage2_mmu]
 616 type=ArmStage2MMU
 617 children=stage2_tlb
 618 eventq_index=0
 619 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
 620 sys=system
 621 tlb=system.cpu.itb
 622
 623 [system.cpu.istage2_mmu.stage2_tlb]
 624 type=ArmTLB
 625 children=walker
 626 eventq_index=0
 627 is_stage2=true
 628 size=32
 629 walker=system.cpu.istage2_mmu.stage2_tlb.walker
 630
 631 [system.cpu.istage2_mmu.stage2_tlb.walker]
 632 type=ArmTableWalker
 633 clk_domain=system.cpu_clk_domain
 634 eventq_index=0
 635 is_stage2=true
 636 num_squash_per_cycle=2
 637 sys=system
 638
 639 [system.cpu.itb]
 640 type=ArmTLB
 641 children=walker
 642 eventq_index=0
 643 is_stage2=false
 644 size=64
 645 walker=system.cpu.itb.walker
 646
 647 [system.cpu.itb.walker]
 648 type=ArmTableWalker
 649 clk_domain=system.cpu_clk_domain
 650 eventq_index=0
 651 is_stage2=false
 652 num_squash_per_cycle=2
 653 sys=system
 654 port=system.cpu.toL2Bus.slave[2]
 655
 656 [system.cpu.l2cache]
 657 type=BaseCache
 658 children=tags
 659 addr_ranges=0:18446744073709551615
 660 assoc=8
 661 clk_domain=system.cpu_clk_domain
 662 demand_mshr_reserve=1
 663 eventq_index=0
 664 forward_snoops=true
 665 hit_latency=20
 666 is_read_only=false
 667 max_miss_count=0
 668 mshrs=20
 669 prefetch_on_access=false
 670 prefetcher=Null
 671 response_latency=20
 672 sequential_access=false
 673 size=4194304
 674 system=system
 675 tags=system.cpu.l2cache.tags
 676 tgts_per_mshr=12
 677 write_buffers=8
 678 cpu_side=system.cpu.toL2Bus.master[0]
 679 mem_side=system.membus.slave[2]
 680
 681 [system.cpu.l2cache.tags]
 682 type=LRU
 683 assoc=8
 684 block_size=64
 685 clk_domain=system.cpu_clk_domain
 686 eventq_index=0
 687 hit_latency=20
 688 sequential_access=false
 689 size=4194304
 690
 691 [system.cpu.toL2Bus]
 692 type=CoherentXBar
 693 clk_domain=system.cpu_clk_domain
 694 eventq_index=0
 695 forward_latency=0
 696 frontend_latency=1
 697 response_latency=1
 698 snoop_filter=Null
 699 snoop_response_latency=1
 700 system=system
 701 use_default_range=false
 702 width=32
 703 master=system.cpu.l2cache.cpu_side
 704 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
 705
 706 [system.cpu.tracer]
 707 type=ExeTracer
 708 eventq_index=0
 709
 710 [system.cpu_clk_domain]
 711 type=SrcClockDomain
 712 clock=500
 713 domain_id=-1
 714 eventq_index=0
 715 init_perf_level=0
 716 voltage_domain=system.voltage_domain
 717
 718 [system.dvfs_handler]
 719 type=DVFSHandler
 720 domains=
 721 enable=false
 722 eventq_index=0
 723 sys_clk_domain=system.clk_domain
 724 transition_latency=100000000
 725
 726 [system.intrctrl]
 727 type=IntrControl
 728 eventq_index=0
 729 sys=system
 730
 731 [system.iobus]
 732 type=NoncoherentXBar
 733 clk_domain=system.clk_domain
 734 eventq_index=0
 735 forward_latency=1
 736 frontend_latency=2
 737 response_latency=2
 738 use_default_range=true
 739 width=16
 740 default=system.realview.pciconfig.pio
 741 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
 742 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
 743
 744 [system.iocache]
 745 type=BaseCache
 746 children=tags
 747 addr_ranges=2147483648:2415919103
 748 assoc=8
 749 clk_domain=system.clk_domain
 750 demand_mshr_reserve=1
 751 eventq_index=0
 752 forward_snoops=false
 753 hit_latency=50
 754 is_read_only=false
 755 max_miss_count=0
 756 mshrs=20
 757 prefetch_on_access=false
 758 prefetcher=Null
 759 response_latency=50
 760 sequential_access=false
 761 size=1024
 762 system=system
 763 tags=system.iocache.tags
 764 tgts_per_mshr=12
 765 write_buffers=8
 766 cpu_side=system.iobus.master[27]
 767 mem_side=system.membus.slave[3]
 768
 769 [system.iocache.tags]
 770 type=LRU
 771 assoc=8
 772 block_size=64
 773 clk_domain=system.clk_domain
 774 eventq_index=0
 775 hit_latency=50
 776 sequential_access=false
 777 size=1024
 778
 779 [system.membus]
 780 type=CoherentXBar
 781 children=badaddr_responder
 782 clk_domain=system.clk_domain
 783 eventq_index=0
 784 forward_latency=4
 785 frontend_latency=3
 786 response_latency=2
 787 snoop_filter=Null
 788 snoop_response_latency=4
 789 system=system
 790 use_default_range=false
 791 width=16
 792 default=system.membus.badaddr_responder.pio
 793 master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
 794 slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
 795
 796 [system.membus.badaddr_responder]
 797 type=IsaFake
 798 clk_domain=system.clk_domain
 799 eventq_index=0
 800 fake_mem=false
 801 pio_addr=0
 802 pio_latency=100000
 803 pio_size=8
 804 ret_bad_addr=true
 805 ret_data16=65535
 806 ret_data32=4294967295
 807 ret_data64=18446744073709551615
 808 ret_data8=255
 809 system=system
 810 update_data=false
 811 warn_access=warn
 812 pio=system.membus.default
 813
 814 [system.physmem]
 815 type=DRAMCtrl
 816 IDD0=0.075000
 817 IDD02=0.000000
 818 IDD2N=0.050000
 819 IDD2N2=0.000000
 820 IDD2P0=0.000000
 821 IDD2P02=0.000000
 822 IDD2P1=0.000000
 823 IDD2P12=0.000000
 824 IDD3N=0.057000
 825 IDD3N2=0.000000
 826 IDD3P0=0.000000
 827 IDD3P02=0.000000
 828 IDD3P1=0.000000
 829 IDD3P12=0.000000
 830 IDD4R=0.187000
 831 IDD4R2=0.000000
 832 IDD4W=0.165000
 833 IDD4W2=0.000000
 834 IDD5=0.220000
 835 IDD52=0.000000
 836 IDD6=0.000000
 837 IDD62=0.000000
 838 VDD=1.500000
 839 VDD2=0.000000
 840 activation_limit=4
 841 addr_mapping=RoRaBaCoCh
 842 bank_groups_per_rank=0
 843 banks_per_rank=8
 844 burst_length=8
 845 channels=1
 846 clk_domain=system.clk_domain
 847 conf_table_reported=true
 848 device_bus_width=8
 849 device_rowbuffer_size=1024
 850 device_size=536870912
 851 devices_per_rank=8
 852 dll=true
 853 eventq_index=0
 854 in_addr_map=true
 855 max_accesses_per_row=16
 856 mem_sched_policy=frfcfs
 857 min_writes_per_switch=16
 858 null=false
 859 page_policy=open_adaptive
 860 range=2147483648:2415919103
 861 ranks_per_channel=2
 862 read_buffer_size=32
 863 static_backend_latency=10000
 864 static_frontend_latency=10000
 865 tBURST=5000
 866 tCCD_L=0
 867 tCK=1250
 868 tCL=13750
 869 tCS=2500
 870 tRAS=35000
 871 tRCD=13750
 872 tREFI=7800000
 873 tRFC=260000
 874 tRP=13750
 875 tRRD=6000
 876 tRRD_L=0
 877 tRTP=7500
 878 tRTW=2500
 879 tWR=15000
 880 tWTR=7500
 881 tXAW=30000
 882 tXP=0
 883 tXPDLL=0
 884 tXS=0
 885 tXSDLL=0
 886 write_buffer_size=64
 887 write_high_thresh_perc=85
 888 write_low_thresh_perc=50
 889 port=system.membus.master[5]
 890
 891 [system.realview]
 892 type=RealView
 893 children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
 894 eventq_index=0
 895 intrctrl=system.intrctrl
 896 pci_cfg_base=805306368
 897 pci_cfg_gen_offsets=false
 898 pci_io_base=0
 899 system=system
 900
 901 [system.realview.aaci_fake]
 902 type=AmbaFake
 903 amba_id=0
 904 clk_domain=system.clk_domain
 905 eventq_index=0
 906 ignore_access=false
 907 pio_addr=470024192
 908 pio_latency=100000
 909 system=system
 910 pio=system.iobus.master[18]
 911
 912 [system.realview.cf_ctrl]
 913 type=IdeController
 914 BAR0=471465984
 915 BAR0LegacyIO=true
 916 BAR0Size=256
 917 BAR1=471466240
 918 BAR1LegacyIO=true
 919 BAR1Size=4096
 920 BAR2=1
 921 BAR2LegacyIO=false
 922 BAR2Size=8
 923 BAR3=1
 924 BAR3LegacyIO=false
 925 BAR3Size=4
 926 BAR4=1
 927 BAR4LegacyIO=false
 928 BAR4Size=16
 929 BAR5=1
 930 BAR5LegacyIO=false
 931 BAR5Size=0
 932 BIST=0
 933 CacheLineSize=0
 934 CapabilityPtr=0
 935 CardbusCIS=0
 936 ClassCode=1
 937 Command=1
 938 DeviceID=28945
 939 ExpansionROM=0
 940 HeaderType=0
 941 InterruptLine=31
 942 InterruptPin=1
 943 LatencyTimer=0
 944 LegacyIOBase=0
 945 MSICAPBaseOffset=0
 946 MSICAPCapId=0
 947 MSICAPMaskBits=0
 948 MSICAPMsgAddr=0
 949 MSICAPMsgCtrl=0
 950 MSICAPMsgData=0
 951 MSICAPMsgUpperAddr=0
 952 MSICAPNextCapability=0
 953 MSICAPPendingBits=0
 954 MSIXCAPBaseOffset=0
 955 MSIXCAPCapId=0
 956 MSIXCAPNextCapability=0
 957 MSIXMsgCtrl=0
 958 MSIXPbaOffset=0
 959 MSIXTableOffset=0
 960 MaximumLatency=0
 961 MinimumGrant=0
 962 PMCAPBaseOffset=0
 963 PMCAPCapId=0
 964 PMCAPCapabilities=0
 965 PMCAPCtrlStatus=0
 966 PMCAPNextCapability=0
 967 PXCAPBaseOffset=0
 968 PXCAPCapId=0
 969 PXCAPCapabilities=0
 970 PXCAPDevCap2=0
 971 PXCAPDevCapabilities=0
 972 PXCAPDevCtrl=0
 973 PXCAPDevCtrl2=0
 974 PXCAPDevStatus=0
 975 PXCAPLinkCap=0
 976 PXCAPLinkCtrl=0
 977 PXCAPLinkStatus=0
 978 PXCAPNextCapability=0
 979 ProgIF=133
 980 Revision=0
 981 Status=640
 982 SubClassCode=1
 983 SubsystemID=0
 984 SubsystemVendorID=0
 985 VendorID=32902
 986 clk_domain=system.clk_domain
 987 config_latency=20000
 988 ctrl_offset=2
 989 disks=
 990 eventq_index=0
 991 io_shift=2
 992 pci_bus=2
 993 pci_dev=0
 994 pci_func=0
 995 pio_latency=30000
 996 platform=system.realview
 997 system=system
 998 config=system.iobus.master[9]
 999 dma=system.iobus.slave[2]
1000 pio=system.iobus.master[8]
1001
1002 [system.realview.clcd]
1003 type=Pl111
1004 amba_id=1315089
1005 clk_domain=system.clk_domain
1006 enable_capture=true
1007 eventq_index=0
1008 gic=system.realview.gic
1009 int_num=46
1010 pio_addr=471793664
1011 pio_latency=10000
1012 pixel_clock=41667
1013 system=system
1014 vnc=system.vncserver
1015 dma=system.iobus.slave[1]
1016 pio=system.iobus.master[4]
1017
1018 [system.realview.energy_ctrl]
1019 type=EnergyCtrl
1020 clk_domain=system.clk_domain
1021 dvfs_handler=system.dvfs_handler
1022 eventq_index=0
1023 pio_addr=470286336
1024 pio_latency=100000
1025 system=system
1026 pio=system.iobus.master[22]
1027
1028 [system.realview.ethernet]
1029 type=IGbE
1030 BAR0=0
1031 BAR0LegacyIO=false
1032 BAR0Size=131072
1033 BAR1=0
1034 BAR1LegacyIO=false
1035 BAR1Size=0
1036 BAR2=0
1037 BAR2LegacyIO=false
1038 BAR2Size=0
1039 BAR3=0
1040 BAR3LegacyIO=false
1041 BAR3Size=0
1042 BAR4=0
1043 BAR4LegacyIO=false
1044 BAR4Size=0
1045 BAR5=0
1046 BAR5LegacyIO=false
1047 BAR5Size=0
1048 BIST=0
1049 CacheLineSize=0
1050 CapabilityPtr=0
1051 CardbusCIS=0
1052 ClassCode=2
1053 Command=0
1054 DeviceID=4213
1055 ExpansionROM=0
1056 HeaderType=0
1057 InterruptLine=1
1058 InterruptPin=1
1059 LatencyTimer=0
1060 LegacyIOBase=0
1061 MSICAPBaseOffset=0
1062 MSICAPCapId=0
1063 MSICAPMaskBits=0
1064 MSICAPMsgAddr=0
1065 MSICAPMsgCtrl=0
1066 MSICAPMsgData=0
1067 MSICAPMsgUpperAddr=0
1068 MSICAPNextCapability=0
1069 MSICAPPendingBits=0
1070 MSIXCAPBaseOffset=0
1071 MSIXCAPCapId=0
1072 MSIXCAPNextCapability=0
1073 MSIXMsgCtrl=0
1074 MSIXPbaOffset=0
1075 MSIXTableOffset=0
1076 MaximumLatency=0
1077 MinimumGrant=255
1078 PMCAPBaseOffset=0
1079 PMCAPCapId=0
1080 PMCAPCapabilities=0
1081 PMCAPCtrlStatus=0
1082 PMCAPNextCapability=0
1083 PXCAPBaseOffset=0
1084 PXCAPCapId=0
1085 PXCAPCapabilities=0
1086 PXCAPDevCap2=0
1087 PXCAPDevCapabilities=0
1088 PXCAPDevCtrl=0
1089 PXCAPDevCtrl2=0
1090 PXCAPDevStatus=0
1091 PXCAPLinkCap=0
1092 PXCAPLinkCtrl=0
1093 PXCAPLinkStatus=0
1094 PXCAPNextCapability=0
1095 ProgIF=0
1096 Revision=0
1097 Status=0
1098 SubClassCode=0
1099 SubsystemID=4104
1100 SubsystemVendorID=32902
1101 VendorID=32902
1102 clk_domain=system.clk_domain
1103 config_latency=20000
1104 eventq_index=0
1105 fetch_comp_delay=10000
1106 fetch_delay=10000
1107 hardware_address=00:90:00:00:00:01
1108 pci_bus=0
1109 pci_dev=0
1110 pci_func=0
1111 phy_epid=896
1112 phy_pid=680
1113 pio_latency=30000
1114 platform=system.realview
1115 rx_desc_cache_size=64
1116 rx_fifo_size=393216
1117 rx_write_delay=0
1118 system=system
1119 tx_desc_cache_size=64
1120 tx_fifo_size=393216
1121 tx_read_delay=0
1122 wb_comp_delay=10000
1123 wb_delay=10000
1124 config=system.iobus.master[26]
1125 dma=system.iobus.slave[4]
1126 pio=system.iobus.master[25]
1127
1128 [system.realview.generic_timer]
1129 type=GenericTimer
1130 eventq_index=0
1131 gic=system.realview.gic
1132 int_phys=29
1133 int_virt=27
1134 system=system
1135
1136 [system.realview.gic]
1137 type=Pl390
1138 clk_domain=system.clk_domain
1139 cpu_addr=738205696
1140 cpu_pio_delay=10000
1141 dist_addr=738201600
1142 dist_pio_delay=10000
1143 eventq_index=0
1144 int_latency=10000
1145 it_lines=128
1146 platform=system.realview
1147 system=system
1148 pio=system.membus.master[2]
1149
1150 [system.realview.hdlcd]
1151 type=HDLcd
1152 amba_id=1314816
1153 clk_domain=system.clk_domain
1154 enable_capture=true
1155 eventq_index=0
1156 gic=system.realview.gic
1157 int_num=117
1158 pio_addr=721420288
1159 pio_latency=10000
1160 pixel_clock=7299
1161 system=system
1162 vnc=system.vncserver
1163 workaround_swap_rb=true
1164 dma=system.membus.slave[0]
1165 pio=system.iobus.master[5]
1166
1167 [system.realview.ide]
1168 type=IdeController
1169 BAR0=1
1170 BAR0LegacyIO=false
1171 BAR0Size=8
1172 BAR1=1
1173 BAR1LegacyIO=false
1174 BAR1Size=4
1175 BAR2=1
1176 BAR2LegacyIO=false
1177 BAR2Size=8
1178 BAR3=1
1179 BAR3LegacyIO=false
1180 BAR3Size=4
1181 BAR4=1
1182 BAR4LegacyIO=false
1183 BAR4Size=16
1184 BAR5=1
1185 BAR5LegacyIO=false
1186 BAR5Size=0
1187 BIST=0
1188 CacheLineSize=0
1189 CapabilityPtr=0
1190 CardbusCIS=0
1191 ClassCode=1
1192 Command=0
1193 DeviceID=28945
1194 ExpansionROM=0
1195 HeaderType=0
1196 InterruptLine=2
1197 InterruptPin=2
1198 LatencyTimer=0
1199 LegacyIOBase=0
1200 MSICAPBaseOffset=0
1201 MSICAPCapId=0
1202 MSICAPMaskBits=0
1203 MSICAPMsgAddr=0
1204 MSICAPMsgCtrl=0
1205 MSICAPMsgData=0
1206 MSICAPMsgUpperAddr=0
1207 MSICAPNextCapability=0
1208 MSICAPPendingBits=0
1209 MSIXCAPBaseOffset=0
1210 MSIXCAPCapId=0
1211 MSIXCAPNextCapability=0
1212 MSIXMsgCtrl=0
1213 MSIXPbaOffset=0
1214 MSIXTableOffset=0
1215 MaximumLatency=0
1216 MinimumGrant=0
1217 PMCAPBaseOffset=0
1218 PMCAPCapId=0
1219 PMCAPCapabilities=0
1220 PMCAPCtrlStatus=0
1221 PMCAPNextCapability=0
1222 PXCAPBaseOffset=0
1223 PXCAPCapId=0
1224 PXCAPCapabilities=0
1225 PXCAPDevCap2=0
1226 PXCAPDevCapabilities=0
1227 PXCAPDevCtrl=0
1228 PXCAPDevCtrl2=0
1229 PXCAPDevStatus=0
1230 PXCAPLinkCap=0
1231 PXCAPLinkCtrl=0
1232 PXCAPLinkStatus=0
1233 PXCAPNextCapability=0
1234 ProgIF=133
1235 Revision=0
1236 Status=640
1237 SubClassCode=1
1238 SubsystemID=0
1239 SubsystemVendorID=0
1240 VendorID=32902
1241 clk_domain=system.clk_domain
1242 config_latency=20000
1243 ctrl_offset=0
1244 disks=system.cf0
1245 eventq_index=0
1246 io_shift=0
1247 pci_bus=0
1248 pci_dev=1
1249 pci_func=0
1250 pio_latency=30000
1251 platform=system.realview
1252 system=system
1253 config=system.iobus.master[24]
1254 dma=system.iobus.slave[3]
1255 pio=system.iobus.master[23]
1256
1257 [system.realview.kmi0]
1258 type=Pl050
1259 amba_id=1314896
1260 clk_domain=system.clk_domain
1261 eventq_index=0
1262 gic=system.realview.gic
1263 int_delay=1000000
1264 int_num=44
1265 is_mouse=false
1266 pio_addr=470155264
1267 pio_latency=100000
1268 system=system
1269 vnc=system.vncserver
1270 pio=system.iobus.master[6]
1271
1272 [system.realview.kmi1]
1273 type=Pl050
1274 amba_id=1314896
1275 clk_domain=system.clk_domain
1276 eventq_index=0
1277 gic=system.realview.gic
1278 int_delay=1000000
1279 int_num=45
1280 is_mouse=true
1281 pio_addr=470220800
1282 pio_latency=100000
1283 system=system
1284 vnc=system.vncserver
1285 pio=system.iobus.master[7]
1286
1287 [system.realview.l2x0_fake]
1288 type=IsaFake
1289 clk_domain=system.clk_domain
1290 eventq_index=0
1291 fake_mem=false
1292 pio_addr=739246080
1293 pio_latency=100000
1294 pio_size=4095
1295 ret_bad_addr=false
1296 ret_data16=65535
1297 ret_data32=4294967295
1298 ret_data64=18446744073709551615
1299 ret_data8=255
1300 system=system
1301 update_data=false
1302 warn_access=
1303 pio=system.iobus.master[12]
1304
1305 [system.realview.lan_fake]
1306 type=IsaFake
1307 clk_domain=system.clk_domain
1308 eventq_index=0
1309 fake_mem=false
1310 pio_addr=436207616
1311 pio_latency=100000
1312 pio_size=65535
1313 ret_bad_addr=false
1314 ret_data16=65535
1315 ret_data32=4294967295
1316 ret_data64=18446744073709551615
1317 ret_data8=255
1318 system=system
1319 update_data=false
1320 warn_access=
1321 pio=system.iobus.master[19]
1322
1323 [system.realview.local_cpu_timer]
1324 type=CpuLocalTimer
1325 clk_domain=system.clk_domain
1326 eventq_index=0
1327 gic=system.realview.gic
1328 int_num_timer=29
1329 int_num_watchdog=30
1330 pio_addr=738721792
1331 pio_latency=100000
1332 system=system
1333 pio=system.membus.master[4]
1334
1335 [system.realview.mmc_fake]
1336 type=AmbaFake
1337 amba_id=0
1338 clk_domain=system.clk_domain
1339 eventq_index=0
1340 ignore_access=false
1341 pio_addr=470089728
1342 pio_latency=100000
1343 system=system
1344 pio=system.iobus.master[21]
1345
1346 [system.realview.nvmem]
1347 type=SimpleMemory
1348 bandwidth=73.000000
1349 clk_domain=system.clk_domain
1350 conf_table_reported=false
1351 eventq_index=0
1352 in_addr_map=true
1353 latency=30000
1354 latency_var=0
1355 null=false
1356 range=0:67108863
1357 port=system.membus.master[1]
1358
1359 [system.realview.pciconfig]
1360 type=PciConfigAll
1361 bus=0
1362 clk_domain=system.clk_domain
1363 eventq_index=0
1364 pio_addr=0
1365 pio_latency=30000
1366 platform=system.realview
1367 size=268435456
1368 system=system
1369 pio=system.iobus.default
1370
1371 [system.realview.realview_io]
1372 type=RealViewCtrl
1373 clk_domain=system.clk_domain
1374 eventq_index=0
1375 idreg=35979264
1376 pio_addr=469827584
1377 pio_latency=100000
1378 proc_id0=335544320
1379 proc_id1=335544320
1380 system=system
1381 pio=system.iobus.master[1]
1382
1383 [system.realview.rtc]
1384 type=PL031
1385 amba_id=3412017
1386 clk_domain=system.clk_domain
1387 eventq_index=0
1388 gic=system.realview.gic
1389 int_delay=100000
1390 int_num=36
1391 pio_addr=471269376
1392 pio_latency=100000
1393 system=system
1394 time=Thu Jan  1 00:00:00 2009
1395 pio=system.iobus.master[10]
1396
1397 [system.realview.sp810_fake]
1398 type=AmbaFake
1399 amba_id=0
1400 clk_domain=system.clk_domain
1401 eventq_index=0
1402 ignore_access=true
1403 pio_addr=469893120
1404 pio_latency=100000
1405 system=system
1406 pio=system.iobus.master[16]
1407
1408 [system.realview.timer0]
1409 type=Sp804
1410 amba_id=1316868
1411 clk_domain=system.clk_domain
1412 clock0=1000000
1413 clock1=1000000
1414 eventq_index=0
1415 gic=system.realview.gic
1416 int_num0=34
1417 int_num1=34
1418 pio_addr=470876160
1419 pio_latency=100000
1420 system=system
1421 pio=system.iobus.master[2]
1422
1423 [system.realview.timer1]
1424 type=Sp804
1425 amba_id=1316868
1426 clk_domain=system.clk_domain
1427 clock0=1000000
1428 clock1=1000000
1429 eventq_index=0
1430 gic=system.realview.gic
1431 int_num0=35
1432 int_num1=35
1433 pio_addr=470941696
1434 pio_latency=100000
1435 system=system
1436 pio=system.iobus.master[3]
1437
1438 [system.realview.uart]
1439 type=Pl011
1440 clk_domain=system.clk_domain
1441 end_on_eot=false
1442 eventq_index=0
1443 gic=system.realview.gic
1444 int_delay=100000
1445 int_num=37
1446 pio_addr=470351872
1447 pio_latency=100000
1448 platform=system.realview
1449 system=system
1450 terminal=system.terminal
1451 pio=system.iobus.master[0]
1452
1453 [system.realview.uart1_fake]
1454 type=AmbaFake
1455 amba_id=0
1456 clk_domain=system.clk_domain
1457 eventq_index=0
1458 ignore_access=false
1459 pio_addr=470417408
1460 pio_latency=100000
1461 system=system
1462 pio=system.iobus.master[13]
1463
1464 [system.realview.uart2_fake]
1465 type=AmbaFake
1466 amba_id=0
1467 clk_domain=system.clk_domain
1468 eventq_index=0
1469 ignore_access=false
1470 pio_addr=470482944
1471 pio_latency=100000
1472 system=system
1473 pio=system.iobus.master[14]
1474
1475 [system.realview.uart3_fake]
1476 type=AmbaFake
1477 amba_id=0
1478 clk_domain=system.clk_domain
1479 eventq_index=0
1480 ignore_access=false
1481 pio_addr=470548480
1482 pio_latency=100000
1483 system=system
1484 pio=system.iobus.master[15]
1485
1486 [system.realview.usb_fake]
1487 type=IsaFake
1488 clk_domain=system.clk_domain
1489 eventq_index=0
1490 fake_mem=false
1491 pio_addr=452984832
1492 pio_latency=100000
1493 pio_size=131071
1494 ret_bad_addr=false
1495 ret_data16=65535
1496 ret_data32=4294967295
1497 ret_data64=18446744073709551615
1498 ret_data8=255
1499 system=system
1500 update_data=false
1501 warn_access=
1502 pio=system.iobus.master[20]
1503
1504 [system.realview.vgic]
1505 type=VGic
1506 clk_domain=system.clk_domain
1507 eventq_index=0
1508 gic=system.realview.gic
1509 hv_addr=738213888
1510 pio_delay=10000
1511 platform=system.realview
1512 ppint=25
1513 system=system
1514 vcpu_addr=738222080
1515 pio=system.membus.master[3]
1516
1517 [system.realview.vram]
1518 type=SimpleMemory
1519 bandwidth=73.000000
1520 clk_domain=system.clk_domain
1521 conf_table_reported=false
1522 eventq_index=0
1523 in_addr_map=true
1524 latency=30000
1525 latency_var=0
1526 null=false
1527 range=402653184:436207615
1528 port=system.iobus.master[11]
1529
1530 [system.realview.watchdog_fake]
1531 type=AmbaFake
1532 amba_id=0
1533 clk_domain=system.clk_domain
1534 eventq_index=0
1535 ignore_access=false
1536 pio_addr=470745088
1537 pio_latency=100000
1538 system=system
1539 pio=system.iobus.master[17]
1540
1541 [system.terminal]
1542 type=Terminal
1543 eventq_index=0
1544 intr_control=system.intrctrl
1545 number=0
1546 output=true
1547 port=3456
1548
1549 [system.vncserver]
1550 type=VncServer
1551 eventq_index=0
1552 frame_capture=false
1553 number=0
1554 port=5900
1555
1556 [system.voltage_domain]
1557 type=VoltageDomain
1558 eventq_index=0
1559 voltage=1.000000
1560