tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 eventq_index=0
   5 full_system=true
   6 sim_quantum=0
   7 time_sync_enable=false
   8 time_sync_period=100000000000
   9 time_sync_spin_threshold=100000000
  10
  11 [system]
  12 type=LinuxArmSystem
  13 children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
  14 atags_addr=134217728
  15 boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm
  16 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
  17 cache_line_size=64
  18 clk_domain=system.clk_domain
  19 dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
  20 early_kernel_symbols=false
  21 enable_context_switch_stats_dump=false
  22 eventq_index=0
  23 exit_on_work_items=false
  24 flags_addr=469827632
  25 gic_cpu_addr=738205696
  26 have_large_asid_64=false
  27 have_lpae=false
  28 have_security=false
  29 have_virtualization=false
  30 highest_el_is_64=false
  31 init_param=0
  32 kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch32.ll_20131205.0-gem5
  33 kernel_addr_check=true
  34 load_addr_mask=268435455
  35 load_offset=2147483648
  36 machine_type=VExpress_EMM
  37 mem_mode=timing
  38 mem_ranges=2147483648:2415919103
  39 memories=system.physmem system.realview.nvmem system.realview.vram
  40 mmap_using_noreserve=false
  41 multi_proc=true
  42 multi_thread=false
  43 num_work_ids=16
  44 panic_on_oops=true
  45 panic_on_panic=true
  46 phys_addr_range_64=40
  47 readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
  48 reset_addr_64=0
  49 symbolfile=
  50 work_begin_ckpt_count=0
  51 work_begin_cpu_id_exit=-1
  52 work_begin_exit_count=0
  53 work_cpus_ckpt_count=0
  54 work_end_ckpt_count=0
  55 work_end_exit_count=0
  56 work_item_id=-1
  57 system_port=system.membus.slave[1]
  58
  59 [system.bridge]
  60 type=Bridge
  61 clk_domain=system.clk_domain
  62 delay=50000
  63 eventq_index=0
  64 ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
  65 req_size=16
  66 resp_size=16
  67 master=system.iobus.slave[0]
  68 slave=system.membus.master[0]
  69
  70 [system.cf0]
  71 type=IdeDisk
  72 children=image
  73 delay=1000000
  74 driveID=master
  75 eventq_index=0
  76 image=system.cf0.image
  77
  78 [system.cf0.image]
  79 type=CowDiskImage
  80 children=child
  81 child=system.cf0.image.child
  82 eventq_index=0
  83 image_file=
  84 read_only=false
  85 table_size=65536
  86
  87 [system.cf0.image.child]
  88 type=RawDiskImage
  89 eventq_index=0
  90 image_file=/home/stever/m5/aarch-system-2014-10/disks/linux-aarch32-ael.img
  91 read_only=true
  92
  93 [system.clk_domain]
  94 type=SrcClockDomain
  95 clock=1000
  96 domain_id=-1
  97 eventq_index=0
  98 init_perf_level=0
  99 voltage_domain=system.voltage_domain
 100
 101 [system.cpu]
 102 type=DerivO3CPU
 103 children=branchPred dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
 104 LFSTSize=1024
 105 LQEntries=16
 106 LSQCheckLoads=true
 107 LSQDepCheckShift=0
 108 SQEntries=16
 109 SSITSize=1024
 110 activity=0
 111 backComSize=5
 112 branchPred=system.cpu.branchPred
 113 cachePorts=200
 114 checker=Null
 115 clk_domain=system.cpu_clk_domain
 116 commitToDecodeDelay=1
 117 commitToFetchDelay=1
 118 commitToIEWDelay=1
 119 commitToRenameDelay=1
 120 commitWidth=8
 121 cpu_id=0
 122 decodeToFetchDelay=1
 123 decodeToRenameDelay=2
 124 decodeWidth=3
 125 dispatchWidth=6
 126 do_checkpoint_insts=true
 127 do_quiesce=true
 128 do_statistics_insts=true
 129 dstage2_mmu=system.cpu.dstage2_mmu
 130 dtb=system.cpu.dtb
 131 eventq_index=0
 132 fetchBufferSize=16
 133 fetchQueueSize=32
 134 fetchToDecodeDelay=3
 135 fetchTrapLatency=1
 136 fetchWidth=3
 137 forwardComSize=5
 138 fuPool=system.cpu.fuPool
 139 function_trace=false
 140 function_trace_start=0
 141 iewToCommitDelay=1
 142 iewToDecodeDelay=1
 143 iewToFetchDelay=1
 144 iewToRenameDelay=1
 145 interrupts=system.cpu.interrupts
 146 isa=system.cpu.isa
 147 issueToExecuteDelay=1
 148 issueWidth=8
 149 istage2_mmu=system.cpu.istage2_mmu
 150 itb=system.cpu.itb
 151 max_insts_all_threads=0
 152 max_insts_any_thread=0
 153 max_loads_all_threads=0
 154 max_loads_any_thread=0
 155 needsTSO=false
 156 numIQEntries=32
 157 numPhysCCRegs=640
 158 numPhysFloatRegs=192
 159 numPhysIntRegs=128
 160 numROBEntries=40
 161 numRobs=1
 162 numThreads=1
 163 profile=0
 164 progress_interval=0
 165 renameToDecodeDelay=1
 166 renameToFetchDelay=1
 167 renameToIEWDelay=1
 168 renameToROBDelay=1
 169 renameWidth=3
 170 simpoint_start_insts=
 171 smtCommitPolicy=RoundRobin
 172 smtFetchPolicy=SingleThread
 173 smtIQPolicy=Partitioned
 174 smtIQThreshold=100
 175 smtLSQPolicy=Partitioned
 176 smtLSQThreshold=100
 177 smtNumFetchingThreads=1
 178 smtROBPolicy=Partitioned
 179 smtROBThreshold=100
 180 socket_id=0
 181 squashWidth=8
 182 store_set_clear_period=250000
 183 switched_out=false
 184 system=system
 185 tracer=system.cpu.tracer
 186 trapLatency=13
 187 wbWidth=8
 188 workload=
 189 dcache_port=system.cpu.dcache.cpu_side
 190 icache_port=system.cpu.icache.cpu_side
 191
 192 [system.cpu.branchPred]
 193 type=BiModeBP
 194 BTBEntries=2048
 195 BTBTagSize=18
 196 RASSize=16
 197 choiceCtrBits=2
 198 choicePredictorSize=8192
 199 eventq_index=0
 200 globalCtrBits=2
 201 globalPredictorSize=8192
 202 instShiftAmt=2
 203 numThreads=1
 204
 205 [system.cpu.dcache]
 206 type=Cache
 207 children=tags
 208 addr_ranges=0:18446744073709551615
 209 assoc=4
 210 clk_domain=system.cpu_clk_domain
 211 clusivity=mostly_incl
 212 demand_mshr_reserve=1
 213 eventq_index=0
 214 hit_latency=2
 215 is_read_only=false
 216 max_miss_count=0
 217 mshrs=4
 218 prefetch_on_access=false
 219 prefetcher=Null
 220 response_latency=2
 221 sequential_access=false
 222 size=32768
 223 system=system
 224 tags=system.cpu.dcache.tags
 225 tgts_per_mshr=20
 226 write_buffers=8
 227 writeback_clean=false
 228 cpu_side=system.cpu.dcache_port
 229 mem_side=system.cpu.toL2Bus.slave[1]
 230
 231 [system.cpu.dcache.tags]
 232 type=LRU
 233 assoc=4
 234 block_size=64
 235 clk_domain=system.cpu_clk_domain
 236 eventq_index=0
 237 hit_latency=2
 238 sequential_access=false
 239 size=32768
 240
 241 [system.cpu.dstage2_mmu]
 242 type=ArmStage2MMU
 243 children=stage2_tlb
 244 eventq_index=0
 245 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
 246 sys=system
 247 tlb=system.cpu.dtb
 248
 249 [system.cpu.dstage2_mmu.stage2_tlb]
 250 type=ArmTLB
 251 children=walker
 252 eventq_index=0
 253 is_stage2=true
 254 size=32
 255 walker=system.cpu.dstage2_mmu.stage2_tlb.walker
 256
 257 [system.cpu.dstage2_mmu.stage2_tlb.walker]
 258 type=ArmTableWalker
 259 clk_domain=system.cpu_clk_domain
 260 eventq_index=0
 261 is_stage2=true
 262 num_squash_per_cycle=2
 263 sys=system
 264
 265 [system.cpu.dtb]
 266 type=ArmTLB
 267 children=walker
 268 eventq_index=0
 269 is_stage2=false
 270 size=64
 271 walker=system.cpu.dtb.walker
 272
 273 [system.cpu.dtb.walker]
 274 type=ArmTableWalker
 275 clk_domain=system.cpu_clk_domain
 276 eventq_index=0
 277 is_stage2=false
 278 num_squash_per_cycle=2
 279 sys=system
 280 port=system.cpu.toL2Bus.slave[3]
 281
 282 [system.cpu.fuPool]
 283 type=FUPool
 284 children=FUList0 FUList1 FUList2 FUList3 FUList4
 285 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4
 286 eventq_index=0
 287
 288 [system.cpu.fuPool.FUList0]
 289 type=FUDesc
 290 children=opList
 291 count=2
 292 eventq_index=0
 293 opList=system.cpu.fuPool.FUList0.opList
 294
 295 [system.cpu.fuPool.FUList0.opList]
 296 type=OpDesc
 297 eventq_index=0
 298 opClass=IntAlu
 299 opLat=1
 300 pipelined=true
 301
 302 [system.cpu.fuPool.FUList1]
 303 type=FUDesc
 304 children=opList0 opList1 opList2
 305 count=1
 306 eventq_index=0
 307 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 system.cpu.fuPool.FUList1.opList2
 308
 309 [system.cpu.fuPool.FUList1.opList0]
 310 type=OpDesc
 311 eventq_index=0
 312 opClass=IntMult
 313 opLat=3
 314 pipelined=true
 315
 316 [system.cpu.fuPool.FUList1.opList1]
 317 type=OpDesc
 318 eventq_index=0
 319 opClass=IntDiv
 320 opLat=12
 321 pipelined=false
 322
 323 [system.cpu.fuPool.FUList1.opList2]
 324 type=OpDesc
 325 eventq_index=0
 326 opClass=IprAccess
 327 opLat=3
 328 pipelined=true
 329
 330 [system.cpu.fuPool.FUList2]
 331 type=FUDesc
 332 children=opList
 333 count=1
 334 eventq_index=0
 335 opList=system.cpu.fuPool.FUList2.opList
 336
 337 [system.cpu.fuPool.FUList2.opList]
 338 type=OpDesc
 339 eventq_index=0
 340 opClass=MemRead
 341 opLat=2
 342 pipelined=true
 343
 344 [system.cpu.fuPool.FUList3]
 345 type=FUDesc
 346 children=opList
 347 count=1
 348 eventq_index=0
 349 opList=system.cpu.fuPool.FUList3.opList
 350
 351 [system.cpu.fuPool.FUList3.opList]
 352 type=OpDesc
 353 eventq_index=0
 354 opClass=MemWrite
 355 opLat=2
 356 pipelined=true
 357
 358 [system.cpu.fuPool.FUList4]
 359 type=FUDesc
 360 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25
 361 count=2
 362 eventq_index=0
 363 opList=system.cpu.fuPool.FUList4.opList00 system.cpu.fuPool.FUList4.opList01 system.cpu.fuPool.FUList4.opList02 system.cpu.fuPool.FUList4.opList03 system.cpu.fuPool.FUList4.opList04 system.cpu.fuPool.FUList4.opList05 system.cpu.fuPool.FUList4.opList06 system.cpu.fuPool.FUList4.opList07 system.cpu.fuPool.FUList4.opList08 system.cpu.fuPool.FUList4.opList09 system.cpu.fuPool.FUList4.opList10 system.cpu.fuPool.FUList4.opList11 system.cpu.fuPool.FUList4.opList12 system.cpu.fuPool.FUList4.opList13 system.cpu.fuPool.FUList4.opList14 system.cpu.fuPool.FUList4.opList15 system.cpu.fuPool.FUList4.opList16 system.cpu.fuPool.FUList4.opList17 system.cpu.fuPool.FUList4.opList18 system.cpu.fuPool.FUList4.opList19 system.cpu.fuPool.FUList4.opList20 system.cpu.fuPool.FUList4.opList21 system.cpu.fuPool.FUList4.opList22 system.cpu.fuPool.FUList4.opList23 system.cpu.fuPool.FUList4.opList24 system.cpu.fuPool.FUList4.opList25
 364
 365 [system.cpu.fuPool.FUList4.opList00]
 366 type=OpDesc
 367 eventq_index=0
 368 opClass=SimdAdd
 369 opLat=4
 370 pipelined=true
 371
 372 [system.cpu.fuPool.FUList4.opList01]
 373 type=OpDesc
 374 eventq_index=0
 375 opClass=SimdAddAcc
 376 opLat=4
 377 pipelined=true
 378
 379 [system.cpu.fuPool.FUList4.opList02]
 380 type=OpDesc
 381 eventq_index=0
 382 opClass=SimdAlu
 383 opLat=4
 384 pipelined=true
 385
 386 [system.cpu.fuPool.FUList4.opList03]
 387 type=OpDesc
 388 eventq_index=0
 389 opClass=SimdCmp
 390 opLat=4
 391 pipelined=true
 392
 393 [system.cpu.fuPool.FUList4.opList04]
 394 type=OpDesc
 395 eventq_index=0
 396 opClass=SimdCvt
 397 opLat=3
 398 pipelined=true
 399
 400 [system.cpu.fuPool.FUList4.opList05]
 401 type=OpDesc
 402 eventq_index=0
 403 opClass=SimdMisc
 404 opLat=3
 405 pipelined=true
 406
 407 [system.cpu.fuPool.FUList4.opList06]
 408 type=OpDesc
 409 eventq_index=0
 410 opClass=SimdMult
 411 opLat=5
 412 pipelined=true
 413
 414 [system.cpu.fuPool.FUList4.opList07]
 415 type=OpDesc
 416 eventq_index=0
 417 opClass=SimdMultAcc
 418 opLat=5
 419 pipelined=true
 420
 421 [system.cpu.fuPool.FUList4.opList08]
 422 type=OpDesc
 423 eventq_index=0
 424 opClass=SimdShift
 425 opLat=3
 426 pipelined=true
 427
 428 [system.cpu.fuPool.FUList4.opList09]
 429 type=OpDesc
 430 eventq_index=0
 431 opClass=SimdShiftAcc
 432 opLat=3
 433 pipelined=true
 434
 435 [system.cpu.fuPool.FUList4.opList10]
 436 type=OpDesc
 437 eventq_index=0
 438 opClass=SimdSqrt
 439 opLat=9
 440 pipelined=true
 441
 442 [system.cpu.fuPool.FUList4.opList11]
 443 type=OpDesc
 444 eventq_index=0
 445 opClass=SimdFloatAdd
 446 opLat=5
 447 pipelined=true
 448
 449 [system.cpu.fuPool.FUList4.opList12]
 450 type=OpDesc
 451 eventq_index=0
 452 opClass=SimdFloatAlu
 453 opLat=5
 454 pipelined=true
 455
 456 [system.cpu.fuPool.FUList4.opList13]
 457 type=OpDesc
 458 eventq_index=0
 459 opClass=SimdFloatCmp
 460 opLat=3
 461 pipelined=true
 462
 463 [system.cpu.fuPool.FUList4.opList14]
 464 type=OpDesc
 465 eventq_index=0
 466 opClass=SimdFloatCvt
 467 opLat=3
 468 pipelined=true
 469
 470 [system.cpu.fuPool.FUList4.opList15]
 471 type=OpDesc
 472 eventq_index=0
 473 opClass=SimdFloatDiv
 474 opLat=3
 475 pipelined=true
 476
 477 [system.cpu.fuPool.FUList4.opList16]
 478 type=OpDesc
 479 eventq_index=0
 480 opClass=SimdFloatMisc
 481 opLat=3
 482 pipelined=true
 483
 484 [system.cpu.fuPool.FUList4.opList17]
 485 type=OpDesc
 486 eventq_index=0
 487 opClass=SimdFloatMult
 488 opLat=3
 489 pipelined=true
 490
 491 [system.cpu.fuPool.FUList4.opList18]
 492 type=OpDesc
 493 eventq_index=0
 494 opClass=SimdFloatMultAcc
 495 opLat=1
 496 pipelined=true
 497
 498 [system.cpu.fuPool.FUList4.opList19]
 499 type=OpDesc
 500 eventq_index=0
 501 opClass=SimdFloatSqrt
 502 opLat=9
 503 pipelined=true
 504
 505 [system.cpu.fuPool.FUList4.opList20]
 506 type=OpDesc
 507 eventq_index=0
 508 opClass=FloatAdd
 509 opLat=5
 510 pipelined=true
 511
 512 [system.cpu.fuPool.FUList4.opList21]
 513 type=OpDesc
 514 eventq_index=0
 515 opClass=FloatCmp
 516 opLat=5
 517 pipelined=true
 518
 519 [system.cpu.fuPool.FUList4.opList22]
 520 type=OpDesc
 521 eventq_index=0
 522 opClass=FloatCvt
 523 opLat=5
 524 pipelined=true
 525
 526 [system.cpu.fuPool.FUList4.opList23]
 527 type=OpDesc
 528 eventq_index=0
 529 opClass=FloatDiv
 530 opLat=9
 531 pipelined=false
 532
 533 [system.cpu.fuPool.FUList4.opList24]
 534 type=OpDesc
 535 eventq_index=0
 536 opClass=FloatSqrt
 537 opLat=33
 538 pipelined=false
 539
 540 [system.cpu.fuPool.FUList4.opList25]
 541 type=OpDesc
 542 eventq_index=0
 543 opClass=FloatMult
 544 opLat=4
 545 pipelined=true
 546
 547 [system.cpu.icache]
 548 type=Cache
 549 children=tags
 550 addr_ranges=0:18446744073709551615
 551 assoc=1
 552 clk_domain=system.cpu_clk_domain
 553 clusivity=mostly_incl
 554 demand_mshr_reserve=1
 555 eventq_index=0
 556 hit_latency=2
 557 is_read_only=true
 558 max_miss_count=0
 559 mshrs=4
 560 prefetch_on_access=false
 561 prefetcher=Null
 562 response_latency=2
 563 sequential_access=false
 564 size=32768
 565 system=system
 566 tags=system.cpu.icache.tags
 567 tgts_per_mshr=20
 568 write_buffers=8
 569 writeback_clean=true
 570 cpu_side=system.cpu.icache_port
 571 mem_side=system.cpu.toL2Bus.slave[0]
 572
 573 [system.cpu.icache.tags]
 574 type=LRU
 575 assoc=1
 576 block_size=64
 577 clk_domain=system.cpu_clk_domain
 578 eventq_index=0
 579 hit_latency=2
 580 sequential_access=false
 581 size=32768
 582
 583 [system.cpu.interrupts]
 584 type=ArmInterrupts
 585 eventq_index=0
 586
 587 [system.cpu.isa]
 588 type=ArmISA
 589 decoderFlavour=Generic
 590 eventq_index=0
 591 fpsid=1090793632
 592 id_aa64afr0_el1=0
 593 id_aa64afr1_el1=0
 594 id_aa64dfr0_el1=1052678
 595 id_aa64dfr1_el1=0
 596 id_aa64isar0_el1=0
 597 id_aa64isar1_el1=0
 598 id_aa64mmfr0_el1=15728642
 599 id_aa64mmfr1_el1=0
 600 id_aa64pfr0_el1=17
 601 id_aa64pfr1_el1=0
 602 id_isar0=34607377
 603 id_isar1=34677009
 604 id_isar2=555950401
 605 id_isar3=17899825
 606 id_isar4=268501314
 607 id_isar5=0
 608 id_mmfr0=270536963
 609 id_mmfr1=0
 610 id_mmfr2=19070976
 611 id_mmfr3=34611729
 612 id_pfr0=49
 613 id_pfr1=4113
 614 midr=1091551472
 615 pmu=Null
 616 system=system
 617
 618 [system.cpu.istage2_mmu]
 619 type=ArmStage2MMU
 620 children=stage2_tlb
 621 eventq_index=0
 622 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
 623 sys=system
 624 tlb=system.cpu.itb
 625
 626 [system.cpu.istage2_mmu.stage2_tlb]
 627 type=ArmTLB
 628 children=walker
 629 eventq_index=0
 630 is_stage2=true
 631 size=32
 632 walker=system.cpu.istage2_mmu.stage2_tlb.walker
 633
 634 [system.cpu.istage2_mmu.stage2_tlb.walker]
 635 type=ArmTableWalker
 636 clk_domain=system.cpu_clk_domain
 637 eventq_index=0
 638 is_stage2=true
 639 num_squash_per_cycle=2
 640 sys=system
 641
 642 [system.cpu.itb]
 643 type=ArmTLB
 644 children=walker
 645 eventq_index=0
 646 is_stage2=false
 647 size=64
 648 walker=system.cpu.itb.walker
 649
 650 [system.cpu.itb.walker]
 651 type=ArmTableWalker
 652 clk_domain=system.cpu_clk_domain
 653 eventq_index=0
 654 is_stage2=false
 655 num_squash_per_cycle=2
 656 sys=system
 657 port=system.cpu.toL2Bus.slave[2]
 658
 659 [system.cpu.l2cache]
 660 type=Cache
 661 children=tags
 662 addr_ranges=0:18446744073709551615
 663 assoc=8
 664 clk_domain=system.cpu_clk_domain
 665 clusivity=mostly_incl
 666 demand_mshr_reserve=1
 667 eventq_index=0
 668 hit_latency=20
 669 is_read_only=false
 670 max_miss_count=0
 671 mshrs=20
 672 prefetch_on_access=false
 673 prefetcher=Null
 674 response_latency=20
 675 sequential_access=false
 676 size=4194304
 677 system=system
 678 tags=system.cpu.l2cache.tags
 679 tgts_per_mshr=12
 680 write_buffers=8
 681 writeback_clean=false
 682 cpu_side=system.cpu.toL2Bus.master[0]
 683 mem_side=system.membus.slave[2]
 684
 685 [system.cpu.l2cache.tags]
 686 type=LRU
 687 assoc=8
 688 block_size=64
 689 clk_domain=system.cpu_clk_domain
 690 eventq_index=0
 691 hit_latency=20
 692 sequential_access=false
 693 size=4194304
 694
 695 [system.cpu.toL2Bus]
 696 type=CoherentXBar
 697 children=snoop_filter
 698 clk_domain=system.cpu_clk_domain
 699 eventq_index=0
 700 forward_latency=0
 701 frontend_latency=1
 702 point_of_coherency=false
 703 response_latency=1
 704 snoop_filter=system.cpu.toL2Bus.snoop_filter
 705 snoop_response_latency=1
 706 system=system
 707 use_default_range=false
 708 width=32
 709 master=system.cpu.l2cache.cpu_side
 710 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
 711
 712 [system.cpu.toL2Bus.snoop_filter]
 713 type=SnoopFilter
 714 eventq_index=0
 715 lookup_latency=0
 716 max_capacity=8388608
 717 system=system
 718
 719 [system.cpu.tracer]
 720 type=ExeTracer
 721 eventq_index=0
 722
 723 [system.cpu_clk_domain]
 724 type=SrcClockDomain
 725 clock=500
 726 domain_id=-1
 727 eventq_index=0
 728 init_perf_level=0
 729 voltage_domain=system.voltage_domain
 730
 731 [system.dvfs_handler]
 732 type=DVFSHandler
 733 domains=
 734 enable=false
 735 eventq_index=0
 736 sys_clk_domain=system.clk_domain
 737 transition_latency=100000000
 738
 739 [system.intrctrl]
 740 type=IntrControl
 741 eventq_index=0
 742 sys=system
 743
 744 [system.iobus]
 745 type=NoncoherentXBar
 746 clk_domain=system.clk_domain
 747 eventq_index=0
 748 forward_latency=1
 749 frontend_latency=2
 750 response_latency=2
 751 use_default_range=false
 752 width=16
 753 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side
 754 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
 755
 756 [system.iocache]
 757 type=Cache
 758 children=tags
 759 addr_ranges=2147483648:2415919103
 760 assoc=8
 761 clk_domain=system.clk_domain
 762 clusivity=mostly_incl
 763 demand_mshr_reserve=1
 764 eventq_index=0
 765 hit_latency=50
 766 is_read_only=false
 767 max_miss_count=0
 768 mshrs=20
 769 prefetch_on_access=false
 770 prefetcher=Null
 771 response_latency=50
 772 sequential_access=false
 773 size=1024
 774 system=system
 775 tags=system.iocache.tags
 776 tgts_per_mshr=12
 777 write_buffers=8
 778 writeback_clean=false
 779 cpu_side=system.iobus.master[25]
 780 mem_side=system.membus.slave[3]
 781
 782 [system.iocache.tags]
 783 type=LRU
 784 assoc=8
 785 block_size=64
 786 clk_domain=system.clk_domain
 787 eventq_index=0
 788 hit_latency=50
 789 sequential_access=false
 790 size=1024
 791
 792 [system.membus]
 793 type=CoherentXBar
 794 children=badaddr_responder
 795 clk_domain=system.clk_domain
 796 eventq_index=0
 797 forward_latency=4
 798 frontend_latency=3
 799 point_of_coherency=true
 800 response_latency=2
 801 snoop_filter=Null
 802 snoop_response_latency=4
 803 system=system
 804 use_default_range=false
 805 width=16
 806 default=system.membus.badaddr_responder.pio
 807 master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
 808 slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
 809
 810 [system.membus.badaddr_responder]
 811 type=IsaFake
 812 clk_domain=system.clk_domain
 813 eventq_index=0
 814 fake_mem=false
 815 pio_addr=0
 816 pio_latency=100000
 817 pio_size=8
 818 ret_bad_addr=true
 819 ret_data16=65535
 820 ret_data32=4294967295
 821 ret_data64=18446744073709551615
 822 ret_data8=255
 823 system=system
 824 update_data=false
 825 warn_access=warn
 826 pio=system.membus.default
 827
 828 [system.physmem]
 829 type=DRAMCtrl
 830 IDD0=0.075000
 831 IDD02=0.000000
 832 IDD2N=0.050000
 833 IDD2N2=0.000000
 834 IDD2P0=0.000000
 835 IDD2P02=0.000000
 836 IDD2P1=0.000000
 837 IDD2P12=0.000000
 838 IDD3N=0.057000
 839 IDD3N2=0.000000
 840 IDD3P0=0.000000
 841 IDD3P02=0.000000
 842 IDD3P1=0.000000
 843 IDD3P12=0.000000
 844 IDD4R=0.187000
 845 IDD4R2=0.000000
 846 IDD4W=0.165000
 847 IDD4W2=0.000000
 848 IDD5=0.220000
 849 IDD52=0.000000
 850 IDD6=0.000000
 851 IDD62=0.000000
 852 VDD=1.500000
 853 VDD2=0.000000
 854 activation_limit=4
 855 addr_mapping=RoRaBaCoCh
 856 bank_groups_per_rank=0
 857 banks_per_rank=8
 858 burst_length=8
 859 channels=1
 860 clk_domain=system.clk_domain
 861 conf_table_reported=true
 862 device_bus_width=8
 863 device_rowbuffer_size=1024
 864 device_size=536870912
 865 devices_per_rank=8
 866 dll=true
 867 eventq_index=0
 868 in_addr_map=true
 869 max_accesses_per_row=16
 870 mem_sched_policy=frfcfs
 871 min_writes_per_switch=16
 872 null=false
 873 page_policy=open_adaptive
 874 range=2147483648:2415919103
 875 ranks_per_channel=2
 876 read_buffer_size=32
 877 static_backend_latency=10000
 878 static_frontend_latency=10000
 879 tBURST=5000
 880 tCCD_L=0
 881 tCK=1250
 882 tCL=13750
 883 tCS=2500
 884 tRAS=35000
 885 tRCD=13750
 886 tREFI=7800000
 887 tRFC=260000
 888 tRP=13750
 889 tRRD=6000
 890 tRRD_L=0
 891 tRTP=7500
 892 tRTW=2500
 893 tWR=15000
 894 tWTR=7500
 895 tXAW=30000
 896 tXP=0
 897 tXPDLL=0
 898 tXS=0
 899 tXSDLL=0
 900 write_buffer_size=64
 901 write_high_thresh_perc=85
 902 write_low_thresh_perc=50
 903 port=system.membus.master[5]
 904
 905 [system.realview]
 906 type=RealView
 907 children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
 908 eventq_index=0
 909 intrctrl=system.intrctrl
 910 system=system
 911
 912 [system.realview.aaci_fake]
 913 type=AmbaFake
 914 amba_id=0
 915 clk_domain=system.clk_domain
 916 eventq_index=0
 917 ignore_access=false
 918 pio_addr=470024192
 919 pio_latency=100000
 920 system=system
 921 pio=system.iobus.master[18]
 922
 923 [system.realview.cf_ctrl]
 924 type=IdeController
 925 BAR0=471465984
 926 BAR0LegacyIO=true
 927 BAR0Size=256
 928 BAR1=471466240
 929 BAR1LegacyIO=true
 930 BAR1Size=4096
 931 BAR2=1
 932 BAR2LegacyIO=false
 933 BAR2Size=8
 934 BAR3=1
 935 BAR3LegacyIO=false
 936 BAR3Size=4
 937 BAR4=1
 938 BAR4LegacyIO=false
 939 BAR4Size=16
 940 BAR5=1
 941 BAR5LegacyIO=false
 942 BAR5Size=0
 943 BIST=0
 944 CacheLineSize=0
 945 CapabilityPtr=0
 946 CardbusCIS=0
 947 ClassCode=1
 948 Command=1
 949 DeviceID=28945
 950 ExpansionROM=0
 951 HeaderType=0
 952 InterruptLine=31
 953 InterruptPin=1
 954 LatencyTimer=0
 955 LegacyIOBase=0
 956 MSICAPBaseOffset=0
 957 MSICAPCapId=0
 958 MSICAPMaskBits=0
 959 MSICAPMsgAddr=0
 960 MSICAPMsgCtrl=0
 961 MSICAPMsgData=0
 962 MSICAPMsgUpperAddr=0
 963 MSICAPNextCapability=0
 964 MSICAPPendingBits=0
 965 MSIXCAPBaseOffset=0
 966 MSIXCAPCapId=0
 967 MSIXCAPNextCapability=0
 968 MSIXMsgCtrl=0
 969 MSIXPbaOffset=0
 970 MSIXTableOffset=0
 971 MaximumLatency=0
 972 MinimumGrant=0
 973 PMCAPBaseOffset=0
 974 PMCAPCapId=0
 975 PMCAPCapabilities=0
 976 PMCAPCtrlStatus=0
 977 PMCAPNextCapability=0
 978 PXCAPBaseOffset=0
 979 PXCAPCapId=0
 980 PXCAPCapabilities=0
 981 PXCAPDevCap2=0
 982 PXCAPDevCapabilities=0
 983 PXCAPDevCtrl=0
 984 PXCAPDevCtrl2=0
 985 PXCAPDevStatus=0
 986 PXCAPLinkCap=0
 987 PXCAPLinkCtrl=0
 988 PXCAPLinkStatus=0
 989 PXCAPNextCapability=0
 990 ProgIF=133
 991 Revision=0
 992 Status=640
 993 SubClassCode=1
 994 SubsystemID=0
 995 SubsystemVendorID=0
 996 VendorID=32902
 997 clk_domain=system.clk_domain
 998 config_latency=20000
 999 ctrl_offset=2
1000 disks=
1001 eventq_index=0
1002 host=system.realview.pci_host
1003 io_shift=2
1004 pci_bus=2
1005 pci_dev=0
1006 pci_func=0
1007 pio_latency=30000
1008 system=system
1009 dma=system.iobus.slave[2]
1010 pio=system.iobus.master[9]
1011
1012 [system.realview.clcd]
1013 type=Pl111
1014 amba_id=1315089
1015 clk_domain=system.clk_domain
1016 enable_capture=true
1017 eventq_index=0
1018 gic=system.realview.gic
1019 int_num=46
1020 pio_addr=471793664
1021 pio_latency=10000
1022 pixel_clock=41667
1023 system=system
1024 vnc=system.vncserver
1025 dma=system.iobus.slave[1]
1026 pio=system.iobus.master[5]
1027
1028 [system.realview.dcc]
1029 type=SubSystem
1030 children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys
1031 eventq_index=0
1032
1033 [system.realview.dcc.osc_cpu]
1034 type=RealViewOsc
1035 dcc=0
1036 device=0
1037 eventq_index=0
1038 freq=16667
1039 parent=system.realview.realview_io
1040 position=0
1041 site=1
1042 voltage_domain=system.voltage_domain
1043
1044 [system.realview.dcc.osc_ddr]
1045 type=RealViewOsc
1046 dcc=0
1047 device=8
1048 eventq_index=0
1049 freq=25000
1050 parent=system.realview.realview_io
1051 position=0
1052 site=1
1053 voltage_domain=system.voltage_domain
1054
1055 [system.realview.dcc.osc_hsbm]
1056 type=RealViewOsc
1057 dcc=0
1058 device=4
1059 eventq_index=0
1060 freq=25000
1061 parent=system.realview.realview_io
1062 position=0
1063 site=1
1064 voltage_domain=system.voltage_domain
1065
1066 [system.realview.dcc.osc_pxl]
1067 type=RealViewOsc
1068 dcc=0
1069 device=5
1070 eventq_index=0
1071 freq=42105
1072 parent=system.realview.realview_io
1073 position=0
1074 site=1
1075 voltage_domain=system.voltage_domain
1076
1077 [system.realview.dcc.osc_smb]
1078 type=RealViewOsc
1079 dcc=0
1080 device=6
1081 eventq_index=0
1082 freq=20000
1083 parent=system.realview.realview_io
1084 position=0
1085 site=1
1086 voltage_domain=system.voltage_domain
1087
1088 [system.realview.dcc.osc_sys]
1089 type=RealViewOsc
1090 dcc=0
1091 device=7
1092 eventq_index=0
1093 freq=16667
1094 parent=system.realview.realview_io
1095 position=0
1096 site=1
1097 voltage_domain=system.voltage_domain
1098
1099 [system.realview.energy_ctrl]
1100 type=EnergyCtrl
1101 clk_domain=system.clk_domain
1102 dvfs_handler=system.dvfs_handler
1103 eventq_index=0
1104 pio_addr=470286336
1105 pio_latency=100000
1106 system=system
1107 pio=system.iobus.master[22]
1108
1109 [system.realview.ethernet]
1110 type=IGbE
1111 BAR0=0
1112 BAR0LegacyIO=false
1113 BAR0Size=131072
1114 BAR1=0
1115 BAR1LegacyIO=false
1116 BAR1Size=0
1117 BAR2=0
1118 BAR2LegacyIO=false
1119 BAR2Size=0
1120 BAR3=0
1121 BAR3LegacyIO=false
1122 BAR3Size=0
1123 BAR4=0
1124 BAR4LegacyIO=false
1125 BAR4Size=0
1126 BAR5=0
1127 BAR5LegacyIO=false
1128 BAR5Size=0
1129 BIST=0
1130 CacheLineSize=0
1131 CapabilityPtr=0
1132 CardbusCIS=0
1133 ClassCode=2
1134 Command=0
1135 DeviceID=4213
1136 ExpansionROM=0
1137 HeaderType=0
1138 InterruptLine=1
1139 InterruptPin=1
1140 LatencyTimer=0
1141 LegacyIOBase=0
1142 MSICAPBaseOffset=0
1143 MSICAPCapId=0
1144 MSICAPMaskBits=0
1145 MSICAPMsgAddr=0
1146 MSICAPMsgCtrl=0
1147 MSICAPMsgData=0
1148 MSICAPMsgUpperAddr=0
1149 MSICAPNextCapability=0
1150 MSICAPPendingBits=0
1151 MSIXCAPBaseOffset=0
1152 MSIXCAPCapId=0
1153 MSIXCAPNextCapability=0
1154 MSIXMsgCtrl=0
1155 MSIXPbaOffset=0
1156 MSIXTableOffset=0
1157 MaximumLatency=0
1158 MinimumGrant=255
1159 PMCAPBaseOffset=0
1160 PMCAPCapId=0
1161 PMCAPCapabilities=0
1162 PMCAPCtrlStatus=0
1163 PMCAPNextCapability=0
1164 PXCAPBaseOffset=0
1165 PXCAPCapId=0
1166 PXCAPCapabilities=0
1167 PXCAPDevCap2=0
1168 PXCAPDevCapabilities=0
1169 PXCAPDevCtrl=0
1170 PXCAPDevCtrl2=0
1171 PXCAPDevStatus=0
1172 PXCAPLinkCap=0
1173 PXCAPLinkCtrl=0
1174 PXCAPLinkStatus=0
1175 PXCAPNextCapability=0
1176 ProgIF=0
1177 Revision=0
1178 Status=0
1179 SubClassCode=0
1180 SubsystemID=4104
1181 SubsystemVendorID=32902
1182 VendorID=32902
1183 clk_domain=system.clk_domain
1184 config_latency=20000
1185 eventq_index=0
1186 fetch_comp_delay=10000
1187 fetch_delay=10000
1188 hardware_address=00:90:00:00:00:01
1189 host=system.realview.pci_host
1190 pci_bus=0
1191 pci_dev=0
1192 pci_func=0
1193 phy_epid=896
1194 phy_pid=680
1195 pio_latency=30000
1196 rx_desc_cache_size=64
1197 rx_fifo_size=393216
1198 rx_write_delay=0
1199 system=system
1200 tx_desc_cache_size=64
1201 tx_fifo_size=393216
1202 tx_read_delay=0
1203 wb_comp_delay=10000
1204 wb_delay=10000
1205 dma=system.iobus.slave[4]
1206 pio=system.iobus.master[24]
1207
1208 [system.realview.generic_timer]
1209 type=GenericTimer
1210 eventq_index=0
1211 gic=system.realview.gic
1212 int_phys=29
1213 int_virt=27
1214 system=system
1215
1216 [system.realview.gic]
1217 type=Pl390
1218 clk_domain=system.clk_domain
1219 cpu_addr=738205696
1220 cpu_pio_delay=10000
1221 dist_addr=738201600
1222 dist_pio_delay=10000
1223 eventq_index=0
1224 int_latency=10000
1225 it_lines=128
1226 platform=system.realview
1227 system=system
1228 pio=system.membus.master[2]
1229
1230 [system.realview.hdlcd]
1231 type=HDLcd
1232 amba_id=1314816
1233 clk_domain=system.clk_domain
1234 enable_capture=true
1235 eventq_index=0
1236 gic=system.realview.gic
1237 int_num=117
1238 pio_addr=721420288
1239 pio_latency=10000
1240 pixel_buffer_size=2048
1241 pixel_chunk=32
1242 pxl_clk=system.realview.dcc.osc_pxl
1243 system=system
1244 vnc=system.vncserver
1245 workaround_dma_line_count=true
1246 workaround_swap_rb=true
1247 dma=system.membus.slave[0]
1248 pio=system.iobus.master[6]
1249
1250 [system.realview.ide]
1251 type=IdeController
1252 BAR0=1
1253 BAR0LegacyIO=false
1254 BAR0Size=8
1255 BAR1=1
1256 BAR1LegacyIO=false
1257 BAR1Size=4
1258 BAR2=1
1259 BAR2LegacyIO=false
1260 BAR2Size=8
1261 BAR3=1
1262 BAR3LegacyIO=false
1263 BAR3Size=4
1264 BAR4=1
1265 BAR4LegacyIO=false
1266 BAR4Size=16
1267 BAR5=1
1268 BAR5LegacyIO=false
1269 BAR5Size=0
1270 BIST=0
1271 CacheLineSize=0
1272 CapabilityPtr=0
1273 CardbusCIS=0
1274 ClassCode=1
1275 Command=0
1276 DeviceID=28945
1277 ExpansionROM=0
1278 HeaderType=0
1279 InterruptLine=2
1280 InterruptPin=2
1281 LatencyTimer=0
1282 LegacyIOBase=0
1283 MSICAPBaseOffset=0
1284 MSICAPCapId=0
1285 MSICAPMaskBits=0
1286 MSICAPMsgAddr=0
1287 MSICAPMsgCtrl=0
1288 MSICAPMsgData=0
1289 MSICAPMsgUpperAddr=0
1290 MSICAPNextCapability=0
1291 MSICAPPendingBits=0
1292 MSIXCAPBaseOffset=0
1293 MSIXCAPCapId=0
1294 MSIXCAPNextCapability=0
1295 MSIXMsgCtrl=0
1296 MSIXPbaOffset=0
1297 MSIXTableOffset=0
1298 MaximumLatency=0
1299 MinimumGrant=0
1300 PMCAPBaseOffset=0
1301 PMCAPCapId=0
1302 PMCAPCapabilities=0
1303 PMCAPCtrlStatus=0
1304 PMCAPNextCapability=0
1305 PXCAPBaseOffset=0
1306 PXCAPCapId=0
1307 PXCAPCapabilities=0
1308 PXCAPDevCap2=0
1309 PXCAPDevCapabilities=0
1310 PXCAPDevCtrl=0
1311 PXCAPDevCtrl2=0
1312 PXCAPDevStatus=0
1313 PXCAPLinkCap=0
1314 PXCAPLinkCtrl=0
1315 PXCAPLinkStatus=0
1316 PXCAPNextCapability=0
1317 ProgIF=133
1318 Revision=0
1319 Status=640
1320 SubClassCode=1
1321 SubsystemID=0
1322 SubsystemVendorID=0
1323 VendorID=32902
1324 clk_domain=system.clk_domain
1325 config_latency=20000
1326 ctrl_offset=0
1327 disks=system.cf0
1328 eventq_index=0
1329 host=system.realview.pci_host
1330 io_shift=0
1331 pci_bus=0
1332 pci_dev=1
1333 pci_func=0
1334 pio_latency=30000
1335 system=system
1336 dma=system.iobus.slave[3]
1337 pio=system.iobus.master[23]
1338
1339 [system.realview.kmi0]
1340 type=Pl050
1341 amba_id=1314896
1342 clk_domain=system.clk_domain
1343 eventq_index=0
1344 gic=system.realview.gic
1345 int_delay=1000000
1346 int_num=44
1347 is_mouse=false
1348 pio_addr=470155264
1349 pio_latency=100000
1350 system=system
1351 vnc=system.vncserver
1352 pio=system.iobus.master[7]
1353
1354 [system.realview.kmi1]
1355 type=Pl050
1356 amba_id=1314896
1357 clk_domain=system.clk_domain
1358 eventq_index=0
1359 gic=system.realview.gic
1360 int_delay=1000000
1361 int_num=45
1362 is_mouse=true
1363 pio_addr=470220800
1364 pio_latency=100000
1365 system=system
1366 vnc=system.vncserver
1367 pio=system.iobus.master[8]
1368
1369 [system.realview.l2x0_fake]
1370 type=IsaFake
1371 clk_domain=system.clk_domain
1372 eventq_index=0
1373 fake_mem=false
1374 pio_addr=739246080
1375 pio_latency=100000
1376 pio_size=4095
1377 ret_bad_addr=false
1378 ret_data16=65535
1379 ret_data32=4294967295
1380 ret_data64=18446744073709551615
1381 ret_data8=255
1382 system=system
1383 update_data=false
1384 warn_access=
1385 pio=system.iobus.master[12]
1386
1387 [system.realview.lan_fake]
1388 type=IsaFake
1389 clk_domain=system.clk_domain
1390 eventq_index=0
1391 fake_mem=false
1392 pio_addr=436207616
1393 pio_latency=100000
1394 pio_size=65535
1395 ret_bad_addr=false
1396 ret_data16=65535
1397 ret_data32=4294967295
1398 ret_data64=18446744073709551615
1399 ret_data8=255
1400 system=system
1401 update_data=false
1402 warn_access=
1403 pio=system.iobus.master[19]
1404
1405 [system.realview.local_cpu_timer]
1406 type=CpuLocalTimer
1407 clk_domain=system.clk_domain
1408 eventq_index=0
1409 gic=system.realview.gic
1410 int_num_timer=29
1411 int_num_watchdog=30
1412 pio_addr=738721792
1413 pio_latency=100000
1414 system=system
1415 pio=system.membus.master[4]
1416
1417 [system.realview.mcc]
1418 type=SubSystem
1419 children=osc_clcd osc_mcc osc_peripheral osc_system_bus
1420 eventq_index=0
1421
1422 [system.realview.mcc.osc_clcd]
1423 type=RealViewOsc
1424 dcc=0
1425 device=1
1426 eventq_index=0
1427 freq=42105
1428 parent=system.realview.realview_io
1429 position=0
1430 site=0
1431 voltage_domain=system.voltage_domain
1432
1433 [system.realview.mcc.osc_mcc]
1434 type=RealViewOsc
1435 dcc=0
1436 device=0
1437 eventq_index=0
1438 freq=20000
1439 parent=system.realview.realview_io
1440 position=0
1441 site=0
1442 voltage_domain=system.voltage_domain
1443
1444 [system.realview.mcc.osc_peripheral]
1445 type=RealViewOsc
1446 dcc=0
1447 device=2
1448 eventq_index=0
1449 freq=41667
1450 parent=system.realview.realview_io
1451 position=0
1452 site=0
1453 voltage_domain=system.voltage_domain
1454
1455 [system.realview.mcc.osc_system_bus]
1456 type=RealViewOsc
1457 dcc=0
1458 device=4
1459 eventq_index=0
1460 freq=41667
1461 parent=system.realview.realview_io
1462 position=0
1463 site=0
1464 voltage_domain=system.voltage_domain
1465
1466 [system.realview.mmc_fake]
1467 type=AmbaFake
1468 amba_id=0
1469 clk_domain=system.clk_domain
1470 eventq_index=0
1471 ignore_access=false
1472 pio_addr=470089728
1473 pio_latency=100000
1474 system=system
1475 pio=system.iobus.master[21]
1476
1477 [system.realview.nvmem]
1478 type=SimpleMemory
1479 bandwidth=73.000000
1480 clk_domain=system.clk_domain
1481 conf_table_reported=false
1482 eventq_index=0
1483 in_addr_map=true
1484 latency=30000
1485 latency_var=0
1486 null=false
1487 range=0:67108863
1488 port=system.membus.master[1]
1489
1490 [system.realview.pci_host]
1491 type=GenericPciHost
1492 clk_domain=system.clk_domain
1493 conf_base=805306368
1494 conf_device_bits=16
1495 conf_size=268435456
1496 eventq_index=0
1497 pci_dma_base=0
1498 pci_mem_base=0
1499 pci_pio_base=0
1500 platform=system.realview
1501 system=system
1502 pio=system.iobus.master[2]
1503
1504 [system.realview.realview_io]
1505 type=RealViewCtrl
1506 clk_domain=system.clk_domain
1507 eventq_index=0
1508 idreg=35979264
1509 pio_addr=469827584
1510 pio_latency=100000
1511 proc_id0=335544320
1512 proc_id1=335544320
1513 system=system
1514 pio=system.iobus.master[1]
1515
1516 [system.realview.rtc]
1517 type=PL031
1518 amba_id=3412017
1519 clk_domain=system.clk_domain
1520 eventq_index=0
1521 gic=system.realview.gic
1522 int_delay=100000
1523 int_num=36
1524 pio_addr=471269376
1525 pio_latency=100000
1526 system=system
1527 time=Thu Jan  1 00:00:00 2009
1528 pio=system.iobus.master[10]
1529
1530 [system.realview.sp810_fake]
1531 type=AmbaFake
1532 amba_id=0
1533 clk_domain=system.clk_domain
1534 eventq_index=0
1535 ignore_access=true
1536 pio_addr=469893120
1537 pio_latency=100000
1538 system=system
1539 pio=system.iobus.master[16]
1540
1541 [system.realview.timer0]
1542 type=Sp804
1543 amba_id=1316868
1544 clk_domain=system.clk_domain
1545 clock0=1000000
1546 clock1=1000000
1547 eventq_index=0
1548 gic=system.realview.gic
1549 int_num0=34
1550 int_num1=34
1551 pio_addr=470876160
1552 pio_latency=100000
1553 system=system
1554 pio=system.iobus.master[3]
1555
1556 [system.realview.timer1]
1557 type=Sp804
1558 amba_id=1316868
1559 clk_domain=system.clk_domain
1560 clock0=1000000
1561 clock1=1000000
1562 eventq_index=0
1563 gic=system.realview.gic
1564 int_num0=35
1565 int_num1=35
1566 pio_addr=470941696
1567 pio_latency=100000
1568 system=system
1569 pio=system.iobus.master[4]
1570
1571 [system.realview.uart]
1572 type=Pl011
1573 clk_domain=system.clk_domain
1574 end_on_eot=false
1575 eventq_index=0
1576 gic=system.realview.gic
1577 int_delay=100000
1578 int_num=37
1579 pio_addr=470351872
1580 pio_latency=100000
1581 platform=system.realview
1582 system=system
1583 terminal=system.terminal
1584 pio=system.iobus.master[0]
1585
1586 [system.realview.uart1_fake]
1587 type=AmbaFake
1588 amba_id=0
1589 clk_domain=system.clk_domain
1590 eventq_index=0
1591 ignore_access=false
1592 pio_addr=470417408
1593 pio_latency=100000
1594 system=system
1595 pio=system.iobus.master[13]
1596
1597 [system.realview.uart2_fake]
1598 type=AmbaFake
1599 amba_id=0
1600 clk_domain=system.clk_domain
1601 eventq_index=0
1602 ignore_access=false
1603 pio_addr=470482944
1604 pio_latency=100000
1605 system=system
1606 pio=system.iobus.master[14]
1607
1608 [system.realview.uart3_fake]
1609 type=AmbaFake
1610 amba_id=0
1611 clk_domain=system.clk_domain
1612 eventq_index=0
1613 ignore_access=false
1614 pio_addr=470548480
1615 pio_latency=100000
1616 system=system
1617 pio=system.iobus.master[15]
1618
1619 [system.realview.usb_fake]
1620 type=IsaFake
1621 clk_domain=system.clk_domain
1622 eventq_index=0
1623 fake_mem=false
1624 pio_addr=452984832
1625 pio_latency=100000
1626 pio_size=131071
1627 ret_bad_addr=false
1628 ret_data16=65535
1629 ret_data32=4294967295
1630 ret_data64=18446744073709551615
1631 ret_data8=255
1632 system=system
1633 update_data=false
1634 warn_access=
1635 pio=system.iobus.master[20]
1636
1637 [system.realview.vgic]
1638 type=VGic
1639 clk_domain=system.clk_domain
1640 eventq_index=0
1641 gic=system.realview.gic
1642 hv_addr=738213888
1643 pio_delay=10000
1644 platform=system.realview
1645 ppint=25
1646 system=system
1647 vcpu_addr=738222080
1648 pio=system.membus.master[3]
1649
1650 [system.realview.vram]
1651 type=SimpleMemory
1652 bandwidth=73.000000
1653 clk_domain=system.clk_domain
1654 conf_table_reported=false
1655 eventq_index=0
1656 in_addr_map=true
1657 latency=30000
1658 latency_var=0
1659 null=false
1660 range=402653184:436207615
1661 port=system.iobus.master[11]
1662
1663 [system.realview.watchdog_fake]
1664 type=AmbaFake
1665 amba_id=0
1666 clk_domain=system.clk_domain
1667 eventq_index=0
1668 ignore_access=false
1669 pio_addr=470745088
1670 pio_latency=100000
1671 system=system
1672 pio=system.iobus.master[17]
1673
1674 [system.terminal]
1675 type=Terminal
1676 eventq_index=0
1677 intr_control=system.intrctrl
1678 number=0
1679 output=true
1680 port=3456
1681
1682 [system.vncserver]
1683 type=VncServer
1684 eventq_index=0
1685 frame_capture=false
1686 number=0
1687 port=5900
1688
1689 [system.voltage_domain]
1690 type=VoltageDomain
1691 eventq_index=0
1692 voltage=1.000000
1693