tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 full_system=true
   5 time_sync_enable=false
   6 time_sync_period=100000000000
   7 time_sync_spin_threshold=100000000
   8
   9 [system]
  10 type=LinuxArmSystem
  11 children=bridge cf0 cpu intrctrl iobus iocache membus physmem realview terminal vncserver
  12 atags_addr=256
  13 boot_loader=/dist/m5/system/binaries/boot.arm
  14 boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
  15 clock=1000
  16 dtb_filename=False
  17 early_kernel_symbols=false
  18 enable_context_switch_stats_dump=false
  19 flags_addr=268435504
  20 gic_cpu_addr=520093952
  21 init_param=0
  22 kernel=/dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
  23 load_addr_mask=268435455
  24 machine_type=RealView_PBX
  25 mem_mode=timing
  26 mem_ranges=0:134217727
  27 memories=system.physmem system.realview.nvmem
  28 multi_proc=true
  29 num_work_ids=16
  30 panic_on_oops=true
  31 panic_on_panic=true
  32 readfile=tests/halt.sh
  33 symbolfile=
  34 work_begin_ckpt_count=0
  35 work_begin_cpu_id_exit=-1
  36 work_begin_exit_count=0
  37 work_cpus_ckpt_count=0
  38 work_end_ckpt_count=0
  39 work_end_exit_count=0
  40 work_item_id=-1
  41 system_port=system.membus.slave[0]
  42
  43 [system.bridge]
  44 type=Bridge
  45 clock=1000
  46 delay=50000
  47 ranges=268435456:520093695 1073741824:1610612735
  48 req_size=16
  49 resp_size=16
  50 master=system.iobus.slave[0]
  51 slave=system.membus.master[0]
  52
  53 [system.cf0]
  54 type=IdeDisk
  55 children=image
  56 delay=1000000
  57 driveID=master
  58 image=system.cf0.image
  59
  60 [system.cf0.image]
  61 type=CowDiskImage
  62 children=child
  63 child=system.cf0.image.child
  64 image_file=
  65 read_only=false
  66 table_size=65536
  67
  68 [system.cf0.image.child]
  69 type=RawDiskImage
  70 image_file=/dist/m5/system/disks/linux-arm-ael.img
  71 read_only=true
  72
  73 [system.cpu]
  74 type=DerivO3CPU
  75 children=branchPred checker dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer
  76 LFSTSize=1024
  77 LQEntries=32
  78 LSQCheckLoads=true
  79 LSQDepCheckShift=4
  80 SQEntries=32
  81 SSITSize=1024
  82 activity=0
  83 backComSize=5
  84 branchPred=system.cpu.branchPred
  85 cachePorts=200
  86 checker=system.cpu.checker
  87 clock=500
  88 commitToDecodeDelay=1
  89 commitToFetchDelay=1
  90 commitToIEWDelay=1
  91 commitToRenameDelay=1
  92 commitWidth=8
  93 cpu_id=0
  94 decodeToFetchDelay=1
  95 decodeToRenameDelay=1
  96 decodeWidth=8
  97 dispatchWidth=8
  98 do_checkpoint_insts=true
  99 do_quiesce=true
 100 do_statistics_insts=true
 101 dtb=system.cpu.dtb
 102 fetchToDecodeDelay=1
 103 fetchTrapLatency=1
 104 fetchWidth=8
 105 forwardComSize=5
 106 fuPool=system.cpu.fuPool
 107 function_trace=false
 108 function_trace_start=0
 109 iewToCommitDelay=1
 110 iewToDecodeDelay=1
 111 iewToFetchDelay=1
 112 iewToRenameDelay=1
 113 interrupts=system.cpu.interrupts
 114 isa=system.cpu.isa
 115 issueToExecuteDelay=1
 116 issueWidth=8
 117 itb=system.cpu.itb
 118 max_insts_all_threads=0
 119 max_insts_any_thread=0
 120 max_loads_all_threads=0
 121 max_loads_any_thread=0
 122 needsTSO=false
 123 numIQEntries=64
 124 numPhysFloatRegs=256
 125 numPhysIntRegs=256
 126 numROBEntries=192
 127 numRobs=1
 128 numThreads=1
 129 profile=0
 130 progress_interval=0
 131 renameToDecodeDelay=1
 132 renameToFetchDelay=1
 133 renameToIEWDelay=2
 134 renameToROBDelay=1
 135 renameWidth=8
 136 simpoint_start_insts=
 137 smtCommitPolicy=RoundRobin
 138 smtFetchPolicy=SingleThread
 139 smtIQPolicy=Partitioned
 140 smtIQThreshold=100
 141 smtLSQPolicy=Partitioned
 142 smtLSQThreshold=100
 143 smtNumFetchingThreads=1
 144 smtROBPolicy=Partitioned
 145 smtROBThreshold=100
 146 squashWidth=8
 147 store_set_clear_period=250000
 148 switched_out=false
 149 system=system
 150 tracer=system.cpu.tracer
 151 trapLatency=13
 152 wbDepth=1
 153 wbWidth=8
 154 workload=
 155 dcache_port=system.cpu.dcache.cpu_side
 156 icache_port=system.cpu.icache.cpu_side
 157
 158 [system.cpu.branchPred]
 159 type=BranchPredictor
 160 BTBEntries=4096
 161 BTBTagSize=16
 162 RASSize=16
 163 choiceCtrBits=2
 164 choicePredictorSize=8192
 165 globalCtrBits=2
 166 globalHistoryBits=13
 167 globalPredictorSize=8192
 168 instShiftAmt=2
 169 localCtrBits=2
 170 localHistoryBits=11
 171 localHistoryTableSize=2048
 172 localPredictorSize=2048
 173 numThreads=1
 174 predType=tournament
 175
 176 [system.cpu.checker]
 177 type=O3Checker
 178 children=dtb isa itb tracer
 179 branchPred=Null
 180 checker=Null
 181 clock=500
 182 cpu_id=0
 183 do_checkpoint_insts=true
 184 do_quiesce=true
 185 do_statistics_insts=true
 186 dtb=system.cpu.checker.dtb
 187 exitOnError=false
 188 function_trace=false
 189 function_trace_start=0
 190 interrupts=Null
 191 isa=system.cpu.checker.isa
 192 itb=system.cpu.checker.itb
 193 max_insts_all_threads=0
 194 max_insts_any_thread=0
 195 max_loads_all_threads=0
 196 max_loads_any_thread=0
 197 numThreads=1
 198 profile=0
 199 progress_interval=0
 200 simpoint_start_insts=
 201 switched_out=false
 202 system=system
 203 tracer=system.cpu.checker.tracer
 204 updateOnError=true
 205 warnOnlyOnLoadError=true
 206 workload=
 207
 208 [system.cpu.checker.dtb]
 209 type=ArmTLB
 210 children=walker
 211 size=64
 212 walker=system.cpu.checker.dtb.walker
 213
 214 [system.cpu.checker.dtb.walker]
 215 type=ArmTableWalker
 216 clock=500
 217 num_squash_per_cycle=2
 218 sys=system
 219 port=system.cpu.toL2Bus.slave[5]
 220
 221 [system.cpu.checker.isa]
 222 type=ArmISA
 223 fpsid=1090793632
 224 id_isar0=34607377
 225 id_isar1=34677009
 226 id_isar2=555950401
 227 id_isar3=17899825
 228 id_isar4=268501314
 229 id_isar5=0
 230 id_mmfr0=3
 231 id_mmfr1=0
 232 id_mmfr2=19070976
 233 id_mmfr3=4027589137
 234 id_pfr0=49
 235 id_pfr1=1
 236 midr=890224640
 237
 238 [system.cpu.checker.itb]
 239 type=ArmTLB
 240 children=walker
 241 size=64
 242 walker=system.cpu.checker.itb.walker
 243
 244 [system.cpu.checker.itb.walker]
 245 type=ArmTableWalker
 246 clock=500
 247 num_squash_per_cycle=2
 248 sys=system
 249 port=system.cpu.toL2Bus.slave[4]
 250
 251 [system.cpu.checker.tracer]
 252 type=ExeTracer
 253
 254 [system.cpu.dcache]
 255 type=BaseCache
 256 addr_ranges=0:18446744073709551615
 257 assoc=4
 258 block_size=64
 259 clock=500
 260 forward_snoops=true
 261 hit_latency=2
 262 is_top_level=true
 263 max_miss_count=0
 264 mshrs=4
 265 prefetch_on_access=false
 266 prefetcher=Null
 267 response_latency=2
 268 size=32768
 269 system=system
 270 tgts_per_mshr=20
 271 two_queue=false
 272 write_buffers=8
 273 cpu_side=system.cpu.dcache_port
 274 mem_side=system.cpu.toL2Bus.slave[1]
 275
 276 [system.cpu.dtb]
 277 type=ArmTLB
 278 children=walker
 279 size=64
 280 walker=system.cpu.dtb.walker
 281
 282 [system.cpu.dtb.walker]
 283 type=ArmTableWalker
 284 clock=500
 285 num_squash_per_cycle=2
 286 sys=system
 287 port=system.cpu.toL2Bus.slave[3]
 288
 289 [system.cpu.fuPool]
 290 type=FUPool
 291 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
 292 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
 293
 294 [system.cpu.fuPool.FUList0]
 295 type=FUDesc
 296 children=opList
 297 count=6
 298 opList=system.cpu.fuPool.FUList0.opList
 299
 300 [system.cpu.fuPool.FUList0.opList]
 301 type=OpDesc
 302 issueLat=1
 303 opClass=IntAlu
 304 opLat=1
 305
 306 [system.cpu.fuPool.FUList1]
 307 type=FUDesc
 308 children=opList0 opList1
 309 count=2
 310 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
 311
 312 [system.cpu.fuPool.FUList1.opList0]
 313 type=OpDesc
 314 issueLat=1
 315 opClass=IntMult
 316 opLat=3
 317
 318 [system.cpu.fuPool.FUList1.opList1]
 319 type=OpDesc
 320 issueLat=19
 321 opClass=IntDiv
 322 opLat=20
 323
 324 [system.cpu.fuPool.FUList2]
 325 type=FUDesc
 326 children=opList0 opList1 opList2
 327 count=4
 328 opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
 329
 330 [system.cpu.fuPool.FUList2.opList0]
 331 type=OpDesc
 332 issueLat=1
 333 opClass=FloatAdd
 334 opLat=2
 335
 336 [system.cpu.fuPool.FUList2.opList1]
 337 type=OpDesc
 338 issueLat=1
 339 opClass=FloatCmp
 340 opLat=2
 341
 342 [system.cpu.fuPool.FUList2.opList2]
 343 type=OpDesc
 344 issueLat=1
 345 opClass=FloatCvt
 346 opLat=2
 347
 348 [system.cpu.fuPool.FUList3]
 349 type=FUDesc
 350 children=opList0 opList1 opList2
 351 count=2
 352 opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
 353
 354 [system.cpu.fuPool.FUList3.opList0]
 355 type=OpDesc
 356 issueLat=1
 357 opClass=FloatMult
 358 opLat=4
 359
 360 [system.cpu.fuPool.FUList3.opList1]
 361 type=OpDesc
 362 issueLat=12
 363 opClass=FloatDiv
 364 opLat=12
 365
 366 [system.cpu.fuPool.FUList3.opList2]
 367 type=OpDesc
 368 issueLat=24
 369 opClass=FloatSqrt
 370 opLat=24
 371
 372 [system.cpu.fuPool.FUList4]
 373 type=FUDesc
 374 children=opList
 375 count=0
 376 opList=system.cpu.fuPool.FUList4.opList
 377
 378 [system.cpu.fuPool.FUList4.opList]
 379 type=OpDesc
 380 issueLat=1
 381 opClass=MemRead
 382 opLat=1
 383
 384 [system.cpu.fuPool.FUList5]
 385 type=FUDesc
 386 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
 387 count=4
 388 opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
 389
 390 [system.cpu.fuPool.FUList5.opList00]
 391 type=OpDesc
 392 issueLat=1
 393 opClass=SimdAdd
 394 opLat=1
 395
 396 [system.cpu.fuPool.FUList5.opList01]
 397 type=OpDesc
 398 issueLat=1
 399 opClass=SimdAddAcc
 400 opLat=1
 401
 402 [system.cpu.fuPool.FUList5.opList02]
 403 type=OpDesc
 404 issueLat=1
 405 opClass=SimdAlu
 406 opLat=1
 407
 408 [system.cpu.fuPool.FUList5.opList03]
 409 type=OpDesc
 410 issueLat=1
 411 opClass=SimdCmp
 412 opLat=1
 413
 414 [system.cpu.fuPool.FUList5.opList04]
 415 type=OpDesc
 416 issueLat=1
 417 opClass=SimdCvt
 418 opLat=1
 419
 420 [system.cpu.fuPool.FUList5.opList05]
 421 type=OpDesc
 422 issueLat=1
 423 opClass=SimdMisc
 424 opLat=1
 425
 426 [system.cpu.fuPool.FUList5.opList06]
 427 type=OpDesc
 428 issueLat=1
 429 opClass=SimdMult
 430 opLat=1
 431
 432 [system.cpu.fuPool.FUList5.opList07]
 433 type=OpDesc
 434 issueLat=1
 435 opClass=SimdMultAcc
 436 opLat=1
 437
 438 [system.cpu.fuPool.FUList5.opList08]
 439 type=OpDesc
 440 issueLat=1
 441 opClass=SimdShift
 442 opLat=1
 443
 444 [system.cpu.fuPool.FUList5.opList09]
 445 type=OpDesc
 446 issueLat=1
 447 opClass=SimdShiftAcc
 448 opLat=1
 449
 450 [system.cpu.fuPool.FUList5.opList10]
 451 type=OpDesc
 452 issueLat=1
 453 opClass=SimdSqrt
 454 opLat=1
 455
 456 [system.cpu.fuPool.FUList5.opList11]
 457 type=OpDesc
 458 issueLat=1
 459 opClass=SimdFloatAdd
 460 opLat=1
 461
 462 [system.cpu.fuPool.FUList5.opList12]
 463 type=OpDesc
 464 issueLat=1
 465 opClass=SimdFloatAlu
 466 opLat=1
 467
 468 [system.cpu.fuPool.FUList5.opList13]
 469 type=OpDesc
 470 issueLat=1
 471 opClass=SimdFloatCmp
 472 opLat=1
 473
 474 [system.cpu.fuPool.FUList5.opList14]
 475 type=OpDesc
 476 issueLat=1
 477 opClass=SimdFloatCvt
 478 opLat=1
 479
 480 [system.cpu.fuPool.FUList5.opList15]
 481 type=OpDesc
 482 issueLat=1
 483 opClass=SimdFloatDiv
 484 opLat=1
 485
 486 [system.cpu.fuPool.FUList5.opList16]
 487 type=OpDesc
 488 issueLat=1
 489 opClass=SimdFloatMisc
 490 opLat=1
 491
 492 [system.cpu.fuPool.FUList5.opList17]
 493 type=OpDesc
 494 issueLat=1
 495 opClass=SimdFloatMult
 496 opLat=1
 497
 498 [system.cpu.fuPool.FUList5.opList18]
 499 type=OpDesc
 500 issueLat=1
 501 opClass=SimdFloatMultAcc
 502 opLat=1
 503
 504 [system.cpu.fuPool.FUList5.opList19]
 505 type=OpDesc
 506 issueLat=1
 507 opClass=SimdFloatSqrt
 508 opLat=1
 509
 510 [system.cpu.fuPool.FUList6]
 511 type=FUDesc
 512 children=opList
 513 count=0
 514 opList=system.cpu.fuPool.FUList6.opList
 515
 516 [system.cpu.fuPool.FUList6.opList]
 517 type=OpDesc
 518 issueLat=1
 519 opClass=MemWrite
 520 opLat=1
 521
 522 [system.cpu.fuPool.FUList7]
 523 type=FUDesc
 524 children=opList0 opList1
 525 count=4
 526 opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
 527
 528 [system.cpu.fuPool.FUList7.opList0]
 529 type=OpDesc
 530 issueLat=1
 531 opClass=MemRead
 532 opLat=1
 533
 534 [system.cpu.fuPool.FUList7.opList1]
 535 type=OpDesc
 536 issueLat=1
 537 opClass=MemWrite
 538 opLat=1
 539
 540 [system.cpu.fuPool.FUList8]
 541 type=FUDesc
 542 children=opList
 543 count=1
 544 opList=system.cpu.fuPool.FUList8.opList
 545
 546 [system.cpu.fuPool.FUList8.opList]
 547 type=OpDesc
 548 issueLat=3
 549 opClass=IprAccess
 550 opLat=3
 551
 552 [system.cpu.icache]
 553 type=BaseCache
 554 addr_ranges=0:18446744073709551615
 555 assoc=1
 556 block_size=64
 557 clock=500
 558 forward_snoops=true
 559 hit_latency=2
 560 is_top_level=true
 561 max_miss_count=0
 562 mshrs=4
 563 prefetch_on_access=false
 564 prefetcher=Null
 565 response_latency=2
 566 size=32768
 567 system=system
 568 tgts_per_mshr=20
 569 two_queue=false
 570 write_buffers=8
 571 cpu_side=system.cpu.icache_port
 572 mem_side=system.cpu.toL2Bus.slave[0]
 573
 574 [system.cpu.interrupts]
 575 type=ArmInterrupts
 576
 577 [system.cpu.isa]
 578 type=ArmISA
 579 fpsid=1090793632
 580 id_isar0=34607377
 581 id_isar1=34677009
 582 id_isar2=555950401
 583 id_isar3=17899825
 584 id_isar4=268501314
 585 id_isar5=0
 586 id_mmfr0=3
 587 id_mmfr1=0
 588 id_mmfr2=19070976
 589 id_mmfr3=4027589137
 590 id_pfr0=49
 591 id_pfr1=1
 592 midr=890224640
 593
 594 [system.cpu.itb]
 595 type=ArmTLB
 596 children=walker
 597 size=64
 598 walker=system.cpu.itb.walker
 599
 600 [system.cpu.itb.walker]
 601 type=ArmTableWalker
 602 clock=500
 603 num_squash_per_cycle=2
 604 sys=system
 605 port=system.cpu.toL2Bus.slave[2]
 606
 607 [system.cpu.l2cache]
 608 type=BaseCache
 609 addr_ranges=0:18446744073709551615
 610 assoc=8
 611 block_size=64
 612 clock=500
 613 forward_snoops=true
 614 hit_latency=20
 615 is_top_level=false
 616 max_miss_count=0
 617 mshrs=20
 618 prefetch_on_access=false
 619 prefetcher=Null
 620 response_latency=20
 621 size=4194304
 622 system=system
 623 tgts_per_mshr=12
 624 two_queue=false
 625 write_buffers=8
 626 cpu_side=system.cpu.toL2Bus.master[0]
 627 mem_side=system.membus.slave[1]
 628
 629 [system.cpu.toL2Bus]
 630 type=CoherentBus
 631 block_size=64
 632 clock=500
 633 header_cycles=1
 634 system=system
 635 use_default_range=false
 636 width=32
 637 master=system.cpu.l2cache.cpu_side
 638 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port
 639
 640 [system.cpu.tracer]
 641 type=ExeTracer
 642
 643 [system.intrctrl]
 644 type=IntrControl
 645 sys=system
 646
 647 [system.iobus]
 648 type=NoncoherentBus
 649 block_size=64
 650 clock=1000
 651 header_cycles=1
 652 use_default_range=false
 653 width=8
 654 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side
 655 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
 656
 657 [system.iocache]
 658 type=BaseCache
 659 addr_ranges=0:134217727
 660 assoc=8
 661 block_size=64
 662 clock=1000
 663 forward_snoops=false
 664 hit_latency=50
 665 is_top_level=true
 666 max_miss_count=0
 667 mshrs=20
 668 prefetch_on_access=false
 669 prefetcher=Null
 670 response_latency=50
 671 size=1024
 672 system=system
 673 tgts_per_mshr=12
 674 two_queue=false
 675 write_buffers=8
 676 cpu_side=system.iobus.master[25]
 677 mem_side=system.membus.slave[2]
 678
 679 [system.membus]
 680 type=CoherentBus
 681 children=badaddr_responder
 682 block_size=64
 683 clock=1000
 684 header_cycles=1
 685 system=system
 686 use_default_range=false
 687 width=8
 688 default=system.membus.badaddr_responder.pio
 689 master=system.bridge.slave system.realview.nvmem.port system.physmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio
 690 slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
 691
 692 [system.membus.badaddr_responder]
 693 type=IsaFake
 694 clock=1000
 695 fake_mem=false
 696 pio_addr=0
 697 pio_latency=100000
 698 pio_size=8
 699 ret_bad_addr=true
 700 ret_data16=65535
 701 ret_data32=4294967295
 702 ret_data64=18446744073709551615
 703 ret_data8=255
 704 system=system
 705 update_data=false
 706 warn_access=warn
 707 pio=system.membus.default
 708
 709 [system.physmem]
 710 type=SimpleDRAM
 711 activation_limit=4
 712 addr_mapping=openmap
 713 banks_per_rank=8
 714 channels=1
 715 clock=1000
 716 conf_table_reported=true
 717 in_addr_map=true
 718 lines_per_rowbuffer=32
 719 mem_sched_policy=frfcfs
 720 null=false
 721 page_policy=open
 722 range=0:134217727
 723 ranks_per_channel=2
 724 read_buffer_size=32
 725 tBURST=5000
 726 tCL=13750
 727 tRCD=13750
 728 tREFI=7800000
 729 tRFC=300000
 730 tRP=13750
 731 tWTR=7500
 732 tXAW=40000
 733 write_buffer_size=32
 734 write_thresh_perc=70
 735 zero=false
 736 port=system.membus.master[2]
 737
 738 [system.realview]
 739 type=RealView
 740 children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
 741 intrctrl=system.intrctrl
 742 max_mem_size=268435456
 743 mem_start_addr=0
 744 pci_cfg_base=0
 745 system=system
 746
 747 [system.realview.a9scu]
 748 type=A9SCU
 749 clock=1000
 750 pio_addr=520093696
 751 pio_latency=100000
 752 system=system
 753 pio=system.membus.master[5]
 754
 755 [system.realview.aaci_fake]
 756 type=AmbaFake
 757 amba_id=0
 758 clock=1000
 759 ignore_access=false
 760 pio_addr=268451840
 761 pio_latency=100000
 762 system=system
 763 pio=system.iobus.master[21]
 764
 765 [system.realview.cf_ctrl]
 766 type=IdeController
 767 BAR0=402653184
 768 BAR0LegacyIO=true
 769 BAR0Size=16
 770 BAR1=402653440
 771 BAR1LegacyIO=true
 772 BAR1Size=1
 773 BAR2=1
 774 BAR2LegacyIO=false
 775 BAR2Size=8
 776 BAR3=1
 777 BAR3LegacyIO=false
 778 BAR3Size=4
 779 BAR4=1
 780 BAR4LegacyIO=false
 781 BAR4Size=16
 782 BAR5=1
 783 BAR5LegacyIO=false
 784 BAR5Size=0
 785 BIST=0
 786 CacheLineSize=0
 787 CardbusCIS=0
 788 ClassCode=1
 789 Command=1
 790 DeviceID=28945
 791 ExpansionROM=0
 792 HeaderType=0
 793 InterruptLine=31
 794 InterruptPin=1
 795 LatencyTimer=0
 796 MaximumLatency=0
 797 MinimumGrant=0
 798 ProgIF=133
 799 Revision=0
 800 Status=640
 801 SubClassCode=1
 802 SubsystemID=0
 803 SubsystemVendorID=0
 804 VendorID=32902
 805 clock=1000
 806 config_latency=20000
 807 ctrl_offset=2
 808 disks=system.cf0
 809 io_shift=1
 810 pci_bus=2
 811 pci_dev=7
 812 pci_func=0
 813 pio_latency=30000
 814 platform=system.realview
 815 system=system
 816 config=system.iobus.master[8]
 817 dma=system.iobus.slave[2]
 818 pio=system.iobus.master[7]
 819
 820 [system.realview.clcd]
 821 type=Pl111
 822 amba_id=1315089
 823 clock=1000
 824 gic=system.realview.gic
 825 int_num=55
 826 pio_addr=268566528
 827 pio_latency=10000
 828 pixel_clock=41667
 829 system=system
 830 vnc=system.vncserver
 831 dma=system.iobus.slave[1]
 832 pio=system.iobus.master[4]
 833
 834 [system.realview.dmac_fake]
 835 type=AmbaFake
 836 amba_id=0
 837 clock=1000
 838 ignore_access=false
 839 pio_addr=268632064
 840 pio_latency=100000
 841 system=system
 842 pio=system.iobus.master[9]
 843
 844 [system.realview.flash_fake]
 845 type=IsaFake
 846 clock=1000
 847 fake_mem=true
 848 pio_addr=1073741824
 849 pio_latency=100000
 850 pio_size=536870912
 851 ret_bad_addr=false
 852 ret_data16=65535
 853 ret_data32=4294967295
 854 ret_data64=18446744073709551615
 855 ret_data8=255
 856 system=system
 857 update_data=false
 858 warn_access=
 859 pio=system.iobus.master[24]
 860
 861 [system.realview.gic]
 862 type=Pl390
 863 clock=1000
 864 cpu_addr=520093952
 865 cpu_pio_delay=10000
 866 dist_addr=520097792
 867 dist_pio_delay=10000
 868 int_latency=10000
 869 it_lines=128
 870 platform=system.realview
 871 system=system
 872 pio=system.membus.master[3]
 873
 874 [system.realview.gpio0_fake]
 875 type=AmbaFake
 876 amba_id=0
 877 clock=1000
 878 ignore_access=false
 879 pio_addr=268513280
 880 pio_latency=100000
 881 system=system
 882 pio=system.iobus.master[16]
 883
 884 [system.realview.gpio1_fake]
 885 type=AmbaFake
 886 amba_id=0
 887 clock=1000
 888 ignore_access=false
 889 pio_addr=268517376
 890 pio_latency=100000
 891 system=system
 892 pio=system.iobus.master[17]
 893
 894 [system.realview.gpio2_fake]
 895 type=AmbaFake
 896 amba_id=0
 897 clock=1000
 898 ignore_access=false
 899 pio_addr=268521472
 900 pio_latency=100000
 901 system=system
 902 pio=system.iobus.master[18]
 903
 904 [system.realview.kmi0]
 905 type=Pl050
 906 amba_id=1314896
 907 clock=1000
 908 gic=system.realview.gic
 909 int_delay=1000000
 910 int_num=52
 911 is_mouse=false
 912 pio_addr=268460032
 913 pio_latency=100000
 914 system=system
 915 vnc=system.vncserver
 916 pio=system.iobus.master[5]
 917
 918 [system.realview.kmi1]
 919 type=Pl050
 920 amba_id=1314896
 921 clock=1000
 922 gic=system.realview.gic
 923 int_delay=1000000
 924 int_num=53
 925 is_mouse=true
 926 pio_addr=268464128
 927 pio_latency=100000
 928 system=system
 929 vnc=system.vncserver
 930 pio=system.iobus.master[6]
 931
 932 [system.realview.l2x0_fake]
 933 type=IsaFake
 934 clock=1000
 935 fake_mem=false
 936 pio_addr=520101888
 937 pio_latency=100000
 938 pio_size=4095
 939 ret_bad_addr=false
 940 ret_data16=65535
 941 ret_data32=4294967295
 942 ret_data64=18446744073709551615
 943 ret_data8=255
 944 system=system
 945 update_data=false
 946 warn_access=
 947 pio=system.membus.master[4]
 948
 949 [system.realview.local_cpu_timer]
 950 type=CpuLocalTimer
 951 clock=1000
 952 gic=system.realview.gic
 953 int_num_timer=29
 954 int_num_watchdog=30
 955 pio_addr=520095232
 956 pio_latency=100000
 957 system=system
 958 pio=system.membus.master[6]
 959
 960 [system.realview.mmc_fake]
 961 type=AmbaFake
 962 amba_id=0
 963 clock=1000
 964 ignore_access=false
 965 pio_addr=268455936
 966 pio_latency=100000
 967 system=system
 968 pio=system.iobus.master[22]
 969
 970 [system.realview.nvmem]
 971 type=SimpleMemory
 972 bandwidth=73.000000
 973 clock=1000
 974 conf_table_reported=false
 975 in_addr_map=true
 976 latency=30000
 977 latency_var=0
 978 null=false
 979 range=2147483648:2214592511
 980 zero=true
 981 port=system.membus.master[1]
 982
 983 [system.realview.realview_io]
 984 type=RealViewCtrl
 985 clock=1000
 986 idreg=0
 987 pio_addr=268435456
 988 pio_latency=100000
 989 proc_id0=201326592
 990 proc_id1=201327138
 991 system=system
 992 pio=system.iobus.master[1]
 993
 994 [system.realview.rtc]
 995 type=PL031
 996 amba_id=3412017
 997 clock=1000
 998 gic=system.realview.gic
 999 int_delay=100000
1000 int_num=42
1001 pio_addr=268529664
1002 pio_latency=100000
1003 system=system
1004 time=Thu Jan  1 00:00:00 2009
1005 pio=system.iobus.master[23]
1006
1007 [system.realview.sci_fake]
1008 type=AmbaFake
1009 amba_id=0
1010 clock=1000
1011 ignore_access=false
1012 pio_addr=268492800
1013 pio_latency=100000
1014 system=system
1015 pio=system.iobus.master[20]
1016
1017 [system.realview.smc_fake]
1018 type=AmbaFake
1019 amba_id=0
1020 clock=1000
1021 ignore_access=false
1022 pio_addr=269357056
1023 pio_latency=100000
1024 system=system
1025 pio=system.iobus.master[13]
1026
1027 [system.realview.sp810_fake]
1028 type=AmbaFake
1029 amba_id=0
1030 clock=1000
1031 ignore_access=true
1032 pio_addr=268439552
1033 pio_latency=100000
1034 system=system
1035 pio=system.iobus.master[14]
1036
1037 [system.realview.ssp_fake]
1038 type=AmbaFake
1039 amba_id=0
1040 clock=1000
1041 ignore_access=false
1042 pio_addr=268488704
1043 pio_latency=100000
1044 system=system
1045 pio=system.iobus.master[19]
1046
1047 [system.realview.timer0]
1048 type=Sp804
1049 amba_id=1316868
1050 clock=1000
1051 clock0=1000000
1052 clock1=1000000
1053 gic=system.realview.gic
1054 int_num0=36
1055 int_num1=36
1056 pio_addr=268505088
1057 pio_latency=100000
1058 system=system
1059 pio=system.iobus.master[2]
1060
1061 [system.realview.timer1]
1062 type=Sp804
1063 amba_id=1316868
1064 clock=1000
1065 clock0=1000000
1066 clock1=1000000
1067 gic=system.realview.gic
1068 int_num0=37
1069 int_num1=37
1070 pio_addr=268509184
1071 pio_latency=100000
1072 system=system
1073 pio=system.iobus.master[3]
1074
1075 [system.realview.uart]
1076 type=Pl011
1077 clock=1000
1078 end_on_eot=false
1079 gic=system.realview.gic
1080 int_delay=100000
1081 int_num=44
1082 pio_addr=268472320
1083 pio_latency=100000
1084 platform=system.realview
1085 system=system
1086 terminal=system.terminal
1087 pio=system.iobus.master[0]
1088
1089 [system.realview.uart1_fake]
1090 type=AmbaFake
1091 amba_id=0
1092 clock=1000
1093 ignore_access=false
1094 pio_addr=268476416
1095 pio_latency=100000
1096 system=system
1097 pio=system.iobus.master[10]
1098
1099 [system.realview.uart2_fake]
1100 type=AmbaFake
1101 amba_id=0
1102 clock=1000
1103 ignore_access=false
1104 pio_addr=268480512
1105 pio_latency=100000
1106 system=system
1107 pio=system.iobus.master[11]
1108
1109 [system.realview.uart3_fake]
1110 type=AmbaFake
1111 amba_id=0
1112 clock=1000
1113 ignore_access=false
1114 pio_addr=268484608
1115 pio_latency=100000
1116 system=system
1117 pio=system.iobus.master[12]
1118
1119 [system.realview.watchdog_fake]
1120 type=AmbaFake
1121 amba_id=0
1122 clock=1000
1123 ignore_access=false
1124 pio_addr=268500992
1125 pio_latency=100000
1126 system=system
1127 pio=system.iobus.master[15]
1128
1129 [system.terminal]
1130 type=Terminal
1131 intr_control=system.intrctrl
1132 number=0
1133 output=true
1134 port=3456
1135
1136 [system.vncserver]
1137 type=VncServer
1138 frame_capture=false
1139 number=0
1140 port=5900
1141