tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 eventq_index=0
   5 full_system=true
   6 sim_quantum=0
   7 time_sync_enable=false
   8 time_sync_period=100000000000
   9 time_sync_spin_threshold=100000000
  10
  11 [system]
  12 type=LinuxArmSystem
  13 children=bridge cf0 clk_domain cpu0 cpu1 cpu2 cpu_clk_domain intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
  14 atags_addr=256
  15 boot_loader=/dist/binaries/boot.arm
  16 boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
  17 boot_release_addr=65528
  18 cache_line_size=64
  19 clk_domain=system.clk_domain
  20 dtb_filename=
  21 early_kernel_symbols=false
  22 enable_context_switch_stats_dump=false
  23 eventq_index=0
  24 flags_addr=268435504
  25 gic_cpu_addr=520093952
  26 have_generic_timer=false
  27 have_large_asid_64=false
  28 have_lpae=false
  29 have_security=false
  30 have_virtualization=false
  31 highest_el_is_64=false
  32 init_param=0
  33 kernel=/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
  34 load_addr_mask=268435455
  35 load_offset=0
  36 machine_type=RealView_PBX
  37 mem_mode=atomic
  38 mem_ranges=0:134217727
  39 memories=system.physmem system.realview.nvmem
  40 multi_proc=true
  41 num_work_ids=16
  42 panic_on_oops=true
  43 panic_on_panic=true
  44 phys_addr_range_64=40
  45 readfile=tests/halt.sh
  46 reset_addr_64=0
  47 symbolfile=
  48 work_begin_ckpt_count=0
  49 work_begin_cpu_id_exit=-1
  50 work_begin_exit_count=0
  51 work_cpus_ckpt_count=0
  52 work_end_ckpt_count=0
  53 work_end_exit_count=0
  54 work_item_id=-1
  55 system_port=system.membus.slave[0]
  56
  57 [system.bridge]
  58 type=Bridge
  59 clk_domain=system.clk_domain
  60 delay=50000
  61 eventq_index=0
  62 ranges=268435456:520093695 1073741824:1610612735
  63 req_size=16
  64 resp_size=16
  65 master=system.iobus.slave[0]
  66 slave=system.membus.master[0]
  67
  68 [system.cf0]
  69 type=IdeDisk
  70 children=image
  71 delay=1000000
  72 driveID=master
  73 eventq_index=0
  74 image=system.cf0.image
  75
  76 [system.cf0.image]
  77 type=CowDiskImage
  78 children=child
  79 child=system.cf0.image.child
  80 eventq_index=0
  81 image_file=
  82 read_only=false
  83 table_size=65536
  84
  85 [system.cf0.image.child]
  86 type=RawDiskImage
  87 eventq_index=0
  88 image_file=/dist/disks/linux-arm-ael.img
  89 read_only=true
  90
  91 [system.clk_domain]
  92 type=SrcClockDomain
  93 clock=1000
  94 eventq_index=0
  95 voltage_domain=system.voltage_domain
  96
  97 [system.cpu0]
  98 type=AtomicSimpleCPU
  99 children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb tracer
 100 checker=Null
 101 clk_domain=system.cpu_clk_domain
 102 cpu_id=0
 103 do_checkpoint_insts=true
 104 do_quiesce=true
 105 do_statistics_insts=true
 106 dstage2_mmu=system.cpu0.dstage2_mmu
 107 dtb=system.cpu0.dtb
 108 eventq_index=0
 109 fastmem=false
 110 function_trace=false
 111 function_trace_start=0
 112 interrupts=system.cpu0.interrupts
 113 isa=system.cpu0.isa
 114 istage2_mmu=system.cpu0.istage2_mmu
 115 itb=system.cpu0.itb
 116 max_insts_all_threads=0
 117 max_insts_any_thread=0
 118 max_loads_all_threads=0
 119 max_loads_any_thread=0
 120 numThreads=1
 121 profile=0
 122 progress_interval=0
 123 simpoint_interval=100000000
 124 simpoint_profile=false
 125 simpoint_profile_file=simpoint.bb.gz
 126 simpoint_start_insts=
 127 simulate_data_stalls=false
 128 simulate_inst_stalls=false
 129 switched_out=false
 130 system=system
 131 tracer=system.cpu0.tracer
 132 width=1
 133 workload=
 134 dcache_port=system.cpu0.dcache.cpu_side
 135 icache_port=system.cpu0.icache.cpu_side
 136
 137 [system.cpu0.dcache]
 138 type=BaseCache
 139 children=tags
 140 addr_ranges=0:18446744073709551615
 141 assoc=4
 142 clk_domain=system.cpu_clk_domain
 143 eventq_index=0
 144 forward_snoops=true
 145 hit_latency=2
 146 is_top_level=true
 147 max_miss_count=0
 148 mshrs=4
 149 prefetch_on_access=false
 150 prefetcher=Null
 151 response_latency=2
 152 sequential_access=false
 153 size=32768
 154 system=system
 155 tags=system.cpu0.dcache.tags
 156 tgts_per_mshr=20
 157 two_queue=false
 158 write_buffers=8
 159 cpu_side=system.cpu0.dcache_port
 160 mem_side=system.toL2Bus.slave[1]
 161
 162 [system.cpu0.dcache.tags]
 163 type=LRU
 164 assoc=4
 165 block_size=64
 166 clk_domain=system.cpu_clk_domain
 167 eventq_index=0
 168 hit_latency=2
 169 sequential_access=false
 170 size=32768
 171
 172 [system.cpu0.dstage2_mmu]
 173 type=ArmStage2MMU
 174 children=stage2_tlb
 175 eventq_index=0
 176 stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb
 177 tlb=system.cpu0.dtb
 178
 179 [system.cpu0.dstage2_mmu.stage2_tlb]
 180 type=ArmTLB
 181 children=walker
 182 eventq_index=0
 183 is_stage2=true
 184 size=32
 185 walker=system.cpu0.dstage2_mmu.stage2_tlb.walker
 186
 187 [system.cpu0.dstage2_mmu.stage2_tlb.walker]
 188 type=ArmTableWalker
 189 clk_domain=system.cpu_clk_domain
 190 eventq_index=0
 191 is_stage2=true
 192 num_squash_per_cycle=2
 193 sys=system
 194 port=system.toL2Bus.slave[5]
 195
 196 [system.cpu0.dtb]
 197 type=ArmTLB
 198 children=walker
 199 eventq_index=0
 200 is_stage2=false
 201 size=64
 202 walker=system.cpu0.dtb.walker
 203
 204 [system.cpu0.dtb.walker]
 205 type=ArmTableWalker
 206 clk_domain=system.cpu_clk_domain
 207 eventq_index=0
 208 is_stage2=false
 209 num_squash_per_cycle=2
 210 sys=system
 211 port=system.toL2Bus.slave[3]
 212
 213 [system.cpu0.icache]
 214 type=BaseCache
 215 children=tags
 216 addr_ranges=0:18446744073709551615
 217 assoc=1
 218 clk_domain=system.cpu_clk_domain
 219 eventq_index=0
 220 forward_snoops=true
 221 hit_latency=2
 222 is_top_level=true
 223 max_miss_count=0
 224 mshrs=4
 225 prefetch_on_access=false
 226 prefetcher=Null
 227 response_latency=2
 228 sequential_access=false
 229 size=32768
 230 system=system
 231 tags=system.cpu0.icache.tags
 232 tgts_per_mshr=20
 233 two_queue=false
 234 write_buffers=8
 235 cpu_side=system.cpu0.icache_port
 236 mem_side=system.toL2Bus.slave[0]
 237
 238 [system.cpu0.icache.tags]
 239 type=LRU
 240 assoc=1
 241 block_size=64
 242 clk_domain=system.cpu_clk_domain
 243 eventq_index=0
 244 hit_latency=2
 245 sequential_access=false
 246 size=32768
 247
 248 [system.cpu0.interrupts]
 249 type=ArmInterrupts
 250 eventq_index=0
 251
 252 [system.cpu0.isa]
 253 type=ArmISA
 254 eventq_index=0
 255 fpsid=1090793632
 256 id_aa64afr0_el1=0
 257 id_aa64afr1_el1=0
 258 id_aa64dfr0_el1=1052678
 259 id_aa64dfr1_el1=0
 260 id_aa64isar0_el1=0
 261 id_aa64isar1_el1=0
 262 id_aa64mmfr0_el1=15728642
 263 id_aa64mmfr1_el1=0
 264 id_aa64pfr0_el1=17
 265 id_aa64pfr1_el1=0
 266 id_isar0=34607377
 267 id_isar1=34677009
 268 id_isar2=555950401
 269 id_isar3=17899825
 270 id_isar4=268501314
 271 id_isar5=0
 272 id_mmfr0=270536963
 273 id_mmfr1=0
 274 id_mmfr2=19070976
 275 id_mmfr3=34611729
 276 id_pfr0=49
 277 id_pfr1=4113
 278 midr=1091551472
 279 system=system
 280
 281 [system.cpu0.istage2_mmu]
 282 type=ArmStage2MMU
 283 children=stage2_tlb
 284 eventq_index=0
 285 stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb
 286 tlb=system.cpu0.itb
 287
 288 [system.cpu0.istage2_mmu.stage2_tlb]
 289 type=ArmTLB
 290 children=walker
 291 eventq_index=0
 292 is_stage2=true
 293 size=32
 294 walker=system.cpu0.istage2_mmu.stage2_tlb.walker
 295
 296 [system.cpu0.istage2_mmu.stage2_tlb.walker]
 297 type=ArmTableWalker
 298 clk_domain=system.cpu_clk_domain
 299 eventq_index=0
 300 is_stage2=true
 301 num_squash_per_cycle=2
 302 sys=system
 303 port=system.toL2Bus.slave[4]
 304
 305 [system.cpu0.itb]
 306 type=ArmTLB
 307 children=walker
 308 eventq_index=0
 309 is_stage2=false
 310 size=64
 311 walker=system.cpu0.itb.walker
 312
 313 [system.cpu0.itb.walker]
 314 type=ArmTableWalker
 315 clk_domain=system.cpu_clk_domain
 316 eventq_index=0
 317 is_stage2=false
 318 num_squash_per_cycle=2
 319 sys=system
 320 port=system.toL2Bus.slave[2]
 321
 322 [system.cpu0.tracer]
 323 type=ExeTracer
 324 eventq_index=0
 325
 326 [system.cpu1]
 327 type=TimingSimpleCPU
 328 children=dstage2_mmu dtb isa istage2_mmu itb tracer
 329 checker=Null
 330 clk_domain=system.cpu_clk_domain
 331 cpu_id=0
 332 do_checkpoint_insts=true
 333 do_quiesce=true
 334 do_statistics_insts=true
 335 dstage2_mmu=system.cpu1.dstage2_mmu
 336 dtb=system.cpu1.dtb
 337 eventq_index=0
 338 function_trace=false
 339 function_trace_start=0
 340 interrupts=Null
 341 isa=system.cpu1.isa
 342 istage2_mmu=system.cpu1.istage2_mmu
 343 itb=system.cpu1.itb
 344 max_insts_all_threads=0
 345 max_insts_any_thread=0
 346 max_loads_all_threads=0
 347 max_loads_any_thread=0
 348 numThreads=1
 349 profile=0
 350 progress_interval=0
 351 simpoint_start_insts=
 352 switched_out=true
 353 system=system
 354 tracer=system.cpu1.tracer
 355 workload=
 356
 357 [system.cpu1.dstage2_mmu]
 358 type=ArmStage2MMU
 359 children=stage2_tlb
 360 eventq_index=0
 361 stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb
 362 tlb=system.cpu1.dtb
 363
 364 [system.cpu1.dstage2_mmu.stage2_tlb]
 365 type=ArmTLB
 366 children=walker
 367 eventq_index=0
 368 is_stage2=true
 369 size=32
 370 walker=system.cpu1.dstage2_mmu.stage2_tlb.walker
 371
 372 [system.cpu1.dstage2_mmu.stage2_tlb.walker]
 373 type=ArmTableWalker
 374 clk_domain=system.cpu_clk_domain
 375 eventq_index=0
 376 is_stage2=true
 377 num_squash_per_cycle=2
 378 sys=system
 379
 380 [system.cpu1.dtb]
 381 type=ArmTLB
 382 children=walker
 383 eventq_index=0
 384 is_stage2=false
 385 size=64
 386 walker=system.cpu1.dtb.walker
 387
 388 [system.cpu1.dtb.walker]
 389 type=ArmTableWalker
 390 clk_domain=system.cpu_clk_domain
 391 eventq_index=0
 392 is_stage2=false
 393 num_squash_per_cycle=2
 394 sys=system
 395
 396 [system.cpu1.isa]
 397 type=ArmISA
 398 eventq_index=0
 399 fpsid=1090793632
 400 id_aa64afr0_el1=0
 401 id_aa64afr1_el1=0
 402 id_aa64dfr0_el1=1052678
 403 id_aa64dfr1_el1=0
 404 id_aa64isar0_el1=0
 405 id_aa64isar1_el1=0
 406 id_aa64mmfr0_el1=15728642
 407 id_aa64mmfr1_el1=0
 408 id_aa64pfr0_el1=17
 409 id_aa64pfr1_el1=0
 410 id_isar0=34607377
 411 id_isar1=34677009
 412 id_isar2=555950401
 413 id_isar3=17899825
 414 id_isar4=268501314
 415 id_isar5=0
 416 id_mmfr0=270536963
 417 id_mmfr1=0
 418 id_mmfr2=19070976
 419 id_mmfr3=34611729
 420 id_pfr0=49
 421 id_pfr1=4113
 422 midr=1091551472
 423 system=system
 424
 425 [system.cpu1.istage2_mmu]
 426 type=ArmStage2MMU
 427 children=stage2_tlb
 428 eventq_index=0
 429 stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
 430 tlb=system.cpu1.itb
 431
 432 [system.cpu1.istage2_mmu.stage2_tlb]
 433 type=ArmTLB
 434 children=walker
 435 eventq_index=0
 436 is_stage2=true
 437 size=32
 438 walker=system.cpu1.istage2_mmu.stage2_tlb.walker
 439
 440 [system.cpu1.istage2_mmu.stage2_tlb.walker]
 441 type=ArmTableWalker
 442 clk_domain=system.cpu_clk_domain
 443 eventq_index=0
 444 is_stage2=true
 445 num_squash_per_cycle=2
 446 sys=system
 447
 448 [system.cpu1.itb]
 449 type=ArmTLB
 450 children=walker
 451 eventq_index=0
 452 is_stage2=false
 453 size=64
 454 walker=system.cpu1.itb.walker
 455
 456 [system.cpu1.itb.walker]
 457 type=ArmTableWalker
 458 clk_domain=system.cpu_clk_domain
 459 eventq_index=0
 460 is_stage2=false
 461 num_squash_per_cycle=2
 462 sys=system
 463
 464 [system.cpu1.tracer]
 465 type=ExeTracer
 466 eventq_index=0
 467
 468 [system.cpu2]
 469 type=DerivO3CPU
 470 children=branchPred dstage2_mmu dtb fuPool isa istage2_mmu itb tracer
 471 LFSTSize=1024
 472 LQEntries=32
 473 LSQCheckLoads=true
 474 LSQDepCheckShift=4
 475 SQEntries=32
 476 SSITSize=1024
 477 activity=0
 478 backComSize=5
 479 branchPred=system.cpu2.branchPred
 480 cachePorts=200
 481 checker=Null
 482 clk_domain=system.cpu_clk_domain
 483 commitToDecodeDelay=1
 484 commitToFetchDelay=1
 485 commitToIEWDelay=1
 486 commitToRenameDelay=1
 487 commitWidth=8
 488 cpu_id=0
 489 decodeToFetchDelay=1
 490 decodeToRenameDelay=1
 491 decodeWidth=8
 492 dispatchWidth=8
 493 do_checkpoint_insts=true
 494 do_quiesce=true
 495 do_statistics_insts=true
 496 dstage2_mmu=system.cpu2.dstage2_mmu
 497 dtb=system.cpu2.dtb
 498 eventq_index=0
 499 fetchBufferSize=64
 500 fetchToDecodeDelay=1
 501 fetchTrapLatency=1
 502 fetchWidth=8
 503 forwardComSize=5
 504 fuPool=system.cpu2.fuPool
 505 function_trace=false
 506 function_trace_start=0
 507 iewToCommitDelay=1
 508 iewToDecodeDelay=1
 509 iewToFetchDelay=1
 510 iewToRenameDelay=1
 511 interrupts=Null
 512 isa=system.cpu2.isa
 513 issueToExecuteDelay=1
 514 issueWidth=8
 515 istage2_mmu=system.cpu2.istage2_mmu
 516 itb=system.cpu2.itb
 517 max_insts_all_threads=0
 518 max_insts_any_thread=0
 519 max_loads_all_threads=0
 520 max_loads_any_thread=0
 521 needsTSO=false
 522 numIQEntries=64
 523 numPhysCCRegs=0
 524 numPhysFloatRegs=256
 525 numPhysIntRegs=256
 526 numROBEntries=192
 527 numRobs=1
 528 numThreads=1
 529 profile=0
 530 progress_interval=0
 531 renameToDecodeDelay=1
 532 renameToFetchDelay=1
 533 renameToIEWDelay=2
 534 renameToROBDelay=1
 535 renameWidth=8
 536 simpoint_start_insts=
 537 smtCommitPolicy=RoundRobin
 538 smtFetchPolicy=SingleThread
 539 smtIQPolicy=Partitioned
 540 smtIQThreshold=100
 541 smtLSQPolicy=Partitioned
 542 smtLSQThreshold=100
 543 smtNumFetchingThreads=1
 544 smtROBPolicy=Partitioned
 545 smtROBThreshold=100
 546 squashWidth=8
 547 store_set_clear_period=250000
 548 switched_out=true
 549 system=system
 550 tracer=system.cpu2.tracer
 551 trapLatency=13
 552 wbDepth=1
 553 wbWidth=8
 554 workload=
 555
 556 [system.cpu2.branchPred]
 557 type=BranchPredictor
 558 BTBEntries=4096
 559 BTBTagSize=16
 560 RASSize=16
 561 choiceCtrBits=2
 562 choicePredictorSize=8192
 563 eventq_index=0
 564 globalCtrBits=2
 565 globalPredictorSize=8192
 566 instShiftAmt=2
 567 localCtrBits=2
 568 localHistoryTableSize=2048
 569 localPredictorSize=2048
 570 numThreads=1
 571 predType=tournament
 572
 573 [system.cpu2.dstage2_mmu]
 574 type=ArmStage2MMU
 575 children=stage2_tlb
 576 eventq_index=0
 577 stage2_tlb=system.cpu2.dstage2_mmu.stage2_tlb
 578 tlb=system.cpu2.dtb
 579
 580 [system.cpu2.dstage2_mmu.stage2_tlb]
 581 type=ArmTLB
 582 children=walker
 583 eventq_index=0
 584 is_stage2=true
 585 size=32
 586 walker=system.cpu2.dstage2_mmu.stage2_tlb.walker
 587
 588 [system.cpu2.dstage2_mmu.stage2_tlb.walker]
 589 type=ArmTableWalker
 590 clk_domain=system.cpu_clk_domain
 591 eventq_index=0
 592 is_stage2=true
 593 num_squash_per_cycle=2
 594 sys=system
 595
 596 [system.cpu2.dtb]
 597 type=ArmTLB
 598 children=walker
 599 eventq_index=0
 600 is_stage2=false
 601 size=64
 602 walker=system.cpu2.dtb.walker
 603
 604 [system.cpu2.dtb.walker]
 605 type=ArmTableWalker
 606 clk_domain=system.cpu_clk_domain
 607 eventq_index=0
 608 is_stage2=false
 609 num_squash_per_cycle=2
 610 sys=system
 611
 612 [system.cpu2.fuPool]
 613 type=FUPool
 614 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
 615 FUList=system.cpu2.fuPool.FUList0 system.cpu2.fuPool.FUList1 system.cpu2.fuPool.FUList2 system.cpu2.fuPool.FUList3 system.cpu2.fuPool.FUList4 system.cpu2.fuPool.FUList5 system.cpu2.fuPool.FUList6 system.cpu2.fuPool.FUList7 system.cpu2.fuPool.FUList8
 616 eventq_index=0
 617
 618 [system.cpu2.fuPool.FUList0]
 619 type=FUDesc
 620 children=opList
 621 count=6
 622 eventq_index=0
 623 opList=system.cpu2.fuPool.FUList0.opList
 624
 625 [system.cpu2.fuPool.FUList0.opList]
 626 type=OpDesc
 627 eventq_index=0
 628 issueLat=1
 629 opClass=IntAlu
 630 opLat=1
 631
 632 [system.cpu2.fuPool.FUList1]
 633 type=FUDesc
 634 children=opList0 opList1
 635 count=2
 636 eventq_index=0
 637 opList=system.cpu2.fuPool.FUList1.opList0 system.cpu2.fuPool.FUList1.opList1
 638
 639 [system.cpu2.fuPool.FUList1.opList0]
 640 type=OpDesc
 641 eventq_index=0
 642 issueLat=1
 643 opClass=IntMult
 644 opLat=3
 645
 646 [system.cpu2.fuPool.FUList1.opList1]
 647 type=OpDesc
 648 eventq_index=0
 649 issueLat=19
 650 opClass=IntDiv
 651 opLat=20
 652
 653 [system.cpu2.fuPool.FUList2]
 654 type=FUDesc
 655 children=opList0 opList1 opList2
 656 count=4
 657 eventq_index=0
 658 opList=system.cpu2.fuPool.FUList2.opList0 system.cpu2.fuPool.FUList2.opList1 system.cpu2.fuPool.FUList2.opList2
 659
 660 [system.cpu2.fuPool.FUList2.opList0]
 661 type=OpDesc
 662 eventq_index=0
 663 issueLat=1
 664 opClass=FloatAdd
 665 opLat=2
 666
 667 [system.cpu2.fuPool.FUList2.opList1]
 668 type=OpDesc
 669 eventq_index=0
 670 issueLat=1
 671 opClass=FloatCmp
 672 opLat=2
 673
 674 [system.cpu2.fuPool.FUList2.opList2]
 675 type=OpDesc
 676 eventq_index=0
 677 issueLat=1
 678 opClass=FloatCvt
 679 opLat=2
 680
 681 [system.cpu2.fuPool.FUList3]
 682 type=FUDesc
 683 children=opList0 opList1 opList2
 684 count=2
 685 eventq_index=0
 686 opList=system.cpu2.fuPool.FUList3.opList0 system.cpu2.fuPool.FUList3.opList1 system.cpu2.fuPool.FUList3.opList2
 687
 688 [system.cpu2.fuPool.FUList3.opList0]
 689 type=OpDesc
 690 eventq_index=0
 691 issueLat=1
 692 opClass=FloatMult
 693 opLat=4
 694
 695 [system.cpu2.fuPool.FUList3.opList1]
 696 type=OpDesc
 697 eventq_index=0
 698 issueLat=12
 699 opClass=FloatDiv
 700 opLat=12
 701
 702 [system.cpu2.fuPool.FUList3.opList2]
 703 type=OpDesc
 704 eventq_index=0
 705 issueLat=24
 706 opClass=FloatSqrt
 707 opLat=24
 708
 709 [system.cpu2.fuPool.FUList4]
 710 type=FUDesc
 711 children=opList
 712 count=0
 713 eventq_index=0
 714 opList=system.cpu2.fuPool.FUList4.opList
 715
 716 [system.cpu2.fuPool.FUList4.opList]
 717 type=OpDesc
 718 eventq_index=0
 719 issueLat=1
 720 opClass=MemRead
 721 opLat=1
 722
 723 [system.cpu2.fuPool.FUList5]
 724 type=FUDesc
 725 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
 726 count=4
 727 eventq_index=0
 728 opList=system.cpu2.fuPool.FUList5.opList00 system.cpu2.fuPool.FUList5.opList01 system.cpu2.fuPool.FUList5.opList02 system.cpu2.fuPool.FUList5.opList03 system.cpu2.fuPool.FUList5.opList04 system.cpu2.fuPool.FUList5.opList05 system.cpu2.fuPool.FUList5.opList06 system.cpu2.fuPool.FUList5.opList07 system.cpu2.fuPool.FUList5.opList08 system.cpu2.fuPool.FUList5.opList09 system.cpu2.fuPool.FUList5.opList10 system.cpu2.fuPool.FUList5.opList11 system.cpu2.fuPool.FUList5.opList12 system.cpu2.fuPool.FUList5.opList13 system.cpu2.fuPool.FUList5.opList14 system.cpu2.fuPool.FUList5.opList15 system.cpu2.fuPool.FUList5.opList16 system.cpu2.fuPool.FUList5.opList17 system.cpu2.fuPool.FUList5.opList18 system.cpu2.fuPool.FUList5.opList19
 729
 730 [system.cpu2.fuPool.FUList5.opList00]
 731 type=OpDesc
 732 eventq_index=0
 733 issueLat=1
 734 opClass=SimdAdd
 735 opLat=1
 736
 737 [system.cpu2.fuPool.FUList5.opList01]
 738 type=OpDesc
 739 eventq_index=0
 740 issueLat=1
 741 opClass=SimdAddAcc
 742 opLat=1
 743
 744 [system.cpu2.fuPool.FUList5.opList02]
 745 type=OpDesc
 746 eventq_index=0
 747 issueLat=1
 748 opClass=SimdAlu
 749 opLat=1
 750
 751 [system.cpu2.fuPool.FUList5.opList03]
 752 type=OpDesc
 753 eventq_index=0
 754 issueLat=1
 755 opClass=SimdCmp
 756 opLat=1
 757
 758 [system.cpu2.fuPool.FUList5.opList04]
 759 type=OpDesc
 760 eventq_index=0
 761 issueLat=1
 762 opClass=SimdCvt
 763 opLat=1
 764
 765 [system.cpu2.fuPool.FUList5.opList05]
 766 type=OpDesc
 767 eventq_index=0
 768 issueLat=1
 769 opClass=SimdMisc
 770 opLat=1
 771
 772 [system.cpu2.fuPool.FUList5.opList06]
 773 type=OpDesc
 774 eventq_index=0
 775 issueLat=1
 776 opClass=SimdMult
 777 opLat=1
 778
 779 [system.cpu2.fuPool.FUList5.opList07]
 780 type=OpDesc
 781 eventq_index=0
 782 issueLat=1
 783 opClass=SimdMultAcc
 784 opLat=1
 785
 786 [system.cpu2.fuPool.FUList5.opList08]
 787 type=OpDesc
 788 eventq_index=0
 789 issueLat=1
 790 opClass=SimdShift
 791 opLat=1
 792
 793 [system.cpu2.fuPool.FUList5.opList09]
 794 type=OpDesc
 795 eventq_index=0
 796 issueLat=1
 797 opClass=SimdShiftAcc
 798 opLat=1
 799
 800 [system.cpu2.fuPool.FUList5.opList10]
 801 type=OpDesc
 802 eventq_index=0
 803 issueLat=1
 804 opClass=SimdSqrt
 805 opLat=1
 806
 807 [system.cpu2.fuPool.FUList5.opList11]
 808 type=OpDesc
 809 eventq_index=0
 810 issueLat=1
 811 opClass=SimdFloatAdd
 812 opLat=1
 813
 814 [system.cpu2.fuPool.FUList5.opList12]
 815 type=OpDesc
 816 eventq_index=0
 817 issueLat=1
 818 opClass=SimdFloatAlu
 819 opLat=1
 820
 821 [system.cpu2.fuPool.FUList5.opList13]
 822 type=OpDesc
 823 eventq_index=0
 824 issueLat=1
 825 opClass=SimdFloatCmp
 826 opLat=1
 827
 828 [system.cpu2.fuPool.FUList5.opList14]
 829 type=OpDesc
 830 eventq_index=0
 831 issueLat=1
 832 opClass=SimdFloatCvt
 833 opLat=1
 834
 835 [system.cpu2.fuPool.FUList5.opList15]
 836 type=OpDesc
 837 eventq_index=0
 838 issueLat=1
 839 opClass=SimdFloatDiv
 840 opLat=1
 841
 842 [system.cpu2.fuPool.FUList5.opList16]
 843 type=OpDesc
 844 eventq_index=0
 845 issueLat=1
 846 opClass=SimdFloatMisc
 847 opLat=1
 848
 849 [system.cpu2.fuPool.FUList5.opList17]
 850 type=OpDesc
 851 eventq_index=0
 852 issueLat=1
 853 opClass=SimdFloatMult
 854 opLat=1
 855
 856 [system.cpu2.fuPool.FUList5.opList18]
 857 type=OpDesc
 858 eventq_index=0
 859 issueLat=1
 860 opClass=SimdFloatMultAcc
 861 opLat=1
 862
 863 [system.cpu2.fuPool.FUList5.opList19]
 864 type=OpDesc
 865 eventq_index=0
 866 issueLat=1
 867 opClass=SimdFloatSqrt
 868 opLat=1
 869
 870 [system.cpu2.fuPool.FUList6]
 871 type=FUDesc
 872 children=opList
 873 count=0
 874 eventq_index=0
 875 opList=system.cpu2.fuPool.FUList6.opList
 876
 877 [system.cpu2.fuPool.FUList6.opList]
 878 type=OpDesc
 879 eventq_index=0
 880 issueLat=1
 881 opClass=MemWrite
 882 opLat=1
 883
 884 [system.cpu2.fuPool.FUList7]
 885 type=FUDesc
 886 children=opList0 opList1
 887 count=4
 888 eventq_index=0
 889 opList=system.cpu2.fuPool.FUList7.opList0 system.cpu2.fuPool.FUList7.opList1
 890
 891 [system.cpu2.fuPool.FUList7.opList0]
 892 type=OpDesc
 893 eventq_index=0
 894 issueLat=1
 895 opClass=MemRead
 896 opLat=1
 897
 898 [system.cpu2.fuPool.FUList7.opList1]
 899 type=OpDesc
 900 eventq_index=0
 901 issueLat=1
 902 opClass=MemWrite
 903 opLat=1
 904
 905 [system.cpu2.fuPool.FUList8]
 906 type=FUDesc
 907 children=opList
 908 count=1
 909 eventq_index=0
 910 opList=system.cpu2.fuPool.FUList8.opList
 911
 912 [system.cpu2.fuPool.FUList8.opList]
 913 type=OpDesc
 914 eventq_index=0
 915 issueLat=3
 916 opClass=IprAccess
 917 opLat=3
 918
 919 [system.cpu2.isa]
 920 type=ArmISA
 921 eventq_index=0
 922 fpsid=1090793632
 923 id_aa64afr0_el1=0
 924 id_aa64afr1_el1=0
 925 id_aa64dfr0_el1=1052678
 926 id_aa64dfr1_el1=0
 927 id_aa64isar0_el1=0
 928 id_aa64isar1_el1=0
 929 id_aa64mmfr0_el1=15728642
 930 id_aa64mmfr1_el1=0
 931 id_aa64pfr0_el1=17
 932 id_aa64pfr1_el1=0
 933 id_isar0=34607377
 934 id_isar1=34677009
 935 id_isar2=555950401
 936 id_isar3=17899825
 937 id_isar4=268501314
 938 id_isar5=0
 939 id_mmfr0=270536963
 940 id_mmfr1=0
 941 id_mmfr2=19070976
 942 id_mmfr3=34611729
 943 id_pfr0=49
 944 id_pfr1=4113
 945 midr=1091551472
 946 system=system
 947
 948 [system.cpu2.istage2_mmu]
 949 type=ArmStage2MMU
 950 children=stage2_tlb
 951 eventq_index=0
 952 stage2_tlb=system.cpu2.istage2_mmu.stage2_tlb
 953 tlb=system.cpu2.itb
 954
 955 [system.cpu2.istage2_mmu.stage2_tlb]
 956 type=ArmTLB
 957 children=walker
 958 eventq_index=0
 959 is_stage2=true
 960 size=32
 961 walker=system.cpu2.istage2_mmu.stage2_tlb.walker
 962
 963 [system.cpu2.istage2_mmu.stage2_tlb.walker]
 964 type=ArmTableWalker
 965 clk_domain=system.cpu_clk_domain
 966 eventq_index=0
 967 is_stage2=true
 968 num_squash_per_cycle=2
 969 sys=system
 970
 971 [system.cpu2.itb]
 972 type=ArmTLB
 973 children=walker
 974 eventq_index=0
 975 is_stage2=false
 976 size=64
 977 walker=system.cpu2.itb.walker
 978
 979 [system.cpu2.itb.walker]
 980 type=ArmTableWalker
 981 clk_domain=system.cpu_clk_domain
 982 eventq_index=0
 983 is_stage2=false
 984 num_squash_per_cycle=2
 985 sys=system
 986
 987 [system.cpu2.tracer]
 988 type=ExeTracer
 989 eventq_index=0
 990
 991 [system.cpu_clk_domain]
 992 type=SrcClockDomain
 993 clock=500
 994 eventq_index=0
 995 voltage_domain=system.voltage_domain
 996
 997 [system.intrctrl]
 998 type=IntrControl
 999 eventq_index=0
1000 sys=system
1001
1002 [system.iobus]
1003 type=NoncoherentBus
1004 clk_domain=system.clk_domain
1005 eventq_index=0
1006 header_cycles=1
1007 use_default_range=false
1008 width=8
1009 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side
1010 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma
1011
1012 [system.iocache]
1013 type=BaseCache
1014 children=tags
1015 addr_ranges=0:134217727
1016 assoc=8
1017 clk_domain=system.clk_domain
1018 eventq_index=0
1019 forward_snoops=false
1020 hit_latency=50
1021 is_top_level=true
1022 max_miss_count=0
1023 mshrs=20
1024 prefetch_on_access=false
1025 prefetcher=Null
1026 response_latency=50
1027 sequential_access=false
1028 size=1024
1029 system=system
1030 tags=system.iocache.tags
1031 tgts_per_mshr=12
1032 two_queue=false
1033 write_buffers=8
1034 cpu_side=system.iobus.master[25]
1035 mem_side=system.membus.slave[2]
1036
1037 [system.iocache.tags]
1038 type=LRU
1039 assoc=8
1040 block_size=64
1041 clk_domain=system.clk_domain
1042 eventq_index=0
1043 hit_latency=50
1044 sequential_access=false
1045 size=1024
1046
1047 [system.l2c]
1048 type=BaseCache
1049 children=tags
1050 addr_ranges=0:18446744073709551615
1051 assoc=8
1052 clk_domain=system.cpu_clk_domain
1053 eventq_index=0
1054 forward_snoops=true
1055 hit_latency=20
1056 is_top_level=false
1057 max_miss_count=0
1058 mshrs=20
1059 prefetch_on_access=false
1060 prefetcher=Null
1061 response_latency=20
1062 sequential_access=false
1063 size=4194304
1064 system=system
1065 tags=system.l2c.tags
1066 tgts_per_mshr=12
1067 two_queue=false
1068 write_buffers=8
1069 cpu_side=system.toL2Bus.master[0]
1070 mem_side=system.membus.slave[1]
1071
1072 [system.l2c.tags]
1073 type=LRU
1074 assoc=8
1075 block_size=64
1076 clk_domain=system.cpu_clk_domain
1077 eventq_index=0
1078 hit_latency=20
1079 sequential_access=false
1080 size=4194304
1081
1082 [system.membus]
1083 type=CoherentBus
1084 children=badaddr_responder
1085 clk_domain=system.clk_domain
1086 eventq_index=0
1087 header_cycles=1
1088 system=system
1089 use_default_range=false
1090 width=8
1091 default=system.membus.badaddr_responder.pio
1092 master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port
1093 slave=system.system_port system.l2c.mem_side system.iocache.mem_side
1094
1095 [system.membus.badaddr_responder]
1096 type=IsaFake
1097 clk_domain=system.clk_domain
1098 eventq_index=0
1099 fake_mem=false
1100 pio_addr=0
1101 pio_latency=100000
1102 pio_size=8
1103 ret_bad_addr=true
1104 ret_data16=65535
1105 ret_data32=4294967295
1106 ret_data64=18446744073709551615
1107 ret_data8=255
1108 system=system
1109 update_data=false
1110 warn_access=warn
1111 pio=system.membus.default
1112
1113 [system.physmem]
1114 type=SimpleDRAM
1115 activation_limit=4
1116 addr_mapping=RaBaChCo
1117 banks_per_rank=8
1118 burst_length=8
1119 channels=1
1120 clk_domain=system.clk_domain
1121 conf_table_reported=true
1122 device_bus_width=8
1123 device_rowbuffer_size=1024
1124 devices_per_rank=8
1125 eventq_index=0
1126 in_addr_map=true
1127 mem_sched_policy=frfcfs
1128 null=false
1129 page_policy=open
1130 range=0:134217727
1131 ranks_per_channel=2
1132 read_buffer_size=32
1133 static_backend_latency=10000
1134 static_frontend_latency=10000
1135 tBURST=5000
1136 tCL=13750
1137 tRAS=35000
1138 tRCD=13750
1139 tREFI=7800000
1140 tRFC=300000
1141 tRP=13750
1142 tRRD=6250
1143 tWTR=7500
1144 tXAW=40000
1145 write_buffer_size=32
1146 write_high_thresh_perc=70
1147 write_low_thresh_perc=0
1148 port=system.membus.master[6]
1149
1150 [system.realview]
1151 type=RealView
1152 children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
1153 eventq_index=0
1154 intrctrl=system.intrctrl
1155 max_mem_size=268435456
1156 mem_start_addr=0
1157 pci_cfg_base=0
1158 system=system
1159
1160 [system.realview.a9scu]
1161 type=A9SCU
1162 clk_domain=system.clk_domain
1163 eventq_index=0
1164 pio_addr=520093696
1165 pio_latency=100000
1166 system=system
1167 pio=system.membus.master[4]
1168
1169 [system.realview.aaci_fake]
1170 type=AmbaFake
1171 amba_id=0
1172 clk_domain=system.clk_domain
1173 eventq_index=0
1174 ignore_access=false
1175 pio_addr=268451840
1176 pio_latency=100000
1177 system=system
1178 pio=system.iobus.master[21]
1179
1180 [system.realview.cf_ctrl]
1181 type=IdeController
1182 BAR0=402653184
1183 BAR0LegacyIO=true
1184 BAR0Size=16
1185 BAR1=402653440
1186 BAR1LegacyIO=true
1187 BAR1Size=1
1188 BAR2=1
1189 BAR2LegacyIO=false
1190 BAR2Size=8
1191 BAR3=1
1192 BAR3LegacyIO=false
1193 BAR3Size=4
1194 BAR4=1
1195 BAR4LegacyIO=false
1196 BAR4Size=16
1197 BAR5=1
1198 BAR5LegacyIO=false
1199 BAR5Size=0
1200 BIST=0
1201 CacheLineSize=0
1202 CapabilityPtr=0
1203 CardbusCIS=0
1204 ClassCode=1
1205 Command=1
1206 DeviceID=28945
1207 ExpansionROM=0
1208 HeaderType=0
1209 InterruptLine=31
1210 InterruptPin=1
1211 LatencyTimer=0
1212 MSICAPBaseOffset=0
1213 MSICAPCapId=0
1214 MSICAPMaskBits=0
1215 MSICAPMsgAddr=0
1216 MSICAPMsgCtrl=0
1217 MSICAPMsgData=0
1218 MSICAPMsgUpperAddr=0
1219 MSICAPNextCapability=0
1220 MSICAPPendingBits=0
1221 MSIXCAPBaseOffset=0
1222 MSIXCAPCapId=0
1223 MSIXCAPNextCapability=0
1224 MSIXMsgCtrl=0
1225 MSIXPbaOffset=0
1226 MSIXTableOffset=0
1227 MaximumLatency=0
1228 MinimumGrant=0
1229 PMCAPBaseOffset=0
1230 PMCAPCapId=0
1231 PMCAPCapabilities=0
1232 PMCAPCtrlStatus=0
1233 PMCAPNextCapability=0
1234 PXCAPBaseOffset=0
1235 PXCAPCapId=0
1236 PXCAPCapabilities=0
1237 PXCAPDevCap2=0
1238 PXCAPDevCapabilities=0
1239 PXCAPDevCtrl=0
1240 PXCAPDevCtrl2=0
1241 PXCAPDevStatus=0
1242 PXCAPLinkCap=0
1243 PXCAPLinkCtrl=0
1244 PXCAPLinkStatus=0
1245 PXCAPNextCapability=0
1246 ProgIF=133
1247 Revision=0
1248 Status=640
1249 SubClassCode=1
1250 SubsystemID=0
1251 SubsystemVendorID=0
1252 VendorID=32902
1253 clk_domain=system.clk_domain
1254 config_latency=20000
1255 ctrl_offset=2
1256 disks=system.cf0
1257 eventq_index=0
1258 io_shift=1
1259 pci_bus=2
1260 pci_dev=7
1261 pci_func=0
1262 pio_latency=30000
1263 platform=system.realview
1264 system=system
1265 config=system.iobus.master[8]
1266 dma=system.iobus.slave[2]
1267 pio=system.iobus.master[7]
1268
1269 [system.realview.clcd]
1270 type=Pl111
1271 amba_id=1315089
1272 clk_domain=system.clk_domain
1273 enable_capture=true
1274 eventq_index=0
1275 gic=system.realview.gic
1276 int_num=55
1277 pio_addr=268566528
1278 pio_latency=10000
1279 pixel_clock=41667
1280 system=system
1281 vnc=system.vncserver
1282 dma=system.iobus.slave[1]
1283 pio=system.iobus.master[4]
1284
1285 [system.realview.dmac_fake]
1286 type=AmbaFake
1287 amba_id=0
1288 clk_domain=system.clk_domain
1289 eventq_index=0
1290 ignore_access=false
1291 pio_addr=268632064
1292 pio_latency=100000
1293 system=system
1294 pio=system.iobus.master[9]
1295
1296 [system.realview.flash_fake]
1297 type=IsaFake
1298 clk_domain=system.clk_domain
1299 eventq_index=0
1300 fake_mem=true
1301 pio_addr=1073741824
1302 pio_latency=100000
1303 pio_size=536870912
1304 ret_bad_addr=false
1305 ret_data16=65535
1306 ret_data32=4294967295
1307 ret_data64=18446744073709551615
1308 ret_data8=255
1309 system=system
1310 update_data=false
1311 warn_access=
1312 pio=system.iobus.master[24]
1313
1314 [system.realview.gic]
1315 type=Pl390
1316 clk_domain=system.clk_domain
1317 cpu_addr=520093952
1318 cpu_pio_delay=10000
1319 dist_addr=520097792
1320 dist_pio_delay=10000
1321 eventq_index=0
1322 int_latency=10000
1323 it_lines=128
1324 msix_addr=0
1325 platform=system.realview
1326 system=system
1327 pio=system.membus.master[2]
1328
1329 [system.realview.gpio0_fake]
1330 type=AmbaFake
1331 amba_id=0
1332 clk_domain=system.clk_domain
1333 eventq_index=0
1334 ignore_access=false
1335 pio_addr=268513280
1336 pio_latency=100000
1337 system=system
1338 pio=system.iobus.master[16]
1339
1340 [system.realview.gpio1_fake]
1341 type=AmbaFake
1342 amba_id=0
1343 clk_domain=system.clk_domain
1344 eventq_index=0
1345 ignore_access=false
1346 pio_addr=268517376
1347 pio_latency=100000
1348 system=system
1349 pio=system.iobus.master[17]
1350
1351 [system.realview.gpio2_fake]
1352 type=AmbaFake
1353 amba_id=0
1354 clk_domain=system.clk_domain
1355 eventq_index=0
1356 ignore_access=false
1357 pio_addr=268521472
1358 pio_latency=100000
1359 system=system
1360 pio=system.iobus.master[18]
1361
1362 [system.realview.kmi0]
1363 type=Pl050
1364 amba_id=1314896
1365 clk_domain=system.clk_domain
1366 eventq_index=0
1367 gic=system.realview.gic
1368 int_delay=1000000
1369 int_num=52
1370 is_mouse=false
1371 pio_addr=268460032
1372 pio_latency=100000
1373 system=system
1374 vnc=system.vncserver
1375 pio=system.iobus.master[5]
1376
1377 [system.realview.kmi1]
1378 type=Pl050
1379 amba_id=1314896
1380 clk_domain=system.clk_domain
1381 eventq_index=0
1382 gic=system.realview.gic
1383 int_delay=1000000
1384 int_num=53
1385 is_mouse=true
1386 pio_addr=268464128
1387 pio_latency=100000
1388 system=system
1389 vnc=system.vncserver
1390 pio=system.iobus.master[6]
1391
1392 [system.realview.l2x0_fake]
1393 type=IsaFake
1394 clk_domain=system.clk_domain
1395 eventq_index=0
1396 fake_mem=false
1397 pio_addr=520101888
1398 pio_latency=100000
1399 pio_size=4095
1400 ret_bad_addr=false
1401 ret_data16=65535
1402 ret_data32=4294967295
1403 ret_data64=18446744073709551615
1404 ret_data8=255
1405 system=system
1406 update_data=false
1407 warn_access=
1408 pio=system.membus.master[3]
1409
1410 [system.realview.local_cpu_timer]
1411 type=CpuLocalTimer
1412 clk_domain=system.clk_domain
1413 eventq_index=0
1414 gic=system.realview.gic
1415 int_num_timer=29
1416 int_num_watchdog=30
1417 pio_addr=520095232
1418 pio_latency=100000
1419 system=system
1420 pio=system.membus.master[5]
1421
1422 [system.realview.mmc_fake]
1423 type=AmbaFake
1424 amba_id=0
1425 clk_domain=system.clk_domain
1426 eventq_index=0
1427 ignore_access=false
1428 pio_addr=268455936
1429 pio_latency=100000
1430 system=system
1431 pio=system.iobus.master[22]
1432
1433 [system.realview.nvmem]
1434 type=SimpleMemory
1435 bandwidth=73.000000
1436 clk_domain=system.clk_domain
1437 conf_table_reported=false
1438 eventq_index=0
1439 in_addr_map=true
1440 latency=30000
1441 latency_var=0
1442 null=false
1443 range=2147483648:2214592511
1444 port=system.membus.master[1]
1445
1446 [system.realview.realview_io]
1447 type=RealViewCtrl
1448 clk_domain=system.clk_domain
1449 eventq_index=0
1450 idreg=0
1451 pio_addr=268435456
1452 pio_latency=100000
1453 proc_id0=201326592
1454 proc_id1=201327138
1455 system=system
1456 pio=system.iobus.master[1]
1457
1458 [system.realview.rtc]
1459 type=PL031
1460 amba_id=3412017
1461 clk_domain=system.clk_domain
1462 eventq_index=0
1463 gic=system.realview.gic
1464 int_delay=100000
1465 int_num=42
1466 pio_addr=268529664
1467 pio_latency=100000
1468 system=system
1469 time=Thu Jan  1 00:00:00 2009
1470 pio=system.iobus.master[23]
1471
1472 [system.realview.sci_fake]
1473 type=AmbaFake
1474 amba_id=0
1475 clk_domain=system.clk_domain
1476 eventq_index=0
1477 ignore_access=false
1478 pio_addr=268492800
1479 pio_latency=100000
1480 system=system
1481 pio=system.iobus.master[20]
1482
1483 [system.realview.smc_fake]
1484 type=AmbaFake
1485 amba_id=0
1486 clk_domain=system.clk_domain
1487 eventq_index=0
1488 ignore_access=false
1489 pio_addr=269357056
1490 pio_latency=100000
1491 system=system
1492 pio=system.iobus.master[13]
1493
1494 [system.realview.sp810_fake]
1495 type=AmbaFake
1496 amba_id=0
1497 clk_domain=system.clk_domain
1498 eventq_index=0
1499 ignore_access=true
1500 pio_addr=268439552
1501 pio_latency=100000
1502 system=system
1503 pio=system.iobus.master[14]
1504
1505 [system.realview.ssp_fake]
1506 type=AmbaFake
1507 amba_id=0
1508 clk_domain=system.clk_domain
1509 eventq_index=0
1510 ignore_access=false
1511 pio_addr=268488704
1512 pio_latency=100000
1513 system=system
1514 pio=system.iobus.master[19]
1515
1516 [system.realview.timer0]
1517 type=Sp804
1518 amba_id=1316868
1519 clk_domain=system.clk_domain
1520 clock0=1000000
1521 clock1=1000000
1522 eventq_index=0
1523 gic=system.realview.gic
1524 int_num0=36
1525 int_num1=36
1526 pio_addr=268505088
1527 pio_latency=100000
1528 system=system
1529 pio=system.iobus.master[2]
1530
1531 [system.realview.timer1]
1532 type=Sp804
1533 amba_id=1316868
1534 clk_domain=system.clk_domain
1535 clock0=1000000
1536 clock1=1000000
1537 eventq_index=0
1538 gic=system.realview.gic
1539 int_num0=37
1540 int_num1=37
1541 pio_addr=268509184
1542 pio_latency=100000
1543 system=system
1544 pio=system.iobus.master[3]
1545
1546 [system.realview.uart]
1547 type=Pl011
1548 clk_domain=system.clk_domain
1549 end_on_eot=false
1550 eventq_index=0
1551 gic=system.realview.gic
1552 int_delay=100000
1553 int_num=44
1554 pio_addr=268472320
1555 pio_latency=100000
1556 platform=system.realview
1557 system=system
1558 terminal=system.terminal
1559 pio=system.iobus.master[0]
1560
1561 [system.realview.uart1_fake]
1562 type=AmbaFake
1563 amba_id=0
1564 clk_domain=system.clk_domain
1565 eventq_index=0
1566 ignore_access=false
1567 pio_addr=268476416
1568 pio_latency=100000
1569 system=system
1570 pio=system.iobus.master[10]
1571
1572 [system.realview.uart2_fake]
1573 type=AmbaFake
1574 amba_id=0
1575 clk_domain=system.clk_domain
1576 eventq_index=0
1577 ignore_access=false
1578 pio_addr=268480512
1579 pio_latency=100000
1580 system=system
1581 pio=system.iobus.master[11]
1582
1583 [system.realview.uart3_fake]
1584 type=AmbaFake
1585 amba_id=0
1586 clk_domain=system.clk_domain
1587 eventq_index=0
1588 ignore_access=false
1589 pio_addr=268484608
1590 pio_latency=100000
1591 system=system
1592 pio=system.iobus.master[12]
1593
1594 [system.realview.watchdog_fake]
1595 type=AmbaFake
1596 amba_id=0
1597 clk_domain=system.clk_domain
1598 eventq_index=0
1599 ignore_access=false
1600 pio_addr=268500992
1601 pio_latency=100000
1602 system=system
1603 pio=system.iobus.master[15]
1604
1605 [system.terminal]
1606 type=Terminal
1607 eventq_index=0
1608 intr_control=system.intrctrl
1609 number=0
1610 output=true
1611 port=3456
1612
1613 [system.toL2Bus]
1614 type=CoherentBus
1615 clk_domain=system.cpu_clk_domain
1616 eventq_index=0
1617 header_cycles=1
1618 system=system
1619 use_default_range=false
1620 width=8
1621 master=system.l2c.cpu_side
1622 slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.istage2_mmu.stage2_tlb.walker.port system.cpu0.dstage2_mmu.stage2_tlb.walker.port
1623
1624 [system.vncserver]
1625 type=VncServer
1626 eventq_index=0
1627 frame_capture=false
1628 number=0
1629 port=5900
1630
1631 [system.voltage_domain]
1632 type=VoltageDomain
1633 eventq_index=0
1634 voltage=1.000000
1635