tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-checker/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 eventq_index=0
   5 full_system=true
   6 sim_quantum=0
   7 time_sync_enable=false
   8 time_sync_period=100000000000
   9 time_sync_spin_threshold=100000000
  10
  11 [system]
  12 type=LinuxArmSystem
  13 children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
  14 atags_addr=134217728
  15 boot_loader=/home/stever/m5/aarch-system-2014-10/binaries/boot_emm.arm64
  16 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
  17 boot_release_addr=65528
  18 cache_line_size=64
  19 clk_domain=system.clk_domain
  20 dtb_filename=/home/stever/m5/aarch-system-2014-10/binaries/vexpress.aarch64.20140821.dtb
  21 early_kernel_symbols=false
  22 enable_context_switch_stats_dump=false
  23 eventq_index=0
  24 flags_addr=469827632
  25 gic_cpu_addr=738205696
  26 have_generic_timer=false
  27 have_large_asid_64=false
  28 have_lpae=false
  29 have_security=false
  30 have_virtualization=false
  31 highest_el_is_64=false
  32 init_param=0
  33 kernel=/home/stever/m5/aarch-system-2014-10/binaries/vmlinux.aarch64.20140821
  34 kernel_addr_check=true
  35 load_addr_mask=268435455
  36 load_offset=2147483648
  37 machine_type=VExpress_EMM64
  38 mem_mode=timing
  39 mem_ranges=2147483648:2415919103
  40 memories=system.physmem system.realview.nvmem system.realview.vram
  41 mmap_using_noreserve=false
  42 multi_proc=true
  43 num_work_ids=16
  44 panic_on_oops=true
  45 panic_on_panic=true
  46 phys_addr_range_64=40
  47 readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh
  48 reset_addr_64=0
  49 symbolfile=
  50 work_begin_ckpt_count=0
  51 work_begin_cpu_id_exit=-1
  52 work_begin_exit_count=0
  53 work_cpus_ckpt_count=0
  54 work_end_ckpt_count=0
  55 work_end_exit_count=0
  56 work_item_id=-1
  57 system_port=system.membus.slave[1]
  58
  59 [system.bridge]
  60 type=Bridge
  61 clk_domain=system.clk_domain
  62 delay=50000
  63 eventq_index=0
  64 ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
  65 req_size=16
  66 resp_size=16
  67 master=system.iobus.slave[0]
  68 slave=system.membus.master[0]
  69
  70 [system.cf0]
  71 type=IdeDisk
  72 children=image
  73 delay=1000000
  74 driveID=master
  75 eventq_index=0
  76 image=system.cf0.image
  77
  78 [system.cf0.image]
  79 type=CowDiskImage
  80 children=child
  81 child=system.cf0.image.child
  82 eventq_index=0
  83 image_file=
  84 read_only=false
  85 table_size=65536
  86
  87 [system.cf0.image.child]
  88 type=RawDiskImage
  89 eventq_index=0
  90 image_file=/home/stever/m5/aarch-system-2014-10/disks/linaro-minimal-aarch64.img
  91 read_only=true
  92
  93 [system.clk_domain]
  94 type=SrcClockDomain
  95 clock=1000
  96 domain_id=-1
  97 eventq_index=0
  98 init_perf_level=0
  99 voltage_domain=system.voltage_domain
 100
 101 [system.cpu]
 102 type=DerivO3CPU
 103 children=branchPred checker dcache dstage2_mmu dtb fuPool icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
 104 LFSTSize=1024
 105 LQEntries=16
 106 LSQCheckLoads=true
 107 LSQDepCheckShift=0
 108 SQEntries=16
 109 SSITSize=1024
 110 activity=0
 111 backComSize=5
 112 branchPred=system.cpu.branchPred
 113 cachePorts=200
 114 checker=system.cpu.checker
 115 clk_domain=system.cpu_clk_domain
 116 commitToDecodeDelay=1
 117 commitToFetchDelay=1
 118 commitToIEWDelay=1
 119 commitToRenameDelay=1
 120 commitWidth=8
 121 cpu_id=0
 122 decodeToFetchDelay=1
 123 decodeToRenameDelay=2
 124 decodeWidth=3
 125 dispatchWidth=6
 126 do_checkpoint_insts=true
 127 do_quiesce=true
 128 do_statistics_insts=true
 129 dstage2_mmu=system.cpu.dstage2_mmu
 130 dtb=system.cpu.dtb
 131 eventq_index=0
 132 fetchBufferSize=16
 133 fetchQueueSize=32
 134 fetchToDecodeDelay=3
 135 fetchTrapLatency=1
 136 fetchWidth=3
 137 forwardComSize=5
 138 fuPool=system.cpu.fuPool
 139 function_trace=false
 140 function_trace_start=0
 141 iewToCommitDelay=1
 142 iewToDecodeDelay=1
 143 iewToFetchDelay=1
 144 iewToRenameDelay=1
 145 interrupts=system.cpu.interrupts
 146 isa=system.cpu.isa
 147 issueToExecuteDelay=1
 148 issueWidth=8
 149 istage2_mmu=system.cpu.istage2_mmu
 150 itb=system.cpu.itb
 151 max_insts_all_threads=0
 152 max_insts_any_thread=0
 153 max_loads_all_threads=0
 154 max_loads_any_thread=0
 155 needsTSO=false
 156 numIQEntries=32
 157 numPhysCCRegs=640
 158 numPhysFloatRegs=192
 159 numPhysIntRegs=128
 160 numROBEntries=40
 161 numRobs=1
 162 numThreads=1
 163 profile=0
 164 progress_interval=0
 165 renameToDecodeDelay=1
 166 renameToFetchDelay=1
 167 renameToIEWDelay=1
 168 renameToROBDelay=1
 169 renameWidth=3
 170 simpoint_start_insts=
 171 smtCommitPolicy=RoundRobin
 172 smtFetchPolicy=SingleThread
 173 smtIQPolicy=Partitioned
 174 smtIQThreshold=100
 175 smtLSQPolicy=Partitioned
 176 smtLSQThreshold=100
 177 smtNumFetchingThreads=1
 178 smtROBPolicy=Partitioned
 179 smtROBThreshold=100
 180 socket_id=0
 181 squashWidth=8
 182 store_set_clear_period=250000
 183 switched_out=false
 184 system=system
 185 tracer=system.cpu.tracer
 186 trapLatency=13
 187 wbWidth=8
 188 workload=
 189 dcache_port=system.cpu.dcache.cpu_side
 190 icache_port=system.cpu.icache.cpu_side
 191
 192 [system.cpu.branchPred]
 193 type=BiModeBP
 194 BTBEntries=2048
 195 BTBTagSize=18
 196 RASSize=16
 197 choiceCtrBits=2
 198 choicePredictorSize=8192
 199 eventq_index=0
 200 globalCtrBits=2
 201 globalPredictorSize=8192
 202 instShiftAmt=2
 203 numThreads=1
 204
 205 [system.cpu.checker]
 206 type=O3Checker
 207 children=dstage2_mmu dtb isa istage2_mmu itb tracer
 208 checker=Null
 209 clk_domain=system.cpu_clk_domain
 210 cpu_id=0
 211 do_checkpoint_insts=true
 212 do_quiesce=true
 213 do_statistics_insts=true
 214 dstage2_mmu=system.cpu.checker.dstage2_mmu
 215 dtb=system.cpu.checker.dtb
 216 eventq_index=0
 217 exitOnError=false
 218 function_trace=false
 219 function_trace_start=0
 220 interrupts=Null
 221 isa=system.cpu.checker.isa
 222 istage2_mmu=system.cpu.checker.istage2_mmu
 223 itb=system.cpu.checker.itb
 224 max_insts_all_threads=0
 225 max_insts_any_thread=0
 226 max_loads_all_threads=0
 227 max_loads_any_thread=0
 228 numThreads=1
 229 profile=0
 230 progress_interval=0
 231 simpoint_start_insts=
 232 socket_id=0
 233 switched_out=false
 234 system=system
 235 tracer=system.cpu.checker.tracer
 236 updateOnError=true
 237 warnOnlyOnLoadError=true
 238 workload=
 239
 240 [system.cpu.checker.dstage2_mmu]
 241 type=ArmStage2MMU
 242 children=stage2_tlb
 243 eventq_index=0
 244 stage2_tlb=system.cpu.checker.dstage2_mmu.stage2_tlb
 245 sys=system
 246 tlb=system.cpu.checker.dtb
 247
 248 [system.cpu.checker.dstage2_mmu.stage2_tlb]
 249 type=ArmTLB
 250 children=walker
 251 eventq_index=0
 252 is_stage2=true
 253 size=32
 254 walker=system.cpu.checker.dstage2_mmu.stage2_tlb.walker
 255
 256 [system.cpu.checker.dstage2_mmu.stage2_tlb.walker]
 257 type=ArmTableWalker
 258 clk_domain=system.cpu_clk_domain
 259 eventq_index=0
 260 is_stage2=true
 261 num_squash_per_cycle=2
 262 sys=system
 263
 264 [system.cpu.checker.dtb]
 265 type=ArmTLB
 266 children=walker
 267 eventq_index=0
 268 is_stage2=false
 269 size=64
 270 walker=system.cpu.checker.dtb.walker
 271
 272 [system.cpu.checker.dtb.walker]
 273 type=ArmTableWalker
 274 clk_domain=system.cpu_clk_domain
 275 eventq_index=0
 276 is_stage2=false
 277 num_squash_per_cycle=2
 278 sys=system
 279 port=system.cpu.toL2Bus.slave[5]
 280
 281 [system.cpu.checker.isa]
 282 type=ArmISA
 283 eventq_index=0
 284 fpsid=1090793632
 285 id_aa64afr0_el1=0
 286 id_aa64afr1_el1=0
 287 id_aa64dfr0_el1=1052678
 288 id_aa64dfr1_el1=0
 289 id_aa64isar0_el1=0
 290 id_aa64isar1_el1=0
 291 id_aa64mmfr0_el1=15728642
 292 id_aa64mmfr1_el1=0
 293 id_aa64pfr0_el1=17
 294 id_aa64pfr1_el1=0
 295 id_isar0=34607377
 296 id_isar1=34677009
 297 id_isar2=555950401
 298 id_isar3=17899825
 299 id_isar4=268501314
 300 id_isar5=0
 301 id_mmfr0=270536963
 302 id_mmfr1=0
 303 id_mmfr2=19070976
 304 id_mmfr3=34611729
 305 id_pfr0=49
 306 id_pfr1=4113
 307 midr=1091551472
 308 pmu=Null
 309 system=system
 310
 311 [system.cpu.checker.istage2_mmu]
 312 type=ArmStage2MMU
 313 children=stage2_tlb
 314 eventq_index=0
 315 stage2_tlb=system.cpu.checker.istage2_mmu.stage2_tlb
 316 sys=system
 317 tlb=system.cpu.checker.itb
 318
 319 [system.cpu.checker.istage2_mmu.stage2_tlb]
 320 type=ArmTLB
 321 children=walker
 322 eventq_index=0
 323 is_stage2=true
 324 size=32
 325 walker=system.cpu.checker.istage2_mmu.stage2_tlb.walker
 326
 327 [system.cpu.checker.istage2_mmu.stage2_tlb.walker]
 328 type=ArmTableWalker
 329 clk_domain=system.cpu_clk_domain
 330 eventq_index=0
 331 is_stage2=true
 332 num_squash_per_cycle=2
 333 sys=system
 334
 335 [system.cpu.checker.itb]
 336 type=ArmTLB
 337 children=walker
 338 eventq_index=0
 339 is_stage2=false
 340 size=64
 341 walker=system.cpu.checker.itb.walker
 342
 343 [system.cpu.checker.itb.walker]
 344 type=ArmTableWalker
 345 clk_domain=system.cpu_clk_domain
 346 eventq_index=0
 347 is_stage2=false
 348 num_squash_per_cycle=2
 349 sys=system
 350 port=system.cpu.toL2Bus.slave[4]
 351
 352 [system.cpu.checker.tracer]
 353 type=ExeTracer
 354 eventq_index=0
 355
 356 [system.cpu.dcache]
 357 type=BaseCache
 358 children=tags
 359 addr_ranges=0:18446744073709551615
 360 assoc=4
 361 clk_domain=system.cpu_clk_domain
 362 demand_mshr_reserve=1
 363 eventq_index=0
 364 forward_snoops=true
 365 hit_latency=2
 366 is_read_only=false
 367 max_miss_count=0
 368 mshrs=4
 369 prefetch_on_access=false
 370 prefetcher=Null
 371 response_latency=2
 372 sequential_access=false
 373 size=32768
 374 system=system
 375 tags=system.cpu.dcache.tags
 376 tgts_per_mshr=20
 377 write_buffers=8
 378 cpu_side=system.cpu.dcache_port
 379 mem_side=system.cpu.toL2Bus.slave[1]
 380
 381 [system.cpu.dcache.tags]
 382 type=LRU
 383 assoc=4
 384 block_size=64
 385 clk_domain=system.cpu_clk_domain
 386 eventq_index=0
 387 hit_latency=2
 388 sequential_access=false
 389 size=32768
 390
 391 [system.cpu.dstage2_mmu]
 392 type=ArmStage2MMU
 393 children=stage2_tlb
 394 eventq_index=0
 395 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
 396 sys=system
 397 tlb=system.cpu.dtb
 398
 399 [system.cpu.dstage2_mmu.stage2_tlb]
 400 type=ArmTLB
 401 children=walker
 402 eventq_index=0
 403 is_stage2=true
 404 size=32
 405 walker=system.cpu.dstage2_mmu.stage2_tlb.walker
 406
 407 [system.cpu.dstage2_mmu.stage2_tlb.walker]
 408 type=ArmTableWalker
 409 clk_domain=system.cpu_clk_domain
 410 eventq_index=0
 411 is_stage2=true
 412 num_squash_per_cycle=2
 413 sys=system
 414
 415 [system.cpu.dtb]
 416 type=ArmTLB
 417 children=walker
 418 eventq_index=0
 419 is_stage2=false
 420 size=64
 421 walker=system.cpu.dtb.walker
 422
 423 [system.cpu.dtb.walker]
 424 type=ArmTableWalker
 425 clk_domain=system.cpu_clk_domain
 426 eventq_index=0
 427 is_stage2=false
 428 num_squash_per_cycle=2
 429 sys=system
 430 port=system.cpu.toL2Bus.slave[3]
 431
 432 [system.cpu.fuPool]
 433 type=FUPool
 434 children=FUList0 FUList1 FUList2 FUList3 FUList4
 435 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4
 436 eventq_index=0
 437
 438 [system.cpu.fuPool.FUList0]
 439 type=FUDesc
 440 children=opList
 441 count=2
 442 eventq_index=0
 443 opList=system.cpu.fuPool.FUList0.opList
 444
 445 [system.cpu.fuPool.FUList0.opList]
 446 type=OpDesc
 447 eventq_index=0
 448 opClass=IntAlu
 449 opLat=1
 450 pipelined=true
 451
 452 [system.cpu.fuPool.FUList1]
 453 type=FUDesc
 454 children=opList0 opList1 opList2
 455 count=1
 456 eventq_index=0
 457 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1 system.cpu.fuPool.FUList1.opList2
 458
 459 [system.cpu.fuPool.FUList1.opList0]
 460 type=OpDesc
 461 eventq_index=0
 462 opClass=IntMult
 463 opLat=3
 464 pipelined=true
 465
 466 [system.cpu.fuPool.FUList1.opList1]
 467 type=OpDesc
 468 eventq_index=0
 469 opClass=IntDiv
 470 opLat=12
 471 pipelined=false
 472
 473 [system.cpu.fuPool.FUList1.opList2]
 474 type=OpDesc
 475 eventq_index=0
 476 opClass=IprAccess
 477 opLat=3
 478 pipelined=true
 479
 480 [system.cpu.fuPool.FUList2]
 481 type=FUDesc
 482 children=opList
 483 count=1
 484 eventq_index=0
 485 opList=system.cpu.fuPool.FUList2.opList
 486
 487 [system.cpu.fuPool.FUList2.opList]
 488 type=OpDesc
 489 eventq_index=0
 490 opClass=MemRead
 491 opLat=2
 492 pipelined=true
 493
 494 [system.cpu.fuPool.FUList3]
 495 type=FUDesc
 496 children=opList
 497 count=1
 498 eventq_index=0
 499 opList=system.cpu.fuPool.FUList3.opList
 500
 501 [system.cpu.fuPool.FUList3.opList]
 502 type=OpDesc
 503 eventq_index=0
 504 opClass=MemWrite
 505 opLat=2
 506 pipelined=true
 507
 508 [system.cpu.fuPool.FUList4]
 509 type=FUDesc
 510 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19 opList20 opList21 opList22 opList23 opList24 opList25
 511 count=2
 512 eventq_index=0
 513 opList=system.cpu.fuPool.FUList4.opList00 system.cpu.fuPool.FUList4.opList01 system.cpu.fuPool.FUList4.opList02 system.cpu.fuPool.FUList4.opList03 system.cpu.fuPool.FUList4.opList04 system.cpu.fuPool.FUList4.opList05 system.cpu.fuPool.FUList4.opList06 system.cpu.fuPool.FUList4.opList07 system.cpu.fuPool.FUList4.opList08 system.cpu.fuPool.FUList4.opList09 system.cpu.fuPool.FUList4.opList10 system.cpu.fuPool.FUList4.opList11 system.cpu.fuPool.FUList4.opList12 system.cpu.fuPool.FUList4.opList13 system.cpu.fuPool.FUList4.opList14 system.cpu.fuPool.FUList4.opList15 system.cpu.fuPool.FUList4.opList16 system.cpu.fuPool.FUList4.opList17 system.cpu.fuPool.FUList4.opList18 system.cpu.fuPool.FUList4.opList19 system.cpu.fuPool.FUList4.opList20 system.cpu.fuPool.FUList4.opList21 system.cpu.fuPool.FUList4.opList22 system.cpu.fuPool.FUList4.opList23 system.cpu.fuPool.FUList4.opList24 system.cpu.fuPool.FUList4.opList25
 514
 515 [system.cpu.fuPool.FUList4.opList00]
 516 type=OpDesc
 517 eventq_index=0
 518 opClass=SimdAdd
 519 opLat=4
 520 pipelined=true
 521
 522 [system.cpu.fuPool.FUList4.opList01]
 523 type=OpDesc
 524 eventq_index=0
 525 opClass=SimdAddAcc
 526 opLat=4
 527 pipelined=true
 528
 529 [system.cpu.fuPool.FUList4.opList02]
 530 type=OpDesc
 531 eventq_index=0
 532 opClass=SimdAlu
 533 opLat=4
 534 pipelined=true
 535
 536 [system.cpu.fuPool.FUList4.opList03]
 537 type=OpDesc
 538 eventq_index=0
 539 opClass=SimdCmp
 540 opLat=4
 541 pipelined=true
 542
 543 [system.cpu.fuPool.FUList4.opList04]
 544 type=OpDesc
 545 eventq_index=0
 546 opClass=SimdCvt
 547 opLat=3
 548 pipelined=true
 549
 550 [system.cpu.fuPool.FUList4.opList05]
 551 type=OpDesc
 552 eventq_index=0
 553 opClass=SimdMisc
 554 opLat=3
 555 pipelined=true
 556
 557 [system.cpu.fuPool.FUList4.opList06]
 558 type=OpDesc
 559 eventq_index=0
 560 opClass=SimdMult
 561 opLat=5
 562 pipelined=true
 563
 564 [system.cpu.fuPool.FUList4.opList07]
 565 type=OpDesc
 566 eventq_index=0
 567 opClass=SimdMultAcc
 568 opLat=5
 569 pipelined=true
 570
 571 [system.cpu.fuPool.FUList4.opList08]
 572 type=OpDesc
 573 eventq_index=0
 574 opClass=SimdShift
 575 opLat=3
 576 pipelined=true
 577
 578 [system.cpu.fuPool.FUList4.opList09]
 579 type=OpDesc
 580 eventq_index=0
 581 opClass=SimdShiftAcc
 582 opLat=3
 583 pipelined=true
 584
 585 [system.cpu.fuPool.FUList4.opList10]
 586 type=OpDesc
 587 eventq_index=0
 588 opClass=SimdSqrt
 589 opLat=9
 590 pipelined=true
 591
 592 [system.cpu.fuPool.FUList4.opList11]
 593 type=OpDesc
 594 eventq_index=0
 595 opClass=SimdFloatAdd
 596 opLat=5
 597 pipelined=true
 598
 599 [system.cpu.fuPool.FUList4.opList12]
 600 type=OpDesc
 601 eventq_index=0
 602 opClass=SimdFloatAlu
 603 opLat=5
 604 pipelined=true
 605
 606 [system.cpu.fuPool.FUList4.opList13]
 607 type=OpDesc
 608 eventq_index=0
 609 opClass=SimdFloatCmp
 610 opLat=3
 611 pipelined=true
 612
 613 [system.cpu.fuPool.FUList4.opList14]
 614 type=OpDesc
 615 eventq_index=0
 616 opClass=SimdFloatCvt
 617 opLat=3
 618 pipelined=true
 619
 620 [system.cpu.fuPool.FUList4.opList15]
 621 type=OpDesc
 622 eventq_index=0
 623 opClass=SimdFloatDiv
 624 opLat=3
 625 pipelined=true
 626
 627 [system.cpu.fuPool.FUList4.opList16]
 628 type=OpDesc
 629 eventq_index=0
 630 opClass=SimdFloatMisc
 631 opLat=3
 632 pipelined=true
 633
 634 [system.cpu.fuPool.FUList4.opList17]
 635 type=OpDesc
 636 eventq_index=0
 637 opClass=SimdFloatMult
 638 opLat=3
 639 pipelined=true
 640
 641 [system.cpu.fuPool.FUList4.opList18]
 642 type=OpDesc
 643 eventq_index=0
 644 opClass=SimdFloatMultAcc
 645 opLat=1
 646 pipelined=true
 647
 648 [system.cpu.fuPool.FUList4.opList19]
 649 type=OpDesc
 650 eventq_index=0
 651 opClass=SimdFloatSqrt
 652 opLat=9
 653 pipelined=true
 654
 655 [system.cpu.fuPool.FUList4.opList20]
 656 type=OpDesc
 657 eventq_index=0
 658 opClass=FloatAdd
 659 opLat=5
 660 pipelined=true
 661
 662 [system.cpu.fuPool.FUList4.opList21]
 663 type=OpDesc
 664 eventq_index=0
 665 opClass=FloatCmp
 666 opLat=5
 667 pipelined=true
 668
 669 [system.cpu.fuPool.FUList4.opList22]
 670 type=OpDesc
 671 eventq_index=0
 672 opClass=FloatCvt
 673 opLat=5
 674 pipelined=true
 675
 676 [system.cpu.fuPool.FUList4.opList23]
 677 type=OpDesc
 678 eventq_index=0
 679 opClass=FloatDiv
 680 opLat=9
 681 pipelined=false
 682
 683 [system.cpu.fuPool.FUList4.opList24]
 684 type=OpDesc
 685 eventq_index=0
 686 opClass=FloatSqrt
 687 opLat=33
 688 pipelined=false
 689
 690 [system.cpu.fuPool.FUList4.opList25]
 691 type=OpDesc
 692 eventq_index=0
 693 opClass=FloatMult
 694 opLat=4
 695 pipelined=true
 696
 697 [system.cpu.icache]
 698 type=BaseCache
 699 children=tags
 700 addr_ranges=0:18446744073709551615
 701 assoc=1
 702 clk_domain=system.cpu_clk_domain
 703 demand_mshr_reserve=1
 704 eventq_index=0
 705 forward_snoops=true
 706 hit_latency=2
 707 is_read_only=true
 708 max_miss_count=0
 709 mshrs=4
 710 prefetch_on_access=false
 711 prefetcher=Null
 712 response_latency=2
 713 sequential_access=false
 714 size=32768
 715 system=system
 716 tags=system.cpu.icache.tags
 717 tgts_per_mshr=20
 718 write_buffers=8
 719 cpu_side=system.cpu.icache_port
 720 mem_side=system.cpu.toL2Bus.slave[0]
 721
 722 [system.cpu.icache.tags]
 723 type=LRU
 724 assoc=1
 725 block_size=64
 726 clk_domain=system.cpu_clk_domain
 727 eventq_index=0
 728 hit_latency=2
 729 sequential_access=false
 730 size=32768
 731
 732 [system.cpu.interrupts]
 733 type=ArmInterrupts
 734 eventq_index=0
 735
 736 [system.cpu.isa]
 737 type=ArmISA
 738 eventq_index=0
 739 fpsid=1090793632
 740 id_aa64afr0_el1=0
 741 id_aa64afr1_el1=0
 742 id_aa64dfr0_el1=1052678
 743 id_aa64dfr1_el1=0
 744 id_aa64isar0_el1=0
 745 id_aa64isar1_el1=0
 746 id_aa64mmfr0_el1=15728642
 747 id_aa64mmfr1_el1=0
 748 id_aa64pfr0_el1=17
 749 id_aa64pfr1_el1=0
 750 id_isar0=34607377
 751 id_isar1=34677009
 752 id_isar2=555950401
 753 id_isar3=17899825
 754 id_isar4=268501314
 755 id_isar5=0
 756 id_mmfr0=270536963
 757 id_mmfr1=0
 758 id_mmfr2=19070976
 759 id_mmfr3=34611729
 760 id_pfr0=49
 761 id_pfr1=4113
 762 midr=1091551472
 763 pmu=Null
 764 system=system
 765
 766 [system.cpu.istage2_mmu]
 767 type=ArmStage2MMU
 768 children=stage2_tlb
 769 eventq_index=0
 770 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
 771 sys=system
 772 tlb=system.cpu.itb
 773
 774 [system.cpu.istage2_mmu.stage2_tlb]
 775 type=ArmTLB
 776 children=walker
 777 eventq_index=0
 778 is_stage2=true
 779 size=32
 780 walker=system.cpu.istage2_mmu.stage2_tlb.walker
 781
 782 [system.cpu.istage2_mmu.stage2_tlb.walker]
 783 type=ArmTableWalker
 784 clk_domain=system.cpu_clk_domain
 785 eventq_index=0
 786 is_stage2=true
 787 num_squash_per_cycle=2
 788 sys=system
 789
 790 [system.cpu.itb]
 791 type=ArmTLB
 792 children=walker
 793 eventq_index=0
 794 is_stage2=false
 795 size=64
 796 walker=system.cpu.itb.walker
 797
 798 [system.cpu.itb.walker]
 799 type=ArmTableWalker
 800 clk_domain=system.cpu_clk_domain
 801 eventq_index=0
 802 is_stage2=false
 803 num_squash_per_cycle=2
 804 sys=system
 805 port=system.cpu.toL2Bus.slave[2]
 806
 807 [system.cpu.l2cache]
 808 type=BaseCache
 809 children=tags
 810 addr_ranges=0:18446744073709551615
 811 assoc=8
 812 clk_domain=system.cpu_clk_domain
 813 demand_mshr_reserve=1
 814 eventq_index=0
 815 forward_snoops=true
 816 hit_latency=20
 817 is_read_only=false
 818 max_miss_count=0
 819 mshrs=20
 820 prefetch_on_access=false
 821 prefetcher=Null
 822 response_latency=20
 823 sequential_access=false
 824 size=4194304
 825 system=system
 826 tags=system.cpu.l2cache.tags
 827 tgts_per_mshr=12
 828 write_buffers=8
 829 cpu_side=system.cpu.toL2Bus.master[0]
 830 mem_side=system.membus.slave[2]
 831
 832 [system.cpu.l2cache.tags]
 833 type=LRU
 834 assoc=8
 835 block_size=64
 836 clk_domain=system.cpu_clk_domain
 837 eventq_index=0
 838 hit_latency=20
 839 sequential_access=false
 840 size=4194304
 841
 842 [system.cpu.toL2Bus]
 843 type=CoherentXBar
 844 clk_domain=system.cpu_clk_domain
 845 eventq_index=0
 846 forward_latency=0
 847 frontend_latency=1
 848 response_latency=1
 849 snoop_filter=Null
 850 snoop_response_latency=1
 851 system=system
 852 use_default_range=false
 853 width=32
 854 master=system.cpu.l2cache.cpu_side
 855 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.checker.itb.walker.port system.cpu.checker.dtb.walker.port
 856
 857 [system.cpu.tracer]
 858 type=ExeTracer
 859 eventq_index=0
 860
 861 [system.cpu_clk_domain]
 862 type=SrcClockDomain
 863 clock=500
 864 domain_id=-1
 865 eventq_index=0
 866 init_perf_level=0
 867 voltage_domain=system.voltage_domain
 868
 869 [system.dvfs_handler]
 870 type=DVFSHandler
 871 domains=
 872 enable=false
 873 eventq_index=0
 874 sys_clk_domain=system.clk_domain
 875 transition_latency=100000000
 876
 877 [system.intrctrl]
 878 type=IntrControl
 879 eventq_index=0
 880 sys=system
 881
 882 [system.iobus]
 883 type=NoncoherentXBar
 884 clk_domain=system.clk_domain
 885 eventq_index=0
 886 forward_latency=1
 887 frontend_latency=2
 888 response_latency=2
 889 use_default_range=true
 890 width=16
 891 default=system.realview.pciconfig.pio
 892 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ide.config system.realview.ethernet.pio system.realview.ethernet.config system.iocache.cpu_side
 893 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
 894
 895 [system.iocache]
 896 type=BaseCache
 897 children=tags
 898 addr_ranges=2147483648:2415919103
 899 assoc=8
 900 clk_domain=system.clk_domain
 901 demand_mshr_reserve=1
 902 eventq_index=0
 903 forward_snoops=false
 904 hit_latency=50
 905 is_read_only=false
 906 max_miss_count=0
 907 mshrs=20
 908 prefetch_on_access=false
 909 prefetcher=Null
 910 response_latency=50
 911 sequential_access=false
 912 size=1024
 913 system=system
 914 tags=system.iocache.tags
 915 tgts_per_mshr=12
 916 write_buffers=8
 917 cpu_side=system.iobus.master[27]
 918 mem_side=system.membus.slave[3]
 919
 920 [system.iocache.tags]
 921 type=LRU
 922 assoc=8
 923 block_size=64
 924 clk_domain=system.clk_domain
 925 eventq_index=0
 926 hit_latency=50
 927 sequential_access=false
 928 size=1024
 929
 930 [system.membus]
 931 type=CoherentXBar
 932 children=badaddr_responder
 933 clk_domain=system.clk_domain
 934 eventq_index=0
 935 forward_latency=4
 936 frontend_latency=3
 937 response_latency=2
 938 snoop_filter=Null
 939 snoop_response_latency=4
 940 system=system
 941 use_default_range=false
 942 width=16
 943 default=system.membus.badaddr_responder.pio
 944 master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
 945 slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
 946
 947 [system.membus.badaddr_responder]
 948 type=IsaFake
 949 clk_domain=system.clk_domain
 950 eventq_index=0
 951 fake_mem=false
 952 pio_addr=0
 953 pio_latency=100000
 954 pio_size=8
 955 ret_bad_addr=true
 956 ret_data16=65535
 957 ret_data32=4294967295
 958 ret_data64=18446744073709551615
 959 ret_data8=255
 960 system=system
 961 update_data=false
 962 warn_access=warn
 963 pio=system.membus.default
 964
 965 [system.physmem]
 966 type=DRAMCtrl
 967 IDD0=0.075000
 968 IDD02=0.000000
 969 IDD2N=0.050000
 970 IDD2N2=0.000000
 971 IDD2P0=0.000000
 972 IDD2P02=0.000000
 973 IDD2P1=0.000000
 974 IDD2P12=0.000000
 975 IDD3N=0.057000
 976 IDD3N2=0.000000
 977 IDD3P0=0.000000
 978 IDD3P02=0.000000
 979 IDD3P1=0.000000
 980 IDD3P12=0.000000
 981 IDD4R=0.187000
 982 IDD4R2=0.000000
 983 IDD4W=0.165000
 984 IDD4W2=0.000000
 985 IDD5=0.220000
 986 IDD52=0.000000
 987 IDD6=0.000000
 988 IDD62=0.000000
 989 VDD=1.500000
 990 VDD2=0.000000
 991 activation_limit=4
 992 addr_mapping=RoRaBaCoCh
 993 bank_groups_per_rank=0
 994 banks_per_rank=8
 995 burst_length=8
 996 channels=1
 997 clk_domain=system.clk_domain
 998 conf_table_reported=true
 999 device_bus_width=8
1000 device_rowbuffer_size=1024
1001 device_size=536870912
1002 devices_per_rank=8
1003 dll=true
1004 eventq_index=0
1005 in_addr_map=true
1006 max_accesses_per_row=16
1007 mem_sched_policy=frfcfs
1008 min_writes_per_switch=16
1009 null=false
1010 page_policy=open_adaptive
1011 range=2147483648:2415919103
1012 ranks_per_channel=2
1013 read_buffer_size=32
1014 static_backend_latency=10000
1015 static_frontend_latency=10000
1016 tBURST=5000
1017 tCCD_L=0
1018 tCK=1250
1019 tCL=13750
1020 tCS=2500
1021 tRAS=35000
1022 tRCD=13750
1023 tREFI=7800000
1024 tRFC=260000
1025 tRP=13750
1026 tRRD=6000
1027 tRRD_L=0
1028 tRTP=7500
1029 tRTW=2500
1030 tWR=15000
1031 tWTR=7500
1032 tXAW=30000
1033 tXP=0
1034 tXPDLL=0
1035 tXS=0
1036 tXSDLL=0
1037 write_buffer_size=64
1038 write_high_thresh_perc=85
1039 write_low_thresh_perc=50
1040 port=system.membus.master[5]
1041
1042 [system.realview]
1043 type=RealView
1044 children=aaci_fake cf_ctrl clcd energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mmc_fake nvmem pciconfig realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
1045 eventq_index=0
1046 intrctrl=system.intrctrl
1047 pci_cfg_base=805306368
1048 pci_cfg_gen_offsets=true
1049 pci_io_base=788529152
1050 system=system
1051
1052 [system.realview.aaci_fake]
1053 type=AmbaFake
1054 amba_id=0
1055 clk_domain=system.clk_domain
1056 eventq_index=0
1057 ignore_access=false
1058 pio_addr=470024192
1059 pio_latency=100000
1060 system=system
1061 pio=system.iobus.master[18]
1062
1063 [system.realview.cf_ctrl]
1064 type=IdeController
1065 BAR0=471465984
1066 BAR0LegacyIO=true
1067 BAR0Size=256
1068 BAR1=471466240
1069 BAR1LegacyIO=true
1070 BAR1Size=4096
1071 BAR2=1
1072 BAR2LegacyIO=false
1073 BAR2Size=8
1074 BAR3=1
1075 BAR3LegacyIO=false
1076 BAR3Size=4
1077 BAR4=1
1078 BAR4LegacyIO=false
1079 BAR4Size=16
1080 BAR5=1
1081 BAR5LegacyIO=false
1082 BAR5Size=0
1083 BIST=0
1084 CacheLineSize=0
1085 CapabilityPtr=0
1086 CardbusCIS=0
1087 ClassCode=1
1088 Command=1
1089 DeviceID=28945
1090 ExpansionROM=0
1091 HeaderType=0
1092 InterruptLine=31
1093 InterruptPin=1
1094 LatencyTimer=0
1095 LegacyIOBase=0
1096 MSICAPBaseOffset=0
1097 MSICAPCapId=0
1098 MSICAPMaskBits=0
1099 MSICAPMsgAddr=0
1100 MSICAPMsgCtrl=0
1101 MSICAPMsgData=0
1102 MSICAPMsgUpperAddr=0
1103 MSICAPNextCapability=0
1104 MSICAPPendingBits=0
1105 MSIXCAPBaseOffset=0
1106 MSIXCAPCapId=0
1107 MSIXCAPNextCapability=0
1108 MSIXMsgCtrl=0
1109 MSIXPbaOffset=0
1110 MSIXTableOffset=0
1111 MaximumLatency=0
1112 MinimumGrant=0
1113 PMCAPBaseOffset=0
1114 PMCAPCapId=0
1115 PMCAPCapabilities=0
1116 PMCAPCtrlStatus=0
1117 PMCAPNextCapability=0
1118 PXCAPBaseOffset=0
1119 PXCAPCapId=0
1120 PXCAPCapabilities=0
1121 PXCAPDevCap2=0
1122 PXCAPDevCapabilities=0
1123 PXCAPDevCtrl=0
1124 PXCAPDevCtrl2=0
1125 PXCAPDevStatus=0
1126 PXCAPLinkCap=0
1127 PXCAPLinkCtrl=0
1128 PXCAPLinkStatus=0
1129 PXCAPNextCapability=0
1130 ProgIF=133
1131 Revision=0
1132 Status=640
1133 SubClassCode=1
1134 SubsystemID=0
1135 SubsystemVendorID=0
1136 VendorID=32902
1137 clk_domain=system.clk_domain
1138 config_latency=20000
1139 ctrl_offset=2
1140 disks=
1141 eventq_index=0
1142 io_shift=2
1143 pci_bus=2
1144 pci_dev=0
1145 pci_func=0
1146 pio_latency=30000
1147 platform=system.realview
1148 system=system
1149 config=system.iobus.master[9]
1150 dma=system.iobus.slave[2]
1151 pio=system.iobus.master[8]
1152
1153 [system.realview.clcd]
1154 type=Pl111
1155 amba_id=1315089
1156 clk_domain=system.clk_domain
1157 enable_capture=true
1158 eventq_index=0
1159 gic=system.realview.gic
1160 int_num=46
1161 pio_addr=471793664
1162 pio_latency=10000
1163 pixel_clock=41667
1164 system=system
1165 vnc=system.vncserver
1166 dma=system.iobus.slave[1]
1167 pio=system.iobus.master[4]
1168
1169 [system.realview.energy_ctrl]
1170 type=EnergyCtrl
1171 clk_domain=system.clk_domain
1172 dvfs_handler=system.dvfs_handler
1173 eventq_index=0
1174 pio_addr=470286336
1175 pio_latency=100000
1176 system=system
1177 pio=system.iobus.master[22]
1178
1179 [system.realview.ethernet]
1180 type=IGbE
1181 BAR0=0
1182 BAR0LegacyIO=false
1183 BAR0Size=131072
1184 BAR1=0
1185 BAR1LegacyIO=false
1186 BAR1Size=0
1187 BAR2=0
1188 BAR2LegacyIO=false
1189 BAR2Size=0
1190 BAR3=0
1191 BAR3LegacyIO=false
1192 BAR3Size=0
1193 BAR4=0
1194 BAR4LegacyIO=false
1195 BAR4Size=0
1196 BAR5=0
1197 BAR5LegacyIO=false
1198 BAR5Size=0
1199 BIST=0
1200 CacheLineSize=0
1201 CapabilityPtr=0
1202 CardbusCIS=0
1203 ClassCode=2
1204 Command=0
1205 DeviceID=4213
1206 ExpansionROM=0
1207 HeaderType=0
1208 InterruptLine=1
1209 InterruptPin=1
1210 LatencyTimer=0
1211 LegacyIOBase=0
1212 MSICAPBaseOffset=0
1213 MSICAPCapId=0
1214 MSICAPMaskBits=0
1215 MSICAPMsgAddr=0
1216 MSICAPMsgCtrl=0
1217 MSICAPMsgData=0
1218 MSICAPMsgUpperAddr=0
1219 MSICAPNextCapability=0
1220 MSICAPPendingBits=0
1221 MSIXCAPBaseOffset=0
1222 MSIXCAPCapId=0
1223 MSIXCAPNextCapability=0
1224 MSIXMsgCtrl=0
1225 MSIXPbaOffset=0
1226 MSIXTableOffset=0
1227 MaximumLatency=0
1228 MinimumGrant=255
1229 PMCAPBaseOffset=0
1230 PMCAPCapId=0
1231 PMCAPCapabilities=0
1232 PMCAPCtrlStatus=0
1233 PMCAPNextCapability=0
1234 PXCAPBaseOffset=0
1235 PXCAPCapId=0
1236 PXCAPCapabilities=0
1237 PXCAPDevCap2=0
1238 PXCAPDevCapabilities=0
1239 PXCAPDevCtrl=0
1240 PXCAPDevCtrl2=0
1241 PXCAPDevStatus=0
1242 PXCAPLinkCap=0
1243 PXCAPLinkCtrl=0
1244 PXCAPLinkStatus=0
1245 PXCAPNextCapability=0
1246 ProgIF=0
1247 Revision=0
1248 Status=0
1249 SubClassCode=0
1250 SubsystemID=4104
1251 SubsystemVendorID=32902
1252 VendorID=32902
1253 clk_domain=system.clk_domain
1254 config_latency=20000
1255 eventq_index=0
1256 fetch_comp_delay=10000
1257 fetch_delay=10000
1258 hardware_address=00:90:00:00:00:01
1259 pci_bus=0
1260 pci_dev=0
1261 pci_func=0
1262 phy_epid=896
1263 phy_pid=680
1264 pio_latency=30000
1265 platform=system.realview
1266 rx_desc_cache_size=64
1267 rx_fifo_size=393216
1268 rx_write_delay=0
1269 system=system
1270 tx_desc_cache_size=64
1271 tx_fifo_size=393216
1272 tx_read_delay=0
1273 wb_comp_delay=10000
1274 wb_delay=10000
1275 config=system.iobus.master[26]
1276 dma=system.iobus.slave[4]
1277 pio=system.iobus.master[25]
1278
1279 [system.realview.generic_timer]
1280 type=GenericTimer
1281 eventq_index=0
1282 gic=system.realview.gic
1283 int_phys=29
1284 int_virt=27
1285 system=system
1286
1287 [system.realview.gic]
1288 type=Pl390
1289 clk_domain=system.clk_domain
1290 cpu_addr=738205696
1291 cpu_pio_delay=10000
1292 dist_addr=738201600
1293 dist_pio_delay=10000
1294 eventq_index=0
1295 int_latency=10000
1296 it_lines=128
1297 platform=system.realview
1298 system=system
1299 pio=system.membus.master[2]
1300
1301 [system.realview.hdlcd]
1302 type=HDLcd
1303 amba_id=1314816
1304 clk_domain=system.clk_domain
1305 enable_capture=true
1306 eventq_index=0
1307 gic=system.realview.gic
1308 int_num=117
1309 pio_addr=721420288
1310 pio_latency=10000
1311 pixel_clock=7299
1312 system=system
1313 vnc=system.vncserver
1314 workaround_swap_rb=true
1315 dma=system.membus.slave[0]
1316 pio=system.iobus.master[5]
1317
1318 [system.realview.ide]
1319 type=IdeController
1320 BAR0=1
1321 BAR0LegacyIO=false
1322 BAR0Size=8
1323 BAR1=1
1324 BAR1LegacyIO=false
1325 BAR1Size=4
1326 BAR2=1
1327 BAR2LegacyIO=false
1328 BAR2Size=8
1329 BAR3=1
1330 BAR3LegacyIO=false
1331 BAR3Size=4
1332 BAR4=1
1333 BAR4LegacyIO=false
1334 BAR4Size=16
1335 BAR5=1
1336 BAR5LegacyIO=false
1337 BAR5Size=0
1338 BIST=0
1339 CacheLineSize=0
1340 CapabilityPtr=0
1341 CardbusCIS=0
1342 ClassCode=1
1343 Command=0
1344 DeviceID=28945
1345 ExpansionROM=0
1346 HeaderType=0
1347 InterruptLine=2
1348 InterruptPin=2
1349 LatencyTimer=0
1350 LegacyIOBase=0
1351 MSICAPBaseOffset=0
1352 MSICAPCapId=0
1353 MSICAPMaskBits=0
1354 MSICAPMsgAddr=0
1355 MSICAPMsgCtrl=0
1356 MSICAPMsgData=0
1357 MSICAPMsgUpperAddr=0
1358 MSICAPNextCapability=0
1359 MSICAPPendingBits=0
1360 MSIXCAPBaseOffset=0
1361 MSIXCAPCapId=0
1362 MSIXCAPNextCapability=0
1363 MSIXMsgCtrl=0
1364 MSIXPbaOffset=0
1365 MSIXTableOffset=0
1366 MaximumLatency=0
1367 MinimumGrant=0
1368 PMCAPBaseOffset=0
1369 PMCAPCapId=0
1370 PMCAPCapabilities=0
1371 PMCAPCtrlStatus=0
1372 PMCAPNextCapability=0
1373 PXCAPBaseOffset=0
1374 PXCAPCapId=0
1375 PXCAPCapabilities=0
1376 PXCAPDevCap2=0
1377 PXCAPDevCapabilities=0
1378 PXCAPDevCtrl=0
1379 PXCAPDevCtrl2=0
1380 PXCAPDevStatus=0
1381 PXCAPLinkCap=0
1382 PXCAPLinkCtrl=0
1383 PXCAPLinkStatus=0
1384 PXCAPNextCapability=0
1385 ProgIF=133
1386 Revision=0
1387 Status=640
1388 SubClassCode=1
1389 SubsystemID=0
1390 SubsystemVendorID=0
1391 VendorID=32902
1392 clk_domain=system.clk_domain
1393 config_latency=20000
1394 ctrl_offset=0
1395 disks=system.cf0
1396 eventq_index=0
1397 io_shift=0
1398 pci_bus=0
1399 pci_dev=1
1400 pci_func=0
1401 pio_latency=30000
1402 platform=system.realview
1403 system=system
1404 config=system.iobus.master[24]
1405 dma=system.iobus.slave[3]
1406 pio=system.iobus.master[23]
1407
1408 [system.realview.kmi0]
1409 type=Pl050
1410 amba_id=1314896
1411 clk_domain=system.clk_domain
1412 eventq_index=0
1413 gic=system.realview.gic
1414 int_delay=1000000
1415 int_num=44
1416 is_mouse=false
1417 pio_addr=470155264
1418 pio_latency=100000
1419 system=system
1420 vnc=system.vncserver
1421 pio=system.iobus.master[6]
1422
1423 [system.realview.kmi1]
1424 type=Pl050
1425 amba_id=1314896
1426 clk_domain=system.clk_domain
1427 eventq_index=0
1428 gic=system.realview.gic
1429 int_delay=1000000
1430 int_num=45
1431 is_mouse=true
1432 pio_addr=470220800
1433 pio_latency=100000
1434 system=system
1435 vnc=system.vncserver
1436 pio=system.iobus.master[7]
1437
1438 [system.realview.l2x0_fake]
1439 type=IsaFake
1440 clk_domain=system.clk_domain
1441 eventq_index=0
1442 fake_mem=false
1443 pio_addr=739246080
1444 pio_latency=100000
1445 pio_size=4095
1446 ret_bad_addr=false
1447 ret_data16=65535
1448 ret_data32=4294967295
1449 ret_data64=18446744073709551615
1450 ret_data8=255
1451 system=system
1452 update_data=false
1453 warn_access=
1454 pio=system.iobus.master[12]
1455
1456 [system.realview.lan_fake]
1457 type=IsaFake
1458 clk_domain=system.clk_domain
1459 eventq_index=0
1460 fake_mem=false
1461 pio_addr=436207616
1462 pio_latency=100000
1463 pio_size=65535
1464 ret_bad_addr=false
1465 ret_data16=65535
1466 ret_data32=4294967295
1467 ret_data64=18446744073709551615
1468 ret_data8=255
1469 system=system
1470 update_data=false
1471 warn_access=
1472 pio=system.iobus.master[19]
1473
1474 [system.realview.local_cpu_timer]
1475 type=CpuLocalTimer
1476 clk_domain=system.clk_domain
1477 eventq_index=0
1478 gic=system.realview.gic
1479 int_num_timer=29
1480 int_num_watchdog=30
1481 pio_addr=738721792
1482 pio_latency=100000
1483 system=system
1484 pio=system.membus.master[4]
1485
1486 [system.realview.mmc_fake]
1487 type=AmbaFake
1488 amba_id=0
1489 clk_domain=system.clk_domain
1490 eventq_index=0
1491 ignore_access=false
1492 pio_addr=470089728
1493 pio_latency=100000
1494 system=system
1495 pio=system.iobus.master[21]
1496
1497 [system.realview.nvmem]
1498 type=SimpleMemory
1499 bandwidth=73.000000
1500 clk_domain=system.clk_domain
1501 conf_table_reported=true
1502 eventq_index=0
1503 in_addr_map=true
1504 latency=30000
1505 latency_var=0
1506 null=false
1507 range=0:67108863
1508 port=system.membus.master[1]
1509
1510 [system.realview.pciconfig]
1511 type=PciConfigAll
1512 bus=0
1513 clk_domain=system.clk_domain
1514 eventq_index=0
1515 pio_addr=0
1516 pio_latency=30000
1517 platform=system.realview
1518 size=268435456
1519 system=system
1520 pio=system.iobus.default
1521
1522 [system.realview.realview_io]
1523 type=RealViewCtrl
1524 clk_domain=system.clk_domain
1525 eventq_index=0
1526 idreg=35979264
1527 pio_addr=469827584
1528 pio_latency=100000
1529 proc_id0=335544320
1530 proc_id1=335544320
1531 system=system
1532 pio=system.iobus.master[1]
1533
1534 [system.realview.rtc]
1535 type=PL031
1536 amba_id=3412017
1537 clk_domain=system.clk_domain
1538 eventq_index=0
1539 gic=system.realview.gic
1540 int_delay=100000
1541 int_num=36
1542 pio_addr=471269376
1543 pio_latency=100000
1544 system=system
1545 time=Thu Jan  1 00:00:00 2009
1546 pio=system.iobus.master[10]
1547
1548 [system.realview.sp810_fake]
1549 type=AmbaFake
1550 amba_id=0
1551 clk_domain=system.clk_domain
1552 eventq_index=0
1553 ignore_access=true
1554 pio_addr=469893120
1555 pio_latency=100000
1556 system=system
1557 pio=system.iobus.master[16]
1558
1559 [system.realview.timer0]
1560 type=Sp804
1561 amba_id=1316868
1562 clk_domain=system.clk_domain
1563 clock0=1000000
1564 clock1=1000000
1565 eventq_index=0
1566 gic=system.realview.gic
1567 int_num0=34
1568 int_num1=34
1569 pio_addr=470876160
1570 pio_latency=100000
1571 system=system
1572 pio=system.iobus.master[2]
1573
1574 [system.realview.timer1]
1575 type=Sp804
1576 amba_id=1316868
1577 clk_domain=system.clk_domain
1578 clock0=1000000
1579 clock1=1000000
1580 eventq_index=0
1581 gic=system.realview.gic
1582 int_num0=35
1583 int_num1=35
1584 pio_addr=470941696
1585 pio_latency=100000
1586 system=system
1587 pio=system.iobus.master[3]
1588
1589 [system.realview.uart]
1590 type=Pl011
1591 clk_domain=system.clk_domain
1592 end_on_eot=false
1593 eventq_index=0
1594 gic=system.realview.gic
1595 int_delay=100000
1596 int_num=37
1597 pio_addr=470351872
1598 pio_latency=100000
1599 platform=system.realview
1600 system=system
1601 terminal=system.terminal
1602 pio=system.iobus.master[0]
1603
1604 [system.realview.uart1_fake]
1605 type=AmbaFake
1606 amba_id=0
1607 clk_domain=system.clk_domain
1608 eventq_index=0
1609 ignore_access=false
1610 pio_addr=470417408
1611 pio_latency=100000
1612 system=system
1613 pio=system.iobus.master[13]
1614
1615 [system.realview.uart2_fake]
1616 type=AmbaFake
1617 amba_id=0
1618 clk_domain=system.clk_domain
1619 eventq_index=0
1620 ignore_access=false
1621 pio_addr=470482944
1622 pio_latency=100000
1623 system=system
1624 pio=system.iobus.master[14]
1625
1626 [system.realview.uart3_fake]
1627 type=AmbaFake
1628 amba_id=0
1629 clk_domain=system.clk_domain
1630 eventq_index=0
1631 ignore_access=false
1632 pio_addr=470548480
1633 pio_latency=100000
1634 system=system
1635 pio=system.iobus.master[15]
1636
1637 [system.realview.usb_fake]
1638 type=IsaFake
1639 clk_domain=system.clk_domain
1640 eventq_index=0
1641 fake_mem=false
1642 pio_addr=452984832
1643 pio_latency=100000
1644 pio_size=131071
1645 ret_bad_addr=false
1646 ret_data16=65535
1647 ret_data32=4294967295
1648 ret_data64=18446744073709551615
1649 ret_data8=255
1650 system=system
1651 update_data=false
1652 warn_access=
1653 pio=system.iobus.master[20]
1654
1655 [system.realview.vgic]
1656 type=VGic
1657 clk_domain=system.clk_domain
1658 eventq_index=0
1659 gic=system.realview.gic
1660 hv_addr=738213888
1661 pio_delay=10000
1662 platform=system.realview
1663 ppint=25
1664 system=system
1665 vcpu_addr=738222080
1666 pio=system.membus.master[3]
1667
1668 [system.realview.vram]
1669 type=SimpleMemory
1670 bandwidth=73.000000
1671 clk_domain=system.clk_domain
1672 conf_table_reported=false
1673 eventq_index=0
1674 in_addr_map=true
1675 latency=30000
1676 latency_var=0
1677 null=false
1678 range=402653184:436207615
1679 port=system.iobus.master[11]
1680
1681 [system.realview.watchdog_fake]
1682 type=AmbaFake
1683 amba_id=0
1684 clk_domain=system.clk_domain
1685 eventq_index=0
1686 ignore_access=false
1687 pio_addr=470745088
1688 pio_latency=100000
1689 system=system
1690 pio=system.iobus.master[17]
1691
1692 [system.terminal]
1693 type=Terminal
1694 eventq_index=0
1695 intr_control=system.intrctrl
1696 number=0
1697 output=true
1698 port=3456
1699
1700 [system.vncserver]
1701 type=VncServer
1702 eventq_index=0
1703 frame_capture=false
1704 number=0
1705 port=5900
1706
1707 [system.voltage_domain]
1708 type=VoltageDomain
1709 eventq_index=0
1710 voltage=1.000000
1711