8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=acpi_description_table_pointer apicbridge bridge clk_domain cpu cpu_clk_domain dvfs_handler e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table voltage_domain
14 acpi_description_table_pointer=system.acpi_description_table_pointer
15 boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
17 clk_domain=system.clk_domain
18 e820_table=system.e820_table
21 intel_mp_pointer=system.intel_mp_pointer
22 intel_mp_table=system.intel_mp_table
23 kernel=/work/gem5/dist/binaries/x86_64-vmlinux-2.6.22.9
24 kernel_addr_check=true
25 load_addr_mask=18446744073709551615
28 mem_ranges=0:134217727
29 memories=system.physmem
30 mmap_using_noreserve=false
33 readfile=/work/gem5/outgoing/gem5_2/tests/halt.sh
34 smbios_table=system.smbios_table
36 work_begin_ckpt_count=0
37 work_begin_cpu_id_exit=-1
38 work_begin_exit_count=0
39 work_cpus_ckpt_count=0
43 system_port=system.membus.slave[1]
45 [system.acpi_description_table_pointer]
52 xsdt=system.acpi_description_table_pointer.xsdt
54 [system.acpi_description_table_pointer.xsdt]
66 clk_domain=system.clk_domain
69 ranges=11529215046068469760:11529215046068473855
72 master=system.membus.slave[0]
73 slave=system.iobus.master[0]
77 clk_domain=system.clk_domain
80 ranges=3221225472:4294901760 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615
83 master=system.iobus.slave[0]
84 slave=system.membus.master[0]
92 voltage_domain=system.voltage_domain
96 children=apic_clk_domain branchPred dcache dtb dtb_walker_cache fuPool icache interrupts isa itb itb_walker_cache l2cache toL2Bus tracer
105 branchPred=system.cpu.branchPred
108 clk_domain=system.cpu_clk_domain
109 commitToDecodeDelay=1
112 commitToRenameDelay=1
116 decodeToRenameDelay=1
119 do_checkpoint_insts=true
121 do_statistics_insts=true
130 fuPool=system.cpu.fuPool
132 function_trace_start=0
137 interrupts=system.cpu.interrupts
139 issueToExecuteDelay=1
142 max_insts_all_threads=0
143 max_insts_any_thread=0
144 max_loads_all_threads=0
145 max_loads_any_thread=0
156 renameToDecodeDelay=1
161 simpoint_start_insts=
162 smtCommitPolicy=RoundRobin
163 smtFetchPolicy=SingleThread
164 smtIQPolicy=Partitioned
166 smtLSQPolicy=Partitioned
168 smtNumFetchingThreads=1
169 smtROBPolicy=Partitioned
173 store_set_clear_period=250000
176 tracer=system.cpu.tracer
180 dcache_port=system.cpu.dcache.cpu_side
181 icache_port=system.cpu.icache.cpu_side
183 [system.cpu.apic_clk_domain]
184 type=DerivedClockDomain
186 clk_domain=system.cpu_clk_domain
189 [system.cpu.branchPred]
195 choicePredictorSize=8192
198 globalPredictorSize=8192
201 localHistoryTableSize=2048
202 localPredictorSize=2048
208 addr_ranges=0:18446744073709551615
210 clk_domain=system.cpu_clk_domain
211 clusivity=mostly_incl
212 demand_mshr_reserve=1
219 prefetch_on_access=false
222 sequential_access=false
225 tags=system.cpu.dcache.tags
228 writeback_clean=false
229 cpu_side=system.cpu.dcache_port
230 mem_side=system.cpu.toL2Bus.slave[1]
232 [system.cpu.dcache.tags]
236 clk_domain=system.cpu_clk_domain
239 sequential_access=false
247 walker=system.cpu.dtb.walker
249 [system.cpu.dtb.walker]
250 type=X86PagetableWalker
251 clk_domain=system.cpu_clk_domain
253 num_squash_per_cycle=4
255 port=system.cpu.dtb_walker_cache.cpu_side
257 [system.cpu.dtb_walker_cache]
260 addr_ranges=0:18446744073709551615
262 clk_domain=system.cpu_clk_domain
263 clusivity=mostly_incl
264 demand_mshr_reserve=1
271 prefetch_on_access=false
274 sequential_access=false
277 tags=system.cpu.dtb_walker_cache.tags
280 writeback_clean=false
281 cpu_side=system.cpu.dtb.walker.port
282 mem_side=system.cpu.toL2Bus.slave[3]
284 [system.cpu.dtb_walker_cache.tags]
288 clk_domain=system.cpu_clk_domain
291 sequential_access=false
296 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
297 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
300 [system.cpu.fuPool.FUList0]
305 opList=system.cpu.fuPool.FUList0.opList
307 [system.cpu.fuPool.FUList0.opList]
314 [system.cpu.fuPool.FUList1]
316 children=opList0 opList1
319 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
321 [system.cpu.fuPool.FUList1.opList0]
328 [system.cpu.fuPool.FUList1.opList1]
335 [system.cpu.fuPool.FUList2]
337 children=opList0 opList1 opList2
340 opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
342 [system.cpu.fuPool.FUList2.opList0]
349 [system.cpu.fuPool.FUList2.opList1]
356 [system.cpu.fuPool.FUList2.opList2]
363 [system.cpu.fuPool.FUList3]
365 children=opList0 opList1 opList2
368 opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
370 [system.cpu.fuPool.FUList3.opList0]
377 [system.cpu.fuPool.FUList3.opList1]
384 [system.cpu.fuPool.FUList3.opList2]
391 [system.cpu.fuPool.FUList4]
396 opList=system.cpu.fuPool.FUList4.opList
398 [system.cpu.fuPool.FUList4.opList]
405 [system.cpu.fuPool.FUList5]
407 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
410 opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
412 [system.cpu.fuPool.FUList5.opList00]
419 [system.cpu.fuPool.FUList5.opList01]
426 [system.cpu.fuPool.FUList5.opList02]
433 [system.cpu.fuPool.FUList5.opList03]
440 [system.cpu.fuPool.FUList5.opList04]
447 [system.cpu.fuPool.FUList5.opList05]
454 [system.cpu.fuPool.FUList5.opList06]
461 [system.cpu.fuPool.FUList5.opList07]
468 [system.cpu.fuPool.FUList5.opList08]
475 [system.cpu.fuPool.FUList5.opList09]
482 [system.cpu.fuPool.FUList5.opList10]
489 [system.cpu.fuPool.FUList5.opList11]
496 [system.cpu.fuPool.FUList5.opList12]
503 [system.cpu.fuPool.FUList5.opList13]
510 [system.cpu.fuPool.FUList5.opList14]
517 [system.cpu.fuPool.FUList5.opList15]
524 [system.cpu.fuPool.FUList5.opList16]
527 opClass=SimdFloatMisc
531 [system.cpu.fuPool.FUList5.opList17]
534 opClass=SimdFloatMult
538 [system.cpu.fuPool.FUList5.opList18]
541 opClass=SimdFloatMultAcc
545 [system.cpu.fuPool.FUList5.opList19]
548 opClass=SimdFloatSqrt
552 [system.cpu.fuPool.FUList6]
557 opList=system.cpu.fuPool.FUList6.opList
559 [system.cpu.fuPool.FUList6.opList]
566 [system.cpu.fuPool.FUList7]
568 children=opList0 opList1
571 opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
573 [system.cpu.fuPool.FUList7.opList0]
580 [system.cpu.fuPool.FUList7.opList1]
587 [system.cpu.fuPool.FUList8]
592 opList=system.cpu.fuPool.FUList8.opList
594 [system.cpu.fuPool.FUList8.opList]
604 addr_ranges=0:18446744073709551615
606 clk_domain=system.cpu_clk_domain
607 clusivity=mostly_incl
608 demand_mshr_reserve=1
615 prefetch_on_access=false
618 sequential_access=false
621 tags=system.cpu.icache.tags
625 cpu_side=system.cpu.icache_port
626 mem_side=system.cpu.toL2Bus.slave[0]
628 [system.cpu.icache.tags]
632 clk_domain=system.cpu_clk_domain
635 sequential_access=false
638 [system.cpu.interrupts]
640 clk_domain=system.cpu.apic_clk_domain
643 pio_addr=2305843009213693952
646 int_master=system.membus.slave[3]
647 int_slave=system.membus.master[2]
648 pio=system.membus.master[1]
659 walker=system.cpu.itb.walker
661 [system.cpu.itb.walker]
662 type=X86PagetableWalker
663 clk_domain=system.cpu_clk_domain
665 num_squash_per_cycle=4
667 port=system.cpu.itb_walker_cache.cpu_side
669 [system.cpu.itb_walker_cache]
672 addr_ranges=0:18446744073709551615
674 clk_domain=system.cpu_clk_domain
675 clusivity=mostly_incl
676 demand_mshr_reserve=1
683 prefetch_on_access=false
686 sequential_access=false
689 tags=system.cpu.itb_walker_cache.tags
692 writeback_clean=false
693 cpu_side=system.cpu.itb.walker.port
694 mem_side=system.cpu.toL2Bus.slave[2]
696 [system.cpu.itb_walker_cache.tags]
700 clk_domain=system.cpu_clk_domain
703 sequential_access=false
709 addr_ranges=0:18446744073709551615
711 clk_domain=system.cpu_clk_domain
712 clusivity=mostly_incl
713 demand_mshr_reserve=1
720 prefetch_on_access=false
723 sequential_access=false
726 tags=system.cpu.l2cache.tags
729 writeback_clean=false
730 cpu_side=system.cpu.toL2Bus.master[0]
731 mem_side=system.membus.slave[2]
733 [system.cpu.l2cache.tags]
737 clk_domain=system.cpu_clk_domain
740 sequential_access=false
745 children=snoop_filter
746 clk_domain=system.cpu_clk_domain
751 snoop_filter=system.cpu.toL2Bus.snoop_filter
752 snoop_response_latency=1
754 use_default_range=false
756 master=system.cpu.l2cache.cpu_side
757 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
759 [system.cpu.toL2Bus.snoop_filter]
770 [system.cpu_clk_domain]
776 voltage_domain=system.voltage_domain
778 [system.dvfs_handler]
783 sys_clk_domain=system.clk_domain
784 transition_latency=100000000
788 children=entries0 entries1 entries2 entries3 entries4
789 entries=system.e820_table.entries0 system.e820_table.entries1 system.e820_table.entries2 system.e820_table.entries3 system.e820_table.entries4
792 [system.e820_table.entries0]
799 [system.e820_table.entries1]
806 [system.e820_table.entries2]
813 [system.e820_table.entries3]
820 [system.e820_table.entries4]
827 [system.intel_mp_pointer]
828 type=X86IntelMPFloatingPointer
834 [system.intel_mp_table]
835 type=X86IntelMPConfigTable
836 children=base_entries00 base_entries01 base_entries02 base_entries03 base_entries04 base_entries05 base_entries06 base_entries07 base_entries08 base_entries09 base_entries10 base_entries11 base_entries12 base_entries13 base_entries14 base_entries15 base_entries16 base_entries17 base_entries18 base_entries19 base_entries20 base_entries21 base_entries22 base_entries23 base_entries24 base_entries25 base_entries26 base_entries27 base_entries28 base_entries29 base_entries30 base_entries31 base_entries32 ext_entries
837 base_entries=system.intel_mp_table.base_entries00 system.intel_mp_table.base_entries01 system.intel_mp_table.base_entries02 system.intel_mp_table.base_entries03 system.intel_mp_table.base_entries04 system.intel_mp_table.base_entries05 system.intel_mp_table.base_entries06 system.intel_mp_table.base_entries07 system.intel_mp_table.base_entries08 system.intel_mp_table.base_entries09 system.intel_mp_table.base_entries10 system.intel_mp_table.base_entries11 system.intel_mp_table.base_entries12 system.intel_mp_table.base_entries13 system.intel_mp_table.base_entries14 system.intel_mp_table.base_entries15 system.intel_mp_table.base_entries16 system.intel_mp_table.base_entries17 system.intel_mp_table.base_entries18 system.intel_mp_table.base_entries19 system.intel_mp_table.base_entries20 system.intel_mp_table.base_entries21 system.intel_mp_table.base_entries22 system.intel_mp_table.base_entries23 system.intel_mp_table.base_entries24 system.intel_mp_table.base_entries25 system.intel_mp_table.base_entries26 system.intel_mp_table.base_entries27 system.intel_mp_table.base_entries28 system.intel_mp_table.base_entries29 system.intel_mp_table.base_entries30 system.intel_mp_table.base_entries31 system.intel_mp_table.base_entries32
839 ext_entries=system.intel_mp_table.ext_entries
840 local_apic=4276092928
847 [system.intel_mp_table.base_entries00]
848 type=X86IntelMPProcessor
855 local_apic_version=20
859 [system.intel_mp_table.base_entries01]
860 type=X86IntelMPIOAPIC
867 [system.intel_mp_table.base_entries02]
873 [system.intel_mp_table.base_entries03]
879 [system.intel_mp_table.base_entries04]
880 type=X86IntelMPIOIntAssignment
882 dest_io_apic_intin=16
885 polarity=ConformPolarity
888 trigger=ConformTrigger
890 [system.intel_mp_table.base_entries05]
891 type=X86IntelMPIOIntAssignment
895 interrupt_type=ExtInt
896 polarity=ConformPolarity
899 trigger=ConformTrigger
901 [system.intel_mp_table.base_entries06]
902 type=X86IntelMPIOIntAssignment
907 polarity=ConformPolarity
910 trigger=ConformTrigger
912 [system.intel_mp_table.base_entries07]
913 type=X86IntelMPIOIntAssignment
917 interrupt_type=ExtInt
918 polarity=ConformPolarity
921 trigger=ConformTrigger
923 [system.intel_mp_table.base_entries08]
924 type=X86IntelMPIOIntAssignment
929 polarity=ConformPolarity
932 trigger=ConformTrigger
934 [system.intel_mp_table.base_entries09]
935 type=X86IntelMPIOIntAssignment
939 interrupt_type=ExtInt
940 polarity=ConformPolarity
943 trigger=ConformTrigger
945 [system.intel_mp_table.base_entries10]
946 type=X86IntelMPIOIntAssignment
951 polarity=ConformPolarity
954 trigger=ConformTrigger
956 [system.intel_mp_table.base_entries11]
957 type=X86IntelMPIOIntAssignment
961 interrupt_type=ExtInt
962 polarity=ConformPolarity
965 trigger=ConformTrigger
967 [system.intel_mp_table.base_entries12]
968 type=X86IntelMPIOIntAssignment
973 polarity=ConformPolarity
976 trigger=ConformTrigger
978 [system.intel_mp_table.base_entries13]
979 type=X86IntelMPIOIntAssignment
983 interrupt_type=ExtInt
984 polarity=ConformPolarity
987 trigger=ConformTrigger
989 [system.intel_mp_table.base_entries14]
990 type=X86IntelMPIOIntAssignment
995 polarity=ConformPolarity
998 trigger=ConformTrigger
1000 [system.intel_mp_table.base_entries15]
1001 type=X86IntelMPIOIntAssignment
1003 dest_io_apic_intin=0
1005 interrupt_type=ExtInt
1006 polarity=ConformPolarity
1009 trigger=ConformTrigger
1011 [system.intel_mp_table.base_entries16]
1012 type=X86IntelMPIOIntAssignment
1014 dest_io_apic_intin=6
1017 polarity=ConformPolarity
1020 trigger=ConformTrigger
1022 [system.intel_mp_table.base_entries17]
1023 type=X86IntelMPIOIntAssignment
1025 dest_io_apic_intin=0
1027 interrupt_type=ExtInt
1028 polarity=ConformPolarity
1031 trigger=ConformTrigger
1033 [system.intel_mp_table.base_entries18]
1034 type=X86IntelMPIOIntAssignment
1036 dest_io_apic_intin=7
1039 polarity=ConformPolarity
1042 trigger=ConformTrigger
1044 [system.intel_mp_table.base_entries19]
1045 type=X86IntelMPIOIntAssignment
1047 dest_io_apic_intin=0
1049 interrupt_type=ExtInt
1050 polarity=ConformPolarity
1053 trigger=ConformTrigger
1055 [system.intel_mp_table.base_entries20]
1056 type=X86IntelMPIOIntAssignment
1058 dest_io_apic_intin=8
1061 polarity=ConformPolarity
1064 trigger=ConformTrigger
1066 [system.intel_mp_table.base_entries21]
1067 type=X86IntelMPIOIntAssignment
1069 dest_io_apic_intin=0
1071 interrupt_type=ExtInt
1072 polarity=ConformPolarity
1075 trigger=ConformTrigger
1077 [system.intel_mp_table.base_entries22]
1078 type=X86IntelMPIOIntAssignment
1080 dest_io_apic_intin=9
1083 polarity=ConformPolarity
1086 trigger=ConformTrigger
1088 [system.intel_mp_table.base_entries23]
1089 type=X86IntelMPIOIntAssignment
1091 dest_io_apic_intin=0
1093 interrupt_type=ExtInt
1094 polarity=ConformPolarity
1097 trigger=ConformTrigger
1099 [system.intel_mp_table.base_entries24]
1100 type=X86IntelMPIOIntAssignment
1102 dest_io_apic_intin=10
1105 polarity=ConformPolarity
1108 trigger=ConformTrigger
1110 [system.intel_mp_table.base_entries25]
1111 type=X86IntelMPIOIntAssignment
1113 dest_io_apic_intin=0
1115 interrupt_type=ExtInt
1116 polarity=ConformPolarity
1119 trigger=ConformTrigger
1121 [system.intel_mp_table.base_entries26]
1122 type=X86IntelMPIOIntAssignment
1124 dest_io_apic_intin=11
1127 polarity=ConformPolarity
1130 trigger=ConformTrigger
1132 [system.intel_mp_table.base_entries27]
1133 type=X86IntelMPIOIntAssignment
1135 dest_io_apic_intin=0
1137 interrupt_type=ExtInt
1138 polarity=ConformPolarity
1141 trigger=ConformTrigger
1143 [system.intel_mp_table.base_entries28]
1144 type=X86IntelMPIOIntAssignment
1146 dest_io_apic_intin=12
1149 polarity=ConformPolarity
1152 trigger=ConformTrigger
1154 [system.intel_mp_table.base_entries29]
1155 type=X86IntelMPIOIntAssignment
1157 dest_io_apic_intin=0
1159 interrupt_type=ExtInt
1160 polarity=ConformPolarity
1163 trigger=ConformTrigger
1165 [system.intel_mp_table.base_entries30]
1166 type=X86IntelMPIOIntAssignment
1168 dest_io_apic_intin=13
1171 polarity=ConformPolarity
1174 trigger=ConformTrigger
1176 [system.intel_mp_table.base_entries31]
1177 type=X86IntelMPIOIntAssignment
1179 dest_io_apic_intin=0
1181 interrupt_type=ExtInt
1182 polarity=ConformPolarity
1185 trigger=ConformTrigger
1187 [system.intel_mp_table.base_entries32]
1188 type=X86IntelMPIOIntAssignment
1190 dest_io_apic_intin=14
1193 polarity=ConformPolarity
1196 trigger=ConformTrigger
1198 [system.intel_mp_table.ext_entries]
1199 type=X86IntelMPBusHierarchy
1203 subtractive_decode=true
1211 type=NoncoherentXBar
1212 clk_domain=system.clk_domain
1217 use_default_range=false
1219 default=system.pc.pci_host.pio
1220 master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist1.pio system.pc.i_dont_exist2.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side
1221 slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master
1226 addr_ranges=0:134217727
1228 clk_domain=system.clk_domain
1229 clusivity=mostly_incl
1230 demand_mshr_reserve=1
1232 forward_snoops=false
1237 prefetch_on_access=false
1240 sequential_access=false
1243 tags=system.iocache.tags
1246 writeback_clean=false
1247 cpu_side=system.iobus.master[18]
1248 mem_side=system.membus.slave[4]
1250 [system.iocache.tags]
1254 clk_domain=system.clk_domain
1257 sequential_access=false
1262 children=badaddr_responder
1263 clk_domain=system.clk_domain
1269 snoop_response_latency=4
1271 use_default_range=false
1273 default=system.membus.badaddr_responder.pio
1274 master=system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave system.physmem.port
1275 slave=system.apicbridge.master system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master system.iocache.mem_side
1277 [system.membus.badaddr_responder]
1279 clk_domain=system.clk_domain
1287 ret_data32=4294967295
1288 ret_data64=18446744073709551615
1293 pio=system.membus.default
1297 children=behind_pci com_1 fake_com_2 fake_com_3 fake_com_4 fake_floppy i_dont_exist1 i_dont_exist2 pci_host south_bridge
1299 intrctrl=system.intrctrl
1302 [system.pc.behind_pci]
1304 clk_domain=system.clk_domain
1307 pio_addr=9223372036854779128
1312 ret_data32=4294967295
1313 ret_data64=18446744073709551615
1318 pio=system.iobus.master[12]
1323 clk_domain=system.clk_domain
1325 pio_addr=9223372036854776824
1329 terminal=system.pc.com_1.terminal
1330 pio=system.iobus.master[13]
1332 [system.pc.com_1.terminal]
1335 intr_control=system.intrctrl
1340 [system.pc.fake_com_2]
1342 clk_domain=system.clk_domain
1345 pio_addr=9223372036854776568
1350 ret_data32=4294967295
1351 ret_data64=18446744073709551615
1356 pio=system.iobus.master[14]
1358 [system.pc.fake_com_3]
1360 clk_domain=system.clk_domain
1363 pio_addr=9223372036854776808
1368 ret_data32=4294967295
1369 ret_data64=18446744073709551615
1374 pio=system.iobus.master[15]
1376 [system.pc.fake_com_4]
1378 clk_domain=system.clk_domain
1381 pio_addr=9223372036854776552
1386 ret_data32=4294967295
1387 ret_data64=18446744073709551615
1392 pio=system.iobus.master[16]
1394 [system.pc.fake_floppy]
1396 clk_domain=system.clk_domain
1399 pio_addr=9223372036854776818
1404 ret_data32=4294967295
1405 ret_data64=18446744073709551615
1410 pio=system.iobus.master[17]
1412 [system.pc.i_dont_exist1]
1414 clk_domain=system.clk_domain
1417 pio_addr=9223372036854775936
1422 ret_data32=4294967295
1423 ret_data64=18446744073709551615
1428 pio=system.iobus.master[10]
1430 [system.pc.i_dont_exist2]
1432 clk_domain=system.clk_domain
1435 pio_addr=9223372036854776045
1440 ret_data32=4294967295
1441 ret_data64=18446744073709551615
1446 pio=system.iobus.master[11]
1448 [system.pc.pci_host]
1450 clk_domain=system.clk_domain
1451 conf_base=13835058055282163712
1457 pci_pio_base=9223372036854775808
1460 pio=system.iobus.default
1462 [system.pc.south_bridge]
1464 children=cmos dma1 ide int_lines0 int_lines1 int_lines2 int_lines3 int_lines4 int_lines5 int_lines6 io_apic keyboard pic1 pic2 pit speaker
1465 cmos=system.pc.south_bridge.cmos
1466 dma1=system.pc.south_bridge.dma1
1468 io_apic=system.pc.south_bridge.io_apic
1469 keyboard=system.pc.south_bridge.keyboard
1470 pic1=system.pc.south_bridge.pic1
1471 pic2=system.pc.south_bridge.pic2
1472 pit=system.pc.south_bridge.pit
1474 speaker=system.pc.south_bridge.speaker
1476 [system.pc.south_bridge.cmos]
1479 clk_domain=system.clk_domain
1481 int_pin=system.pc.south_bridge.cmos.int_pin
1482 pio_addr=9223372036854775920
1485 time=Sun Jan 1 00:00:00 2012
1486 pio=system.iobus.master[1]
1488 [system.pc.south_bridge.cmos.int_pin]
1489 type=X86IntSourcePin
1492 [system.pc.south_bridge.dma1]
1494 clk_domain=system.clk_domain
1496 pio_addr=9223372036854775808
1499 pio=system.iobus.master[2]
1501 [system.pc.south_bridge.ide]
1503 children=disks0 disks1
1534 LegacyIOBase=9223372036854775808
1541 MSICAPMsgUpperAddr=0
1542 MSICAPNextCapability=0
1546 MSIXCAPNextCapability=0
1556 PMCAPNextCapability=0
1561 PXCAPDevCapabilities=0
1568 PXCAPNextCapability=0
1576 clk_domain=system.clk_domain
1577 config_latency=20000
1579 disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
1581 host=system.pc.pci_host
1588 dma=system.iobus.slave[1]
1589 pio=system.iobus.master[3]
1591 [system.pc.south_bridge.ide.disks0]
1597 image=system.pc.south_bridge.ide.disks0.image
1599 [system.pc.south_bridge.ide.disks0.image]
1602 child=system.pc.south_bridge.ide.disks0.image.child
1608 [system.pc.south_bridge.ide.disks0.image.child]
1611 image_file=/work/gem5/dist/disks/linux-x86.img
1614 [system.pc.south_bridge.ide.disks1]
1620 image=system.pc.south_bridge.ide.disks1.image
1622 [system.pc.south_bridge.ide.disks1.image]
1625 child=system.pc.south_bridge.ide.disks1.image.child
1631 [system.pc.south_bridge.ide.disks1.image.child]
1634 image_file=/work/gem5/dist/disks/linux-bigswap2.img
1637 [system.pc.south_bridge.int_lines0]
1641 sink=system.pc.south_bridge.int_lines0.sink
1642 source=system.pc.south_bridge.pic1.output
1644 [system.pc.south_bridge.int_lines0.sink]
1646 device=system.pc.south_bridge.io_apic
1650 [system.pc.south_bridge.int_lines1]
1654 sink=system.pc.south_bridge.int_lines1.sink
1655 source=system.pc.south_bridge.pic2.output
1657 [system.pc.south_bridge.int_lines1.sink]
1659 device=system.pc.south_bridge.pic1
1663 [system.pc.south_bridge.int_lines2]
1667 sink=system.pc.south_bridge.int_lines2.sink
1668 source=system.pc.south_bridge.cmos.int_pin
1670 [system.pc.south_bridge.int_lines2.sink]
1672 device=system.pc.south_bridge.pic2
1676 [system.pc.south_bridge.int_lines3]
1680 sink=system.pc.south_bridge.int_lines3.sink
1681 source=system.pc.south_bridge.pit.int_pin
1683 [system.pc.south_bridge.int_lines3.sink]
1685 device=system.pc.south_bridge.pic1
1689 [system.pc.south_bridge.int_lines4]
1693 sink=system.pc.south_bridge.int_lines4.sink
1694 source=system.pc.south_bridge.pit.int_pin
1696 [system.pc.south_bridge.int_lines4.sink]
1698 device=system.pc.south_bridge.io_apic
1702 [system.pc.south_bridge.int_lines5]
1706 sink=system.pc.south_bridge.int_lines5.sink
1707 source=system.pc.south_bridge.keyboard.keyboard_int_pin
1709 [system.pc.south_bridge.int_lines5.sink]
1711 device=system.pc.south_bridge.io_apic
1715 [system.pc.south_bridge.int_lines6]
1719 sink=system.pc.south_bridge.int_lines6.sink
1720 source=system.pc.south_bridge.keyboard.mouse_int_pin
1722 [system.pc.south_bridge.int_lines6.sink]
1724 device=system.pc.south_bridge.io_apic
1728 [system.pc.south_bridge.io_apic]
1731 clk_domain=system.clk_domain
1733 external_int_pic=system.pc.south_bridge.pic1
1738 int_master=system.iobus.slave[2]
1739 pio=system.iobus.master[9]
1741 [system.pc.south_bridge.keyboard]
1743 children=keyboard_int_pin mouse_int_pin
1744 clk_domain=system.clk_domain
1745 command_port=9223372036854775908
1746 data_port=9223372036854775904
1748 keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
1749 mouse_int_pin=system.pc.south_bridge.keyboard.mouse_int_pin
1753 pio=system.iobus.master[4]
1755 [system.pc.south_bridge.keyboard.keyboard_int_pin]
1756 type=X86IntSourcePin
1759 [system.pc.south_bridge.keyboard.mouse_int_pin]
1760 type=X86IntSourcePin
1763 [system.pc.south_bridge.pic1]
1766 clk_domain=system.clk_domain
1769 output=system.pc.south_bridge.pic1.output
1770 pio_addr=9223372036854775840
1772 slave=system.pc.south_bridge.pic2
1774 pio=system.iobus.master[5]
1776 [system.pc.south_bridge.pic1.output]
1777 type=X86IntSourcePin
1780 [system.pc.south_bridge.pic2]
1783 clk_domain=system.clk_domain
1786 output=system.pc.south_bridge.pic2.output
1787 pio_addr=9223372036854775968
1791 pio=system.iobus.master[6]
1793 [system.pc.south_bridge.pic2.output]
1794 type=X86IntSourcePin
1797 [system.pc.south_bridge.pit]
1800 clk_domain=system.clk_domain
1802 int_pin=system.pc.south_bridge.pit.int_pin
1803 pio_addr=9223372036854775872
1806 pio=system.iobus.master[7]
1808 [system.pc.south_bridge.pit.int_pin]
1809 type=X86IntSourcePin
1812 [system.pc.south_bridge.speaker]
1814 clk_domain=system.clk_domain
1816 i8254=system.pc.south_bridge.pit
1817 pio_addr=9223372036854775905
1820 pio=system.iobus.master[8]
1849 addr_mapping=RoRaBaCoCh
1850 bank_groups_per_rank=0
1854 clk_domain=system.clk_domain
1855 conf_table_reported=true
1857 device_rowbuffer_size=1024
1858 device_size=536870912
1863 max_accesses_per_row=16
1864 mem_sched_policy=frfcfs
1865 min_writes_per_switch=16
1867 page_policy=open_adaptive
1871 static_backend_latency=10000
1872 static_frontend_latency=10000
1894 write_buffer_size=64
1895 write_high_thresh_perc=85
1896 write_low_thresh_perc=50
1897 port=system.membus.master[3]
1899 [system.smbios_table]
1900 type=X86SMBiosSMBiosTable
1905 structures=system.smbios_table.structures
1907 [system.smbios_table.structures]
1908 type=X86SMBiosBiosInformation
1909 characteristic_ext_bytes=
1911 emb_cont_firmware_major=0
1912 emb_cont_firmware_minor=0
1916 release_date=06/08/2008
1918 starting_addr_segment=0
1922 [system.voltage_domain]