tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 full_system=true
   5 time_sync_enable=false
   6 time_sync_period=100000000000
   7 time_sync_spin_threshold=100000000
   8
   9 [system]
  10 type=LinuxX86System
  11 children=acpi_description_table_pointer apicbridge bridge clk_domain cpu cpu_clk_domain e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table voltage_domain
  12 acpi_description_table_pointer=system.acpi_description_table_pointer
  13 boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
  14 cache_line_size=64
  15 clk_domain=system.clk_domain
  16 e820_table=system.e820_table
  17 init_param=0
  18 intel_mp_pointer=system.intel_mp_pointer
  19 intel_mp_table=system.intel_mp_table
  20 kernel=/scratch/andreas/m5/binaries/x86_64-vmlinux-2.6.22.9
  21 load_addr_mask=18446744073709551615
  22 mem_mode=timing
  23 mem_ranges=0:134217727
  24 memories=system.physmem
  25 num_work_ids=16
  26 readfile=tests/halt.sh
  27 smbios_table=system.smbios_table
  28 symbolfile=
  29 work_begin_ckpt_count=0
  30 work_begin_cpu_id_exit=-1
  31 work_begin_exit_count=0
  32 work_cpus_ckpt_count=0
  33 work_end_ckpt_count=0
  34 work_end_exit_count=0
  35 work_item_id=-1
  36 system_port=system.membus.slave[1]
  37
  38 [system.acpi_description_table_pointer]
  39 type=X86ACPIRSDP
  40 children=xsdt
  41 oem_id=
  42 revision=2
  43 rsdt=Null
  44 xsdt=system.acpi_description_table_pointer.xsdt
  45
  46 [system.acpi_description_table_pointer.xsdt]
  47 type=X86ACPIXSDT
  48 creator_id=
  49 creator_revision=0
  50 entries=
  51 oem_id=
  52 oem_revision=0
  53 oem_table_id=
  54
  55 [system.apicbridge]
  56 type=Bridge
  57 clk_domain=system.clk_domain
  58 delay=50000
  59 ranges=11529215046068469760:11529215046068473855
  60 req_size=16
  61 resp_size=16
  62 master=system.membus.slave[0]
  63 slave=system.iobus.master[0]
  64
  65 [system.bridge]
  66 type=Bridge
  67 clk_domain=system.clk_domain
  68 delay=50000
  69 ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615
  70 req_size=16
  71 resp_size=16
  72 master=system.iobus.slave[0]
  73 slave=system.membus.master[0]
  74
  75 [system.clk_domain]
  76 type=SrcClockDomain
  77 clock=1000
  78 voltage_domain=system.voltage_domain
  79
  80 [system.cpu]
  81 type=DerivO3CPU
  82 children=apic_clk_domain branchPred dcache dtb dtb_walker_cache fuPool icache interrupts isa itb itb_walker_cache l2cache toL2Bus tracer
  83 LFSTSize=1024
  84 LQEntries=32
  85 LSQCheckLoads=true
  86 LSQDepCheckShift=4
  87 SQEntries=32
  88 SSITSize=1024
  89 activity=0
  90 backComSize=5
  91 branchPred=system.cpu.branchPred
  92 cachePorts=200
  93 checker=Null
  94 clk_domain=system.cpu_clk_domain
  95 commitToDecodeDelay=1
  96 commitToFetchDelay=1
  97 commitToIEWDelay=1
  98 commitToRenameDelay=1
  99 commitWidth=8
 100 cpu_id=0
 101 decodeToFetchDelay=1
 102 decodeToRenameDelay=1
 103 decodeWidth=8
 104 dispatchWidth=8
 105 do_checkpoint_insts=true
 106 do_quiesce=true
 107 do_statistics_insts=true
 108 dtb=system.cpu.dtb
 109 fetchToDecodeDelay=1
 110 fetchTrapLatency=1
 111 fetchWidth=8
 112 forwardComSize=5
 113 fuPool=system.cpu.fuPool
 114 function_trace=false
 115 function_trace_start=0
 116 iewToCommitDelay=1
 117 iewToDecodeDelay=1
 118 iewToFetchDelay=1
 119 iewToRenameDelay=1
 120 interrupts=system.cpu.interrupts
 121 isa=system.cpu.isa
 122 issueToExecuteDelay=1
 123 issueWidth=8
 124 itb=system.cpu.itb
 125 max_insts_all_threads=0
 126 max_insts_any_thread=0
 127 max_loads_all_threads=0
 128 max_loads_any_thread=0
 129 needsTSO=true
 130 numIQEntries=64
 131 numPhysFloatRegs=256
 132 numPhysIntRegs=256
 133 numROBEntries=192
 134 numRobs=1
 135 numThreads=1
 136 profile=0
 137 progress_interval=0
 138 renameToDecodeDelay=1
 139 renameToFetchDelay=1
 140 renameToIEWDelay=2
 141 renameToROBDelay=1
 142 renameWidth=8
 143 simpoint_start_insts=
 144 smtCommitPolicy=RoundRobin
 145 smtFetchPolicy=SingleThread
 146 smtIQPolicy=Partitioned
 147 smtIQThreshold=100
 148 smtLSQPolicy=Partitioned
 149 smtLSQThreshold=100
 150 smtNumFetchingThreads=1
 151 smtROBPolicy=Partitioned
 152 smtROBThreshold=100
 153 squashWidth=8
 154 store_set_clear_period=250000
 155 switched_out=false
 156 system=system
 157 tracer=system.cpu.tracer
 158 trapLatency=13
 159 wbDepth=1
 160 wbWidth=8
 161 workload=
 162 dcache_port=system.cpu.dcache.cpu_side
 163 icache_port=system.cpu.icache.cpu_side
 164
 165 [system.cpu.apic_clk_domain]
 166 type=DerivedClockDomain
 167 clk_divider=16
 168 clk_domain=system.cpu_clk_domain
 169
 170 [system.cpu.branchPred]
 171 type=BranchPredictor
 172 BTBEntries=4096
 173 BTBTagSize=16
 174 RASSize=16
 175 choiceCtrBits=2
 176 choicePredictorSize=8192
 177 globalCtrBits=2
 178 globalPredictorSize=8192
 179 instShiftAmt=2
 180 localCtrBits=2
 181 localHistoryTableSize=2048
 182 localPredictorSize=2048
 183 numThreads=1
 184 predType=tournament
 185
 186 [system.cpu.dcache]
 187 type=BaseCache
 188 children=tags
 189 addr_ranges=0:18446744073709551615
 190 assoc=4
 191 clk_domain=system.cpu_clk_domain
 192 forward_snoops=true
 193 hit_latency=2
 194 is_top_level=true
 195 max_miss_count=0
 196 mshrs=4
 197 prefetch_on_access=false
 198 prefetcher=Null
 199 response_latency=2
 200 size=32768
 201 system=system
 202 tags=system.cpu.dcache.tags
 203 tgts_per_mshr=20
 204 two_queue=false
 205 write_buffers=8
 206 cpu_side=system.cpu.dcache_port
 207 mem_side=system.cpu.toL2Bus.slave[1]
 208
 209 [system.cpu.dcache.tags]
 210 type=LRU
 211 assoc=4
 212 block_size=64
 213 clk_domain=system.cpu_clk_domain
 214 hit_latency=2
 215 size=32768
 216
 217 [system.cpu.dtb]
 218 type=X86TLB
 219 children=walker
 220 size=64
 221 walker=system.cpu.dtb.walker
 222
 223 [system.cpu.dtb.walker]
 224 type=X86PagetableWalker
 225 clk_domain=system.cpu_clk_domain
 226 num_squash_per_cycle=4
 227 system=system
 228 port=system.cpu.dtb_walker_cache.cpu_side
 229
 230 [system.cpu.dtb_walker_cache]
 231 type=BaseCache
 232 children=tags
 233 addr_ranges=0:18446744073709551615
 234 assoc=2
 235 clk_domain=system.cpu_clk_domain
 236 forward_snoops=true
 237 hit_latency=2
 238 is_top_level=true
 239 max_miss_count=0
 240 mshrs=10
 241 prefetch_on_access=false
 242 prefetcher=Null
 243 response_latency=2
 244 size=1024
 245 system=system
 246 tags=system.cpu.dtb_walker_cache.tags
 247 tgts_per_mshr=12
 248 two_queue=false
 249 write_buffers=8
 250 cpu_side=system.cpu.dtb.walker.port
 251 mem_side=system.cpu.toL2Bus.slave[3]
 252
 253 [system.cpu.dtb_walker_cache.tags]
 254 type=LRU
 255 assoc=2
 256 block_size=64
 257 clk_domain=system.cpu_clk_domain
 258 hit_latency=2
 259 size=1024
 260
 261 [system.cpu.fuPool]
 262 type=FUPool
 263 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
 264 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
 265
 266 [system.cpu.fuPool.FUList0]
 267 type=FUDesc
 268 children=opList
 269 count=6
 270 opList=system.cpu.fuPool.FUList0.opList
 271
 272 [system.cpu.fuPool.FUList0.opList]
 273 type=OpDesc
 274 issueLat=1
 275 opClass=IntAlu
 276 opLat=1
 277
 278 [system.cpu.fuPool.FUList1]
 279 type=FUDesc
 280 children=opList0 opList1
 281 count=2
 282 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
 283
 284 [system.cpu.fuPool.FUList1.opList0]
 285 type=OpDesc
 286 issueLat=1
 287 opClass=IntMult
 288 opLat=3
 289
 290 [system.cpu.fuPool.FUList1.opList1]
 291 type=OpDesc
 292 issueLat=19
 293 opClass=IntDiv
 294 opLat=20
 295
 296 [system.cpu.fuPool.FUList2]
 297 type=FUDesc
 298 children=opList0 opList1 opList2
 299 count=4
 300 opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
 301
 302 [system.cpu.fuPool.FUList2.opList0]
 303 type=OpDesc
 304 issueLat=1
 305 opClass=FloatAdd
 306 opLat=2
 307
 308 [system.cpu.fuPool.FUList2.opList1]
 309 type=OpDesc
 310 issueLat=1
 311 opClass=FloatCmp
 312 opLat=2
 313
 314 [system.cpu.fuPool.FUList2.opList2]
 315 type=OpDesc
 316 issueLat=1
 317 opClass=FloatCvt
 318 opLat=2
 319
 320 [system.cpu.fuPool.FUList3]
 321 type=FUDesc
 322 children=opList0 opList1 opList2
 323 count=2
 324 opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
 325
 326 [system.cpu.fuPool.FUList3.opList0]
 327 type=OpDesc
 328 issueLat=1
 329 opClass=FloatMult
 330 opLat=4
 331
 332 [system.cpu.fuPool.FUList3.opList1]
 333 type=OpDesc
 334 issueLat=12
 335 opClass=FloatDiv
 336 opLat=12
 337
 338 [system.cpu.fuPool.FUList3.opList2]
 339 type=OpDesc
 340 issueLat=24
 341 opClass=FloatSqrt
 342 opLat=24
 343
 344 [system.cpu.fuPool.FUList4]
 345 type=FUDesc
 346 children=opList
 347 count=0
 348 opList=system.cpu.fuPool.FUList4.opList
 349
 350 [system.cpu.fuPool.FUList4.opList]
 351 type=OpDesc
 352 issueLat=1
 353 opClass=MemRead
 354 opLat=1
 355
 356 [system.cpu.fuPool.FUList5]
 357 type=FUDesc
 358 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
 359 count=4
 360 opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
 361
 362 [system.cpu.fuPool.FUList5.opList00]
 363 type=OpDesc
 364 issueLat=1
 365 opClass=SimdAdd
 366 opLat=1
 367
 368 [system.cpu.fuPool.FUList5.opList01]
 369 type=OpDesc
 370 issueLat=1
 371 opClass=SimdAddAcc
 372 opLat=1
 373
 374 [system.cpu.fuPool.FUList5.opList02]
 375 type=OpDesc
 376 issueLat=1
 377 opClass=SimdAlu
 378 opLat=1
 379
 380 [system.cpu.fuPool.FUList5.opList03]
 381 type=OpDesc
 382 issueLat=1
 383 opClass=SimdCmp
 384 opLat=1
 385
 386 [system.cpu.fuPool.FUList5.opList04]
 387 type=OpDesc
 388 issueLat=1
 389 opClass=SimdCvt
 390 opLat=1
 391
 392 [system.cpu.fuPool.FUList5.opList05]
 393 type=OpDesc
 394 issueLat=1
 395 opClass=SimdMisc
 396 opLat=1
 397
 398 [system.cpu.fuPool.FUList5.opList06]
 399 type=OpDesc
 400 issueLat=1
 401 opClass=SimdMult
 402 opLat=1
 403
 404 [system.cpu.fuPool.FUList5.opList07]
 405 type=OpDesc
 406 issueLat=1
 407 opClass=SimdMultAcc
 408 opLat=1
 409
 410 [system.cpu.fuPool.FUList5.opList08]
 411 type=OpDesc
 412 issueLat=1
 413 opClass=SimdShift
 414 opLat=1
 415
 416 [system.cpu.fuPool.FUList5.opList09]
 417 type=OpDesc
 418 issueLat=1
 419 opClass=SimdShiftAcc
 420 opLat=1
 421
 422 [system.cpu.fuPool.FUList5.opList10]
 423 type=OpDesc
 424 issueLat=1
 425 opClass=SimdSqrt
 426 opLat=1
 427
 428 [system.cpu.fuPool.FUList5.opList11]
 429 type=OpDesc
 430 issueLat=1
 431 opClass=SimdFloatAdd
 432 opLat=1
 433
 434 [system.cpu.fuPool.FUList5.opList12]
 435 type=OpDesc
 436 issueLat=1
 437 opClass=SimdFloatAlu
 438 opLat=1
 439
 440 [system.cpu.fuPool.FUList5.opList13]
 441 type=OpDesc
 442 issueLat=1
 443 opClass=SimdFloatCmp
 444 opLat=1
 445
 446 [system.cpu.fuPool.FUList5.opList14]
 447 type=OpDesc
 448 issueLat=1
 449 opClass=SimdFloatCvt
 450 opLat=1
 451
 452 [system.cpu.fuPool.FUList5.opList15]
 453 type=OpDesc
 454 issueLat=1
 455 opClass=SimdFloatDiv
 456 opLat=1
 457
 458 [system.cpu.fuPool.FUList5.opList16]
 459 type=OpDesc
 460 issueLat=1
 461 opClass=SimdFloatMisc
 462 opLat=1
 463
 464 [system.cpu.fuPool.FUList5.opList17]
 465 type=OpDesc
 466 issueLat=1
 467 opClass=SimdFloatMult
 468 opLat=1
 469
 470 [system.cpu.fuPool.FUList5.opList18]
 471 type=OpDesc
 472 issueLat=1
 473 opClass=SimdFloatMultAcc
 474 opLat=1
 475
 476 [system.cpu.fuPool.FUList5.opList19]
 477 type=OpDesc
 478 issueLat=1
 479 opClass=SimdFloatSqrt
 480 opLat=1
 481
 482 [system.cpu.fuPool.FUList6]
 483 type=FUDesc
 484 children=opList
 485 count=0
 486 opList=system.cpu.fuPool.FUList6.opList
 487
 488 [system.cpu.fuPool.FUList6.opList]
 489 type=OpDesc
 490 issueLat=1
 491 opClass=MemWrite
 492 opLat=1
 493
 494 [system.cpu.fuPool.FUList7]
 495 type=FUDesc
 496 children=opList0 opList1
 497 count=4
 498 opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
 499
 500 [system.cpu.fuPool.FUList7.opList0]
 501 type=OpDesc
 502 issueLat=1
 503 opClass=MemRead
 504 opLat=1
 505
 506 [system.cpu.fuPool.FUList7.opList1]
 507 type=OpDesc
 508 issueLat=1
 509 opClass=MemWrite
 510 opLat=1
 511
 512 [system.cpu.fuPool.FUList8]
 513 type=FUDesc
 514 children=opList
 515 count=1
 516 opList=system.cpu.fuPool.FUList8.opList
 517
 518 [system.cpu.fuPool.FUList8.opList]
 519 type=OpDesc
 520 issueLat=3
 521 opClass=IprAccess
 522 opLat=3
 523
 524 [system.cpu.icache]
 525 type=BaseCache
 526 children=tags
 527 addr_ranges=0:18446744073709551615
 528 assoc=1
 529 clk_domain=system.cpu_clk_domain
 530 forward_snoops=true
 531 hit_latency=2
 532 is_top_level=true
 533 max_miss_count=0
 534 mshrs=4
 535 prefetch_on_access=false
 536 prefetcher=Null
 537 response_latency=2
 538 size=32768
 539 system=system
 540 tags=system.cpu.icache.tags
 541 tgts_per_mshr=20
 542 two_queue=false
 543 write_buffers=8
 544 cpu_side=system.cpu.icache_port
 545 mem_side=system.cpu.toL2Bus.slave[0]
 546
 547 [system.cpu.icache.tags]
 548 type=LRU
 549 assoc=1
 550 block_size=64
 551 clk_domain=system.cpu_clk_domain
 552 hit_latency=2
 553 size=32768
 554
 555 [system.cpu.interrupts]
 556 type=X86LocalApic
 557 clk_domain=system.cpu.apic_clk_domain
 558 int_latency=1000
 559 pio_addr=2305843009213693952
 560 pio_latency=100000
 561 system=system
 562 int_master=system.membus.slave[3]
 563 int_slave=system.membus.master[2]
 564 pio=system.membus.master[1]
 565
 566 [system.cpu.isa]
 567 type=X86ISA
 568
 569 [system.cpu.itb]
 570 type=X86TLB
 571 children=walker
 572 size=64
 573 walker=system.cpu.itb.walker
 574
 575 [system.cpu.itb.walker]
 576 type=X86PagetableWalker
 577 clk_domain=system.cpu_clk_domain
 578 num_squash_per_cycle=4
 579 system=system
 580 port=system.cpu.itb_walker_cache.cpu_side
 581
 582 [system.cpu.itb_walker_cache]
 583 type=BaseCache
 584 children=tags
 585 addr_ranges=0:18446744073709551615
 586 assoc=2
 587 clk_domain=system.cpu_clk_domain
 588 forward_snoops=true
 589 hit_latency=2
 590 is_top_level=true
 591 max_miss_count=0
 592 mshrs=10
 593 prefetch_on_access=false
 594 prefetcher=Null
 595 response_latency=2
 596 size=1024
 597 system=system
 598 tags=system.cpu.itb_walker_cache.tags
 599 tgts_per_mshr=12
 600 two_queue=false
 601 write_buffers=8
 602 cpu_side=system.cpu.itb.walker.port
 603 mem_side=system.cpu.toL2Bus.slave[2]
 604
 605 [system.cpu.itb_walker_cache.tags]
 606 type=LRU
 607 assoc=2
 608 block_size=64
 609 clk_domain=system.cpu_clk_domain
 610 hit_latency=2
 611 size=1024
 612
 613 [system.cpu.l2cache]
 614 type=BaseCache
 615 children=tags
 616 addr_ranges=0:18446744073709551615
 617 assoc=8
 618 clk_domain=system.cpu_clk_domain
 619 forward_snoops=true
 620 hit_latency=20
 621 is_top_level=false
 622 max_miss_count=0
 623 mshrs=20
 624 prefetch_on_access=false
 625 prefetcher=Null
 626 response_latency=20
 627 size=4194304
 628 system=system
 629 tags=system.cpu.l2cache.tags
 630 tgts_per_mshr=12
 631 two_queue=false
 632 write_buffers=8
 633 cpu_side=system.cpu.toL2Bus.master[0]
 634 mem_side=system.membus.slave[2]
 635
 636 [system.cpu.l2cache.tags]
 637 type=LRU
 638 assoc=8
 639 block_size=64
 640 clk_domain=system.cpu_clk_domain
 641 hit_latency=20
 642 size=4194304
 643
 644 [system.cpu.toL2Bus]
 645 type=CoherentBus
 646 clk_domain=system.cpu_clk_domain
 647 header_cycles=1
 648 system=system
 649 use_default_range=false
 650 width=32
 651 master=system.cpu.l2cache.cpu_side
 652 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
 653
 654 [system.cpu.tracer]
 655 type=ExeTracer
 656
 657 [system.cpu_clk_domain]
 658 type=SrcClockDomain
 659 clock=500
 660 voltage_domain=system.voltage_domain
 661
 662 [system.e820_table]
 663 type=X86E820Table
 664 children=entries0 entries1 entries2 entries3
 665 entries=system.e820_table.entries0 system.e820_table.entries1 system.e820_table.entries2 system.e820_table.entries3
 666
 667 [system.e820_table.entries0]
 668 type=X86E820Entry
 669 addr=0
 670 range_type=1
 671 size=654336
 672
 673 [system.e820_table.entries1]
 674 type=X86E820Entry
 675 addr=654336
 676 range_type=2
 677 size=394240
 678
 679 [system.e820_table.entries2]
 680 type=X86E820Entry
 681 addr=1048576
 682 range_type=1
 683 size=133169152
 684
 685 [system.e820_table.entries3]
 686 type=X86E820Entry
 687 addr=4294901760
 688 range_type=2
 689 size=65536
 690
 691 [system.intel_mp_pointer]
 692 type=X86IntelMPFloatingPointer
 693 default_config=0
 694 imcr_present=true
 695 spec_rev=4
 696
 697 [system.intel_mp_table]
 698 type=X86IntelMPConfigTable
 699 children=base_entries00 base_entries01 base_entries02 base_entries03 base_entries04 base_entries05 base_entries06 base_entries07 base_entries08 base_entries09 base_entries10 base_entries11 base_entries12 base_entries13 base_entries14 base_entries15 base_entries16 base_entries17 base_entries18 base_entries19 base_entries20 base_entries21 base_entries22 base_entries23 base_entries24 base_entries25 base_entries26 base_entries27 base_entries28 base_entries29 base_entries30 base_entries31 base_entries32 ext_entries
 700 base_entries=system.intel_mp_table.base_entries00 system.intel_mp_table.base_entries01 system.intel_mp_table.base_entries02 system.intel_mp_table.base_entries03 system.intel_mp_table.base_entries04 system.intel_mp_table.base_entries05 system.intel_mp_table.base_entries06 system.intel_mp_table.base_entries07 system.intel_mp_table.base_entries08 system.intel_mp_table.base_entries09 system.intel_mp_table.base_entries10 system.intel_mp_table.base_entries11 system.intel_mp_table.base_entries12 system.intel_mp_table.base_entries13 system.intel_mp_table.base_entries14 system.intel_mp_table.base_entries15 system.intel_mp_table.base_entries16 system.intel_mp_table.base_entries17 system.intel_mp_table.base_entries18 system.intel_mp_table.base_entries19 system.intel_mp_table.base_entries20 system.intel_mp_table.base_entries21 system.intel_mp_table.base_entries22 system.intel_mp_table.base_entries23 system.intel_mp_table.base_entries24 system.intel_mp_table.base_entries25 system.intel_mp_table.base_entries26 system.intel_mp_table.base_entries27 system.intel_mp_table.base_entries28 system.intel_mp_table.base_entries29 system.intel_mp_table.base_entries30 system.intel_mp_table.base_entries31 system.intel_mp_table.base_entries32
 701 ext_entries=system.intel_mp_table.ext_entries
 702 local_apic=4276092928
 703 oem_id=
 704 oem_table_addr=0
 705 oem_table_size=0
 706 product_id=
 707 spec_rev=4
 708
 709 [system.intel_mp_table.base_entries00]
 710 type=X86IntelMPProcessor
 711 bootstrap=true
 712 enable=true
 713 family=0
 714 feature_flags=0
 715 local_apic_id=0
 716 local_apic_version=20
 717 model=0
 718 stepping=0
 719
 720 [system.intel_mp_table.base_entries01]
 721 type=X86IntelMPIOAPIC
 722 address=4273995776
 723 enable=true
 724 id=1
 725 version=17
 726
 727 [system.intel_mp_table.base_entries02]
 728 type=X86IntelMPBus
 729 bus_id=0
 730 bus_type=ISA
 731
 732 [system.intel_mp_table.base_entries03]
 733 type=X86IntelMPBus
 734 bus_id=1
 735 bus_type=PCI
 736
 737 [system.intel_mp_table.base_entries04]
 738 type=X86IntelMPIOIntAssignment
 739 dest_io_apic_id=1
 740 dest_io_apic_intin=16
 741 interrupt_type=INT
 742 polarity=ConformPolarity
 743 source_bus_id=1
 744 source_bus_irq=16
 745 trigger=ConformTrigger
 746
 747 [system.intel_mp_table.base_entries05]
 748 type=X86IntelMPIOIntAssignment
 749 dest_io_apic_id=1
 750 dest_io_apic_intin=0
 751 interrupt_type=ExtInt
 752 polarity=ConformPolarity
 753 source_bus_id=0
 754 source_bus_irq=0
 755 trigger=ConformTrigger
 756
 757 [system.intel_mp_table.base_entries06]
 758 type=X86IntelMPIOIntAssignment
 759 dest_io_apic_id=1
 760 dest_io_apic_intin=2
 761 interrupt_type=INT
 762 polarity=ConformPolarity
 763 source_bus_id=0
 764 source_bus_irq=0
 765 trigger=ConformTrigger
 766
 767 [system.intel_mp_table.base_entries07]
 768 type=X86IntelMPIOIntAssignment
 769 dest_io_apic_id=1
 770 dest_io_apic_intin=0
 771 interrupt_type=ExtInt
 772 polarity=ConformPolarity
 773 source_bus_id=0
 774 source_bus_irq=1
 775 trigger=ConformTrigger
 776
 777 [system.intel_mp_table.base_entries08]
 778 type=X86IntelMPIOIntAssignment
 779 dest_io_apic_id=1
 780 dest_io_apic_intin=1
 781 interrupt_type=INT
 782 polarity=ConformPolarity
 783 source_bus_id=0
 784 source_bus_irq=1
 785 trigger=ConformTrigger
 786
 787 [system.intel_mp_table.base_entries09]
 788 type=X86IntelMPIOIntAssignment
 789 dest_io_apic_id=1
 790 dest_io_apic_intin=0
 791 interrupt_type=ExtInt
 792 polarity=ConformPolarity
 793 source_bus_id=0
 794 source_bus_irq=3
 795 trigger=ConformTrigger
 796
 797 [system.intel_mp_table.base_entries10]
 798 type=X86IntelMPIOIntAssignment
 799 dest_io_apic_id=1
 800 dest_io_apic_intin=3
 801 interrupt_type=INT
 802 polarity=ConformPolarity
 803 source_bus_id=0
 804 source_bus_irq=3
 805 trigger=ConformTrigger
 806
 807 [system.intel_mp_table.base_entries11]
 808 type=X86IntelMPIOIntAssignment
 809 dest_io_apic_id=1
 810 dest_io_apic_intin=0
 811 interrupt_type=ExtInt
 812 polarity=ConformPolarity
 813 source_bus_id=0
 814 source_bus_irq=4
 815 trigger=ConformTrigger
 816
 817 [system.intel_mp_table.base_entries12]
 818 type=X86IntelMPIOIntAssignment
 819 dest_io_apic_id=1
 820 dest_io_apic_intin=4
 821 interrupt_type=INT
 822 polarity=ConformPolarity
 823 source_bus_id=0
 824 source_bus_irq=4
 825 trigger=ConformTrigger
 826
 827 [system.intel_mp_table.base_entries13]
 828 type=X86IntelMPIOIntAssignment
 829 dest_io_apic_id=1
 830 dest_io_apic_intin=0
 831 interrupt_type=ExtInt
 832 polarity=ConformPolarity
 833 source_bus_id=0
 834 source_bus_irq=5
 835 trigger=ConformTrigger
 836
 837 [system.intel_mp_table.base_entries14]
 838 type=X86IntelMPIOIntAssignment
 839 dest_io_apic_id=1
 840 dest_io_apic_intin=5
 841 interrupt_type=INT
 842 polarity=ConformPolarity
 843 source_bus_id=0
 844 source_bus_irq=5
 845 trigger=ConformTrigger
 846
 847 [system.intel_mp_table.base_entries15]
 848 type=X86IntelMPIOIntAssignment
 849 dest_io_apic_id=1
 850 dest_io_apic_intin=0
 851 interrupt_type=ExtInt
 852 polarity=ConformPolarity
 853 source_bus_id=0
 854 source_bus_irq=6
 855 trigger=ConformTrigger
 856
 857 [system.intel_mp_table.base_entries16]
 858 type=X86IntelMPIOIntAssignment
 859 dest_io_apic_id=1
 860 dest_io_apic_intin=6
 861 interrupt_type=INT
 862 polarity=ConformPolarity
 863 source_bus_id=0
 864 source_bus_irq=6
 865 trigger=ConformTrigger
 866
 867 [system.intel_mp_table.base_entries17]
 868 type=X86IntelMPIOIntAssignment
 869 dest_io_apic_id=1
 870 dest_io_apic_intin=0
 871 interrupt_type=ExtInt
 872 polarity=ConformPolarity
 873 source_bus_id=0
 874 source_bus_irq=7
 875 trigger=ConformTrigger
 876
 877 [system.intel_mp_table.base_entries18]
 878 type=X86IntelMPIOIntAssignment
 879 dest_io_apic_id=1
 880 dest_io_apic_intin=7
 881 interrupt_type=INT
 882 polarity=ConformPolarity
 883 source_bus_id=0
 884 source_bus_irq=7
 885 trigger=ConformTrigger
 886
 887 [system.intel_mp_table.base_entries19]
 888 type=X86IntelMPIOIntAssignment
 889 dest_io_apic_id=1
 890 dest_io_apic_intin=0
 891 interrupt_type=ExtInt
 892 polarity=ConformPolarity
 893 source_bus_id=0
 894 source_bus_irq=8
 895 trigger=ConformTrigger
 896
 897 [system.intel_mp_table.base_entries20]
 898 type=X86IntelMPIOIntAssignment
 899 dest_io_apic_id=1
 900 dest_io_apic_intin=8
 901 interrupt_type=INT
 902 polarity=ConformPolarity
 903 source_bus_id=0
 904 source_bus_irq=8
 905 trigger=ConformTrigger
 906
 907 [system.intel_mp_table.base_entries21]
 908 type=X86IntelMPIOIntAssignment
 909 dest_io_apic_id=1
 910 dest_io_apic_intin=0
 911 interrupt_type=ExtInt
 912 polarity=ConformPolarity
 913 source_bus_id=0
 914 source_bus_irq=9
 915 trigger=ConformTrigger
 916
 917 [system.intel_mp_table.base_entries22]
 918 type=X86IntelMPIOIntAssignment
 919 dest_io_apic_id=1
 920 dest_io_apic_intin=9
 921 interrupt_type=INT
 922 polarity=ConformPolarity
 923 source_bus_id=0
 924 source_bus_irq=9
 925 trigger=ConformTrigger
 926
 927 [system.intel_mp_table.base_entries23]
 928 type=X86IntelMPIOIntAssignment
 929 dest_io_apic_id=1
 930 dest_io_apic_intin=0
 931 interrupt_type=ExtInt
 932 polarity=ConformPolarity
 933 source_bus_id=0
 934 source_bus_irq=10
 935 trigger=ConformTrigger
 936
 937 [system.intel_mp_table.base_entries24]
 938 type=X86IntelMPIOIntAssignment
 939 dest_io_apic_id=1
 940 dest_io_apic_intin=10
 941 interrupt_type=INT
 942 polarity=ConformPolarity
 943 source_bus_id=0
 944 source_bus_irq=10
 945 trigger=ConformTrigger
 946
 947 [system.intel_mp_table.base_entries25]
 948 type=X86IntelMPIOIntAssignment
 949 dest_io_apic_id=1
 950 dest_io_apic_intin=0
 951 interrupt_type=ExtInt
 952 polarity=ConformPolarity
 953 source_bus_id=0
 954 source_bus_irq=11
 955 trigger=ConformTrigger
 956
 957 [system.intel_mp_table.base_entries26]
 958 type=X86IntelMPIOIntAssignment
 959 dest_io_apic_id=1
 960 dest_io_apic_intin=11
 961 interrupt_type=INT
 962 polarity=ConformPolarity
 963 source_bus_id=0
 964 source_bus_irq=11
 965 trigger=ConformTrigger
 966
 967 [system.intel_mp_table.base_entries27]
 968 type=X86IntelMPIOIntAssignment
 969 dest_io_apic_id=1
 970 dest_io_apic_intin=0
 971 interrupt_type=ExtInt
 972 polarity=ConformPolarity
 973 source_bus_id=0
 974 source_bus_irq=12
 975 trigger=ConformTrigger
 976
 977 [system.intel_mp_table.base_entries28]
 978 type=X86IntelMPIOIntAssignment
 979 dest_io_apic_id=1
 980 dest_io_apic_intin=12
 981 interrupt_type=INT
 982 polarity=ConformPolarity
 983 source_bus_id=0
 984 source_bus_irq=12
 985 trigger=ConformTrigger
 986
 987 [system.intel_mp_table.base_entries29]
 988 type=X86IntelMPIOIntAssignment
 989 dest_io_apic_id=1
 990 dest_io_apic_intin=0
 991 interrupt_type=ExtInt
 992 polarity=ConformPolarity
 993 source_bus_id=0
 994 source_bus_irq=13
 995 trigger=ConformTrigger
 996
 997 [system.intel_mp_table.base_entries30]
 998 type=X86IntelMPIOIntAssignment
 999 dest_io_apic_id=1
1000 dest_io_apic_intin=13
1001 interrupt_type=INT
1002 polarity=ConformPolarity
1003 source_bus_id=0
1004 source_bus_irq=13
1005 trigger=ConformTrigger
1006
1007 [system.intel_mp_table.base_entries31]
1008 type=X86IntelMPIOIntAssignment
1009 dest_io_apic_id=1
1010 dest_io_apic_intin=0
1011 interrupt_type=ExtInt
1012 polarity=ConformPolarity
1013 source_bus_id=0
1014 source_bus_irq=14
1015 trigger=ConformTrigger
1016
1017 [system.intel_mp_table.base_entries32]
1018 type=X86IntelMPIOIntAssignment
1019 dest_io_apic_id=1
1020 dest_io_apic_intin=14
1021 interrupt_type=INT
1022 polarity=ConformPolarity
1023 source_bus_id=0
1024 source_bus_irq=14
1025 trigger=ConformTrigger
1026
1027 [system.intel_mp_table.ext_entries]
1028 type=X86IntelMPBusHierarchy
1029 bus_id=0
1030 parent_bus=1
1031 subtractive_decode=true
1032
1033 [system.intrctrl]
1034 type=IntrControl
1035 sys=system
1036
1037 [system.iobus]
1038 type=NoncoherentBus
1039 clk_domain=system.clk_domain
1040 header_cycles=1
1041 use_default_range=true
1042 width=8
1043 default=system.pc.pciconfig.pio
1044 master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side
1045 slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master
1046
1047 [system.iocache]
1048 type=BaseCache
1049 children=tags
1050 addr_ranges=0:134217727
1051 assoc=8
1052 clk_domain=system.clk_domain
1053 forward_snoops=false
1054 hit_latency=50
1055 is_top_level=true
1056 max_miss_count=0
1057 mshrs=20
1058 prefetch_on_access=false
1059 prefetcher=Null
1060 response_latency=50
1061 size=1024
1062 system=system
1063 tags=system.iocache.tags
1064 tgts_per_mshr=12
1065 two_queue=false
1066 write_buffers=8
1067 cpu_side=system.iobus.master[18]
1068 mem_side=system.membus.slave[4]
1069
1070 [system.iocache.tags]
1071 type=LRU
1072 assoc=8
1073 block_size=64
1074 clk_domain=system.clk_domain
1075 hit_latency=50
1076 size=1024
1077
1078 [system.membus]
1079 type=CoherentBus
1080 children=badaddr_responder
1081 clk_domain=system.clk_domain
1082 header_cycles=1
1083 system=system
1084 use_default_range=false
1085 width=8
1086 default=system.membus.badaddr_responder.pio
1087 master=system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave system.physmem.port
1088 slave=system.apicbridge.master system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master system.iocache.mem_side
1089
1090 [system.membus.badaddr_responder]
1091 type=IsaFake
1092 clk_domain=system.clk_domain
1093 fake_mem=false
1094 pio_addr=0
1095 pio_latency=100000
1096 pio_size=8
1097 ret_bad_addr=true
1098 ret_data16=65535
1099 ret_data32=4294967295
1100 ret_data64=18446744073709551615
1101 ret_data8=255
1102 system=system
1103 update_data=false
1104 warn_access=
1105 pio=system.membus.default
1106
1107 [system.pc]
1108 type=Pc
1109 children=behind_pci com_1 fake_com_2 fake_com_3 fake_com_4 fake_floppy i_dont_exist pciconfig south_bridge terminal
1110 intrctrl=system.intrctrl
1111 system=system
1112
1113 [system.pc.behind_pci]
1114 type=IsaFake
1115 clk_domain=system.clk_domain
1116 fake_mem=false
1117 pio_addr=9223372036854779128
1118 pio_latency=100000
1119 pio_size=8
1120 ret_bad_addr=false
1121 ret_data16=65535
1122 ret_data32=4294967295
1123 ret_data64=18446744073709551615
1124 ret_data8=255
1125 system=system
1126 update_data=false
1127 warn_access=
1128 pio=system.iobus.master[12]
1129
1130 [system.pc.com_1]
1131 type=Uart8250
1132 children=terminal
1133 clk_domain=system.clk_domain
1134 pio_addr=9223372036854776824
1135 pio_latency=100000
1136 platform=system.pc
1137 system=system
1138 terminal=system.pc.com_1.terminal
1139 pio=system.iobus.master[13]
1140
1141 [system.pc.com_1.terminal]
1142 type=Terminal
1143 intr_control=system.intrctrl
1144 number=0
1145 output=true
1146 port=3456
1147
1148 [system.pc.com_1.terminal]
1149 type=Terminal
1150 intr_control=system.intrctrl
1151 number=0
1152 output=true
1153 port=3456
1154
1155 [system.pc.fake_com_2]
1156 type=IsaFake
1157 clk_domain=system.clk_domain
1158 fake_mem=false
1159 pio_addr=9223372036854776568
1160 pio_latency=100000
1161 pio_size=8
1162 ret_bad_addr=false
1163 ret_data16=65535
1164 ret_data32=4294967295
1165 ret_data64=18446744073709551615
1166 ret_data8=255
1167 system=system
1168 update_data=false
1169 warn_access=
1170 pio=system.iobus.master[14]
1171
1172 [system.pc.fake_com_3]
1173 type=IsaFake
1174 clk_domain=system.clk_domain
1175 fake_mem=false
1176 pio_addr=9223372036854776808
1177 pio_latency=100000
1178 pio_size=8
1179 ret_bad_addr=false
1180 ret_data16=65535
1181 ret_data32=4294967295
1182 ret_data64=18446744073709551615
1183 ret_data8=255
1184 system=system
1185 update_data=false
1186 warn_access=
1187 pio=system.iobus.master[15]
1188
1189 [system.pc.fake_com_4]
1190 type=IsaFake
1191 clk_domain=system.clk_domain
1192 fake_mem=false
1193 pio_addr=9223372036854776552
1194 pio_latency=100000
1195 pio_size=8
1196 ret_bad_addr=false
1197 ret_data16=65535
1198 ret_data32=4294967295
1199 ret_data64=18446744073709551615
1200 ret_data8=255
1201 system=system
1202 update_data=false
1203 warn_access=
1204 pio=system.iobus.master[16]
1205
1206 [system.pc.fake_floppy]
1207 type=IsaFake
1208 clk_domain=system.clk_domain
1209 fake_mem=false
1210 pio_addr=9223372036854776818
1211 pio_latency=100000
1212 pio_size=2
1213 ret_bad_addr=false
1214 ret_data16=65535
1215 ret_data32=4294967295
1216 ret_data64=18446744073709551615
1217 ret_data8=255
1218 system=system
1219 update_data=false
1220 warn_access=
1221 pio=system.iobus.master[17]
1222
1223 [system.pc.i_dont_exist]
1224 type=IsaFake
1225 clk_domain=system.clk_domain
1226 fake_mem=false
1227 pio_addr=9223372036854775936
1228 pio_latency=100000
1229 pio_size=1
1230 ret_bad_addr=false
1231 ret_data16=65535
1232 ret_data32=4294967295
1233 ret_data64=18446744073709551615
1234 ret_data8=255
1235 system=system
1236 update_data=false
1237 warn_access=
1238 pio=system.iobus.master[11]
1239
1240 [system.pc.pciconfig]
1241 type=PciConfigAll
1242 bus=0
1243 clk_domain=system.clk_domain
1244 pio_addr=0
1245 pio_latency=30000
1246 platform=system.pc
1247 size=16777216
1248 system=system
1249 pio=system.iobus.default
1250
1251 [system.pc.south_bridge]
1252 type=SouthBridge
1253 children=cmos dma1 ide int_lines0 int_lines1 int_lines2 int_lines3 int_lines4 int_lines5 int_lines6 io_apic keyboard pic1 pic2 pit speaker
1254 cmos=system.pc.south_bridge.cmos
1255 dma1=system.pc.south_bridge.dma1
1256 io_apic=system.pc.south_bridge.io_apic
1257 keyboard=system.pc.south_bridge.keyboard
1258 pic1=system.pc.south_bridge.pic1
1259 pic2=system.pc.south_bridge.pic2
1260 pit=system.pc.south_bridge.pit
1261 platform=system.pc
1262 speaker=system.pc.south_bridge.speaker
1263
1264 [system.pc.south_bridge.cmos]
1265 type=Cmos
1266 children=int_pin
1267 clk_domain=system.clk_domain
1268 int_pin=system.pc.south_bridge.cmos.int_pin
1269 pio_addr=9223372036854775920
1270 pio_latency=100000
1271 system=system
1272 time=Sun Jan  1 00:00:00 2012
1273 pio=system.iobus.master[1]
1274
1275 [system.pc.south_bridge.cmos.int_pin]
1276 type=X86IntSourcePin
1277
1278 [system.pc.south_bridge.dma1]
1279 type=I8237
1280 clk_domain=system.clk_domain
1281 pio_addr=9223372036854775808
1282 pio_latency=100000
1283 system=system
1284 pio=system.iobus.master[2]
1285
1286 [system.pc.south_bridge.ide]
1287 type=IdeController
1288 children=disks0 disks1
1289 BAR0=496
1290 BAR0LegacyIO=true
1291 BAR0Size=8
1292 BAR1=1012
1293 BAR1LegacyIO=true
1294 BAR1Size=3
1295 BAR2=368
1296 BAR2LegacyIO=true
1297 BAR2Size=8
1298 BAR3=884
1299 BAR3LegacyIO=true
1300 BAR3Size=3
1301 BAR4=1
1302 BAR4LegacyIO=false
1303 BAR4Size=16
1304 BAR5=1
1305 BAR5LegacyIO=false
1306 BAR5Size=0
1307 BIST=0
1308 CacheLineSize=0
1309 CardbusCIS=0
1310 ClassCode=1
1311 Command=0
1312 DeviceID=28945
1313 ExpansionROM=0
1314 HeaderType=0
1315 InterruptLine=14
1316 InterruptPin=1
1317 LatencyTimer=0
1318 MaximumLatency=0
1319 MinimumGrant=0
1320 ProgIF=128
1321 Revision=0
1322 Status=640
1323 SubClassCode=1
1324 SubsystemID=0
1325 SubsystemVendorID=0
1326 VendorID=32902
1327 clk_domain=system.clk_domain
1328 config_latency=20000
1329 ctrl_offset=0
1330 disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
1331 io_shift=0
1332 pci_bus=0
1333 pci_dev=4
1334 pci_func=0
1335 pio_latency=30000
1336 platform=system.pc
1337 system=system
1338 config=system.iobus.master[4]
1339 dma=system.iobus.slave[1]
1340 pio=system.iobus.master[3]
1341
1342 [system.pc.south_bridge.ide.disks0]
1343 type=IdeDisk
1344 children=image
1345 delay=1000000
1346 driveID=master
1347 image=system.pc.south_bridge.ide.disks0.image
1348
1349 [system.pc.south_bridge.ide.disks0.image]
1350 type=CowDiskImage
1351 children=child
1352 child=system.pc.south_bridge.ide.disks0.image.child
1353 image_file=
1354 read_only=false
1355 table_size=65536
1356
1357 [system.pc.south_bridge.ide.disks0.image.child]
1358 type=RawDiskImage
1359 image_file=/scratch/andreas/m5/disks/linux-x86.img
1360 read_only=true
1361
1362 [system.pc.south_bridge.ide.disks1]
1363 type=IdeDisk
1364 children=image
1365 delay=1000000
1366 driveID=master
1367 image=system.pc.south_bridge.ide.disks1.image
1368
1369 [system.pc.south_bridge.ide.disks1.image]
1370 type=CowDiskImage
1371 children=child
1372 child=system.pc.south_bridge.ide.disks1.image.child
1373 image_file=
1374 read_only=false
1375 table_size=65536
1376
1377 [system.pc.south_bridge.ide.disks1.image.child]
1378 type=RawDiskImage
1379 image_file=/scratch/andreas/m5/disks/linux-bigswap2.img
1380 read_only=true
1381
1382 [system.pc.south_bridge.int_lines0]
1383 type=X86IntLine
1384 children=sink
1385 sink=system.pc.south_bridge.int_lines0.sink
1386 source=system.pc.south_bridge.pic1.output
1387
1388 [system.pc.south_bridge.int_lines0.sink]
1389 type=X86IntSinkPin
1390 device=system.pc.south_bridge.io_apic
1391 number=0
1392
1393 [system.pc.south_bridge.int_lines1]
1394 type=X86IntLine
1395 children=sink
1396 sink=system.pc.south_bridge.int_lines1.sink
1397 source=system.pc.south_bridge.pic2.output
1398
1399 [system.pc.south_bridge.int_lines1.sink]
1400 type=X86IntSinkPin
1401 device=system.pc.south_bridge.pic1
1402 number=2
1403
1404 [system.pc.south_bridge.int_lines2]
1405 type=X86IntLine
1406 children=sink
1407 sink=system.pc.south_bridge.int_lines2.sink
1408 source=system.pc.south_bridge.cmos.int_pin
1409
1410 [system.pc.south_bridge.int_lines2.sink]
1411 type=X86IntSinkPin
1412 device=system.pc.south_bridge.pic2
1413 number=0
1414
1415 [system.pc.south_bridge.int_lines3]
1416 type=X86IntLine
1417 children=sink
1418 sink=system.pc.south_bridge.int_lines3.sink
1419 source=system.pc.south_bridge.pit.int_pin
1420
1421 [system.pc.south_bridge.int_lines3.sink]
1422 type=X86IntSinkPin
1423 device=system.pc.south_bridge.pic1
1424 number=0
1425
1426 [system.pc.south_bridge.int_lines4]
1427 type=X86IntLine
1428 children=sink
1429 sink=system.pc.south_bridge.int_lines4.sink
1430 source=system.pc.south_bridge.pit.int_pin
1431
1432 [system.pc.south_bridge.int_lines4.sink]
1433 type=X86IntSinkPin
1434 device=system.pc.south_bridge.io_apic
1435 number=2
1436
1437 [system.pc.south_bridge.int_lines5]
1438 type=X86IntLine
1439 children=sink
1440 sink=system.pc.south_bridge.int_lines5.sink
1441 source=system.pc.south_bridge.keyboard.keyboard_int_pin
1442
1443 [system.pc.south_bridge.int_lines5.sink]
1444 type=X86IntSinkPin
1445 device=system.pc.south_bridge.io_apic
1446 number=1
1447
1448 [system.pc.south_bridge.int_lines6]
1449 type=X86IntLine
1450 children=sink
1451 sink=system.pc.south_bridge.int_lines6.sink
1452 source=system.pc.south_bridge.keyboard.mouse_int_pin
1453
1454 [system.pc.south_bridge.int_lines6.sink]
1455 type=X86IntSinkPin
1456 device=system.pc.south_bridge.io_apic
1457 number=12
1458
1459 [system.pc.south_bridge.io_apic]
1460 type=I82094AA
1461 apic_id=1
1462 clk_domain=system.clk_domain
1463 external_int_pic=system.pc.south_bridge.pic1
1464 int_latency=1000
1465 pio_addr=4273995776
1466 pio_latency=100000
1467 system=system
1468 int_master=system.iobus.slave[2]
1469 pio=system.iobus.master[10]
1470
1471 [system.pc.south_bridge.keyboard]
1472 type=I8042
1473 children=keyboard_int_pin mouse_int_pin
1474 clk_domain=system.clk_domain
1475 command_port=9223372036854775908
1476 data_port=9223372036854775904
1477 keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
1478 mouse_int_pin=system.pc.south_bridge.keyboard.mouse_int_pin
1479 pio_addr=0
1480 pio_latency=100000
1481 system=system
1482 pio=system.iobus.master[5]
1483
1484 [system.pc.south_bridge.keyboard.keyboard_int_pin]
1485 type=X86IntSourcePin
1486
1487 [system.pc.south_bridge.keyboard.mouse_int_pin]
1488 type=X86IntSourcePin
1489
1490 [system.pc.south_bridge.pic1]
1491 type=I8259
1492 children=output
1493 clk_domain=system.clk_domain
1494 mode=I8259Master
1495 output=system.pc.south_bridge.pic1.output
1496 pio_addr=9223372036854775840
1497 pio_latency=100000
1498 slave=system.pc.south_bridge.pic2
1499 system=system
1500 pio=system.iobus.master[6]
1501
1502 [system.pc.south_bridge.pic1.output]
1503 type=X86IntSourcePin
1504
1505 [system.pc.south_bridge.pic2]
1506 type=I8259
1507 children=output
1508 clk_domain=system.clk_domain
1509 mode=I8259Slave
1510 output=system.pc.south_bridge.pic2.output
1511 pio_addr=9223372036854775968
1512 pio_latency=100000
1513 slave=Null
1514 system=system
1515 pio=system.iobus.master[7]
1516
1517 [system.pc.south_bridge.pic2.output]
1518 type=X86IntSourcePin
1519
1520 [system.pc.south_bridge.pit]
1521 type=I8254
1522 children=int_pin
1523 clk_domain=system.clk_domain
1524 int_pin=system.pc.south_bridge.pit.int_pin
1525 pio_addr=9223372036854775872
1526 pio_latency=100000
1527 system=system
1528 pio=system.iobus.master[8]
1529
1530 [system.pc.south_bridge.pit.int_pin]
1531 type=X86IntSourcePin
1532
1533 [system.pc.south_bridge.speaker]
1534 type=PcSpeaker
1535 clk_domain=system.clk_domain
1536 i8254=system.pc.south_bridge.pit
1537 pio_addr=9223372036854775905
1538 pio_latency=100000
1539 system=system
1540 pio=system.iobus.master[9]
1541
1542 [system.physmem]
1543 type=SimpleDRAM
1544 activation_limit=4
1545 addr_mapping=RaBaChCo
1546 banks_per_rank=8
1547 burst_length=8
1548 channels=1
1549 clk_domain=system.clk_domain
1550 conf_table_reported=true
1551 device_bus_width=8
1552 device_rowbuffer_size=1024
1553 devices_per_rank=8
1554 in_addr_map=true
1555 mem_sched_policy=frfcfs
1556 null=false
1557 page_policy=open
1558 range=0:134217727
1559 ranks_per_channel=2
1560 read_buffer_size=32
1561 static_backend_latency=10000
1562 static_frontend_latency=10000
1563 tBURST=5000
1564 tCL=13750
1565 tRCD=13750
1566 tREFI=7800000
1567 tRFC=300000
1568 tRP=13750
1569 tWTR=7500
1570 tXAW=40000
1571 write_buffer_size=32
1572 write_thresh_perc=70
1573 port=system.membus.master[3]
1574
1575 [system.smbios_table]
1576 type=X86SMBiosSMBiosTable
1577 children=structures
1578 major_version=2
1579 minor_version=5
1580 structures=system.smbios_table.structures
1581
1582 [system.smbios_table.structures]
1583 type=X86SMBiosBiosInformation
1584 characteristic_ext_bytes=
1585 characteristics=
1586 emb_cont_firmware_major=0
1587 emb_cont_firmware_minor=0
1588 major=0
1589 minor=0
1590 release_date=06/08/2008
1591 rom_size=0
1592 starting_addr_segment=0
1593 vendor=
1594 version=
1595
1596 [system.voltage_domain]
1597 type=VoltageDomain
1598 voltage=1.000000
1599