f38bb864d4eed6beedac2be567b1f44a770918b4
8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=acpi_description_table_pointer clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler e820_table intel_mp_pointer intel_mp_table intrctrl iobus pc physmem ruby smbios_table sys_port_proxy voltage_domain
14 acpi_description_table_pointer=system.acpi_description_table_pointer
15 boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
17 clk_domain=system.clk_domain
18 e820_table=system.e820_table
21 intel_mp_pointer=system.intel_mp_pointer
22 intel_mp_table=system.intel_mp_table
23 kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9.smp
24 kernel_addr_check=true
25 load_addr_mask=18446744073709551615
28 mem_ranges=0:134217727
29 memories=system.physmem
31 readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
32 smbios_table=system.smbios_table
34 work_begin_ckpt_count=0
35 work_begin_cpu_id_exit=-1
36 work_begin_exit_count=0
37 work_cpus_ckpt_count=0
41 system_port=system.sys_port_proxy.slave[0]
43 [system.acpi_description_table_pointer]
50 xsdt=system.acpi_description_table_pointer.xsdt
52 [system.acpi_description_table_pointer.xsdt]
68 voltage_domain=system.voltage_domain
72 children=apic_clk_domain dtb interrupts isa itb tracer
75 clk_domain=system.cpu_clk_domain
77 do_checkpoint_insts=true
79 do_statistics_insts=true
83 function_trace_start=0
84 interrupts=system.cpu0.interrupts
87 max_insts_all_threads=0
88 max_insts_any_thread=0
89 max_loads_all_threads=0
90 max_loads_any_thread=0
98 tracer=system.cpu0.tracer
100 dcache_port=system.ruby.l1_cntrl0.sequencer.slave[1]
101 icache_port=system.ruby.l1_cntrl0.sequencer.slave[0]
103 [system.cpu0.apic_clk_domain]
104 type=DerivedClockDomain
106 clk_domain=system.cpu_clk_domain
114 walker=system.cpu0.dtb.walker
116 [system.cpu0.dtb.walker]
117 type=X86PagetableWalker
118 clk_domain=system.cpu_clk_domain
120 num_squash_per_cycle=4
122 port=system.ruby.l1_cntrl0.sequencer.slave[3]
124 [system.cpu0.interrupts]
126 clk_domain=system.cpu0.apic_clk_domain
129 pio_addr=2305843009213693952
132 int_master=system.ruby.l1_cntrl0.sequencer.slave[4]
133 int_slave=system.ruby.l1_cntrl0.sequencer.master[1]
134 pio=system.ruby.l1_cntrl0.sequencer.master[0]
145 walker=system.cpu0.itb.walker
147 [system.cpu0.itb.walker]
148 type=X86PagetableWalker
149 clk_domain=system.cpu_clk_domain
151 num_squash_per_cycle=4
153 port=system.ruby.l1_cntrl0.sequencer.slave[2]
161 children=apic_clk_domain dtb interrupts isa itb tracer
164 clk_domain=system.cpu_clk_domain
166 do_checkpoint_insts=true
168 do_statistics_insts=true
172 function_trace_start=0
173 interrupts=system.cpu1.interrupts
176 max_insts_all_threads=0
177 max_insts_any_thread=0
178 max_loads_all_threads=0
179 max_loads_any_thread=0
183 simpoint_start_insts=
187 tracer=system.cpu1.tracer
189 dcache_port=system.ruby.l1_cntrl1.sequencer.slave[1]
190 icache_port=system.ruby.l1_cntrl1.sequencer.slave[0]
192 [system.cpu1.apic_clk_domain]
193 type=DerivedClockDomain
195 clk_domain=system.cpu_clk_domain
203 walker=system.cpu1.dtb.walker
205 [system.cpu1.dtb.walker]
206 type=X86PagetableWalker
207 clk_domain=system.cpu_clk_domain
209 num_squash_per_cycle=4
211 port=system.ruby.l1_cntrl1.sequencer.slave[3]
213 [system.cpu1.interrupts]
215 clk_domain=system.cpu1.apic_clk_domain
218 pio_addr=2305843009213693952
221 int_master=system.ruby.l1_cntrl1.sequencer.slave[4]
222 int_slave=system.ruby.l1_cntrl1.sequencer.master[1]
223 pio=system.ruby.l1_cntrl1.sequencer.master[0]
234 walker=system.cpu1.itb.walker
236 [system.cpu1.itb.walker]
237 type=X86PagetableWalker
238 clk_domain=system.cpu_clk_domain
240 num_squash_per_cycle=4
242 port=system.ruby.l1_cntrl1.sequencer.slave[2]
248 [system.cpu_clk_domain]
254 voltage_domain=system.voltage_domain
256 [system.dvfs_handler]
261 sys_clk_domain=system.clk_domain
262 transition_latency=100000000
266 children=entries0 entries1 entries2 entries3
267 entries=system.e820_table.entries0 system.e820_table.entries1 system.e820_table.entries2 system.e820_table.entries3
270 [system.e820_table.entries0]
277 [system.e820_table.entries1]
284 [system.e820_table.entries2]
291 [system.e820_table.entries3]
298 [system.intel_mp_pointer]
299 type=X86IntelMPFloatingPointer
305 [system.intel_mp_table]
306 type=X86IntelMPConfigTable
307 children=base_entries00 base_entries01 base_entries02 base_entries03 base_entries04 base_entries05 base_entries06 base_entries07 base_entries08 base_entries09 base_entries10 base_entries11 base_entries12 base_entries13 base_entries14 base_entries15 base_entries16 base_entries17 base_entries18 base_entries19 base_entries20 base_entries21 base_entries22 base_entries23 base_entries24 base_entries25 base_entries26 base_entries27 base_entries28 base_entries29 base_entries30 base_entries31 base_entries32 base_entries33 ext_entries
308 base_entries=system.intel_mp_table.base_entries00 system.intel_mp_table.base_entries01 system.intel_mp_table.base_entries02 system.intel_mp_table.base_entries03 system.intel_mp_table.base_entries04 system.intel_mp_table.base_entries05 system.intel_mp_table.base_entries06 system.intel_mp_table.base_entries07 system.intel_mp_table.base_entries08 system.intel_mp_table.base_entries09 system.intel_mp_table.base_entries10 system.intel_mp_table.base_entries11 system.intel_mp_table.base_entries12 system.intel_mp_table.base_entries13 system.intel_mp_table.base_entries14 system.intel_mp_table.base_entries15 system.intel_mp_table.base_entries16 system.intel_mp_table.base_entries17 system.intel_mp_table.base_entries18 system.intel_mp_table.base_entries19 system.intel_mp_table.base_entries20 system.intel_mp_table.base_entries21 system.intel_mp_table.base_entries22 system.intel_mp_table.base_entries23 system.intel_mp_table.base_entries24 system.intel_mp_table.base_entries25 system.intel_mp_table.base_entries26 system.intel_mp_table.base_entries27 system.intel_mp_table.base_entries28 system.intel_mp_table.base_entries29 system.intel_mp_table.base_entries30 system.intel_mp_table.base_entries31 system.intel_mp_table.base_entries32 system.intel_mp_table.base_entries33
310 ext_entries=system.intel_mp_table.ext_entries
311 local_apic=4276092928
318 [system.intel_mp_table.base_entries00]
319 type=X86IntelMPProcessor
326 local_apic_version=20
330 [system.intel_mp_table.base_entries01]
331 type=X86IntelMPProcessor
338 local_apic_version=20
342 [system.intel_mp_table.base_entries02]
343 type=X86IntelMPIOAPIC
350 [system.intel_mp_table.base_entries03]
356 [system.intel_mp_table.base_entries04]
362 [system.intel_mp_table.base_entries05]
363 type=X86IntelMPIOIntAssignment
365 dest_io_apic_intin=16
368 polarity=ConformPolarity
371 trigger=ConformTrigger
373 [system.intel_mp_table.base_entries06]
374 type=X86IntelMPIOIntAssignment
378 interrupt_type=ExtInt
379 polarity=ConformPolarity
382 trigger=ConformTrigger
384 [system.intel_mp_table.base_entries07]
385 type=X86IntelMPIOIntAssignment
390 polarity=ConformPolarity
393 trigger=ConformTrigger
395 [system.intel_mp_table.base_entries08]
396 type=X86IntelMPIOIntAssignment
400 interrupt_type=ExtInt
401 polarity=ConformPolarity
404 trigger=ConformTrigger
406 [system.intel_mp_table.base_entries09]
407 type=X86IntelMPIOIntAssignment
412 polarity=ConformPolarity
415 trigger=ConformTrigger
417 [system.intel_mp_table.base_entries10]
418 type=X86IntelMPIOIntAssignment
422 interrupt_type=ExtInt
423 polarity=ConformPolarity
426 trigger=ConformTrigger
428 [system.intel_mp_table.base_entries11]
429 type=X86IntelMPIOIntAssignment
434 polarity=ConformPolarity
437 trigger=ConformTrigger
439 [system.intel_mp_table.base_entries12]
440 type=X86IntelMPIOIntAssignment
444 interrupt_type=ExtInt
445 polarity=ConformPolarity
448 trigger=ConformTrigger
450 [system.intel_mp_table.base_entries13]
451 type=X86IntelMPIOIntAssignment
456 polarity=ConformPolarity
459 trigger=ConformTrigger
461 [system.intel_mp_table.base_entries14]
462 type=X86IntelMPIOIntAssignment
466 interrupt_type=ExtInt
467 polarity=ConformPolarity
470 trigger=ConformTrigger
472 [system.intel_mp_table.base_entries15]
473 type=X86IntelMPIOIntAssignment
478 polarity=ConformPolarity
481 trigger=ConformTrigger
483 [system.intel_mp_table.base_entries16]
484 type=X86IntelMPIOIntAssignment
488 interrupt_type=ExtInt
489 polarity=ConformPolarity
492 trigger=ConformTrigger
494 [system.intel_mp_table.base_entries17]
495 type=X86IntelMPIOIntAssignment
500 polarity=ConformPolarity
503 trigger=ConformTrigger
505 [system.intel_mp_table.base_entries18]
506 type=X86IntelMPIOIntAssignment
510 interrupt_type=ExtInt
511 polarity=ConformPolarity
514 trigger=ConformTrigger
516 [system.intel_mp_table.base_entries19]
517 type=X86IntelMPIOIntAssignment
522 polarity=ConformPolarity
525 trigger=ConformTrigger
527 [system.intel_mp_table.base_entries20]
528 type=X86IntelMPIOIntAssignment
532 interrupt_type=ExtInt
533 polarity=ConformPolarity
536 trigger=ConformTrigger
538 [system.intel_mp_table.base_entries21]
539 type=X86IntelMPIOIntAssignment
544 polarity=ConformPolarity
547 trigger=ConformTrigger
549 [system.intel_mp_table.base_entries22]
550 type=X86IntelMPIOIntAssignment
554 interrupt_type=ExtInt
555 polarity=ConformPolarity
558 trigger=ConformTrigger
560 [system.intel_mp_table.base_entries23]
561 type=X86IntelMPIOIntAssignment
566 polarity=ConformPolarity
569 trigger=ConformTrigger
571 [system.intel_mp_table.base_entries24]
572 type=X86IntelMPIOIntAssignment
576 interrupt_type=ExtInt
577 polarity=ConformPolarity
580 trigger=ConformTrigger
582 [system.intel_mp_table.base_entries25]
583 type=X86IntelMPIOIntAssignment
585 dest_io_apic_intin=10
588 polarity=ConformPolarity
591 trigger=ConformTrigger
593 [system.intel_mp_table.base_entries26]
594 type=X86IntelMPIOIntAssignment
598 interrupt_type=ExtInt
599 polarity=ConformPolarity
602 trigger=ConformTrigger
604 [system.intel_mp_table.base_entries27]
605 type=X86IntelMPIOIntAssignment
607 dest_io_apic_intin=11
610 polarity=ConformPolarity
613 trigger=ConformTrigger
615 [system.intel_mp_table.base_entries28]
616 type=X86IntelMPIOIntAssignment
620 interrupt_type=ExtInt
621 polarity=ConformPolarity
624 trigger=ConformTrigger
626 [system.intel_mp_table.base_entries29]
627 type=X86IntelMPIOIntAssignment
629 dest_io_apic_intin=12
632 polarity=ConformPolarity
635 trigger=ConformTrigger
637 [system.intel_mp_table.base_entries30]
638 type=X86IntelMPIOIntAssignment
642 interrupt_type=ExtInt
643 polarity=ConformPolarity
646 trigger=ConformTrigger
648 [system.intel_mp_table.base_entries31]
649 type=X86IntelMPIOIntAssignment
651 dest_io_apic_intin=13
654 polarity=ConformPolarity
657 trigger=ConformTrigger
659 [system.intel_mp_table.base_entries32]
660 type=X86IntelMPIOIntAssignment
664 interrupt_type=ExtInt
665 polarity=ConformPolarity
668 trigger=ConformTrigger
670 [system.intel_mp_table.base_entries33]
671 type=X86IntelMPIOIntAssignment
673 dest_io_apic_intin=14
676 polarity=ConformPolarity
679 trigger=ConformTrigger
681 [system.intel_mp_table.ext_entries]
682 type=X86IntelMPBusHierarchy
686 subtractive_decode=true
695 clk_domain=system.clk_domain
698 use_default_range=false
700 default=system.pc.pciconfig.pio
701 master=system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.ruby.l1_cntrl0.sequencer.pio_slave_port system.ruby.l1_cntrl1.sequencer.pio_slave_port system.physmem.port
702 slave=system.pc.south_bridge.io_apic.int_master system.ruby.l1_cntrl0.sequencer.pio_master_port system.ruby.l1_cntrl0.sequencer.mem_master_port system.ruby.l1_cntrl1.sequencer.pio_master_port system.ruby.l1_cntrl1.sequencer.mem_master_port
706 children=behind_pci com_1 fake_com_2 fake_com_3 fake_com_4 fake_floppy i_dont_exist pciconfig south_bridge
708 intrctrl=system.intrctrl
711 [system.pc.behind_pci]
713 clk_domain=system.clk_domain
716 pio_addr=9223372036854779128
721 ret_data32=4294967295
722 ret_data64=18446744073709551615
727 pio=system.iobus.master[11]
732 clk_domain=system.clk_domain
734 pio_addr=9223372036854776824
738 terminal=system.pc.com_1.terminal
739 pio=system.iobus.master[12]
741 [system.pc.com_1.terminal]
744 intr_control=system.intrctrl
749 [system.pc.fake_com_2]
751 clk_domain=system.clk_domain
754 pio_addr=9223372036854776568
759 ret_data32=4294967295
760 ret_data64=18446744073709551615
765 pio=system.iobus.master[13]
767 [system.pc.fake_com_3]
769 clk_domain=system.clk_domain
772 pio_addr=9223372036854776808
777 ret_data32=4294967295
778 ret_data64=18446744073709551615
783 pio=system.iobus.master[14]
785 [system.pc.fake_com_4]
787 clk_domain=system.clk_domain
790 pio_addr=9223372036854776552
795 ret_data32=4294967295
796 ret_data64=18446744073709551615
801 pio=system.iobus.master[15]
803 [system.pc.fake_floppy]
805 clk_domain=system.clk_domain
808 pio_addr=9223372036854776818
813 ret_data32=4294967295
814 ret_data64=18446744073709551615
819 pio=system.iobus.master[16]
821 [system.pc.i_dont_exist]
823 clk_domain=system.clk_domain
826 pio_addr=9223372036854775936
831 ret_data32=4294967295
832 ret_data64=18446744073709551615
837 pio=system.iobus.master[10]
839 [system.pc.pciconfig]
842 clk_domain=system.clk_domain
849 pio=system.iobus.default
851 [system.pc.south_bridge]
853 children=cmos dma1 ide int_lines0 int_lines1 int_lines2 int_lines3 int_lines4 int_lines5 int_lines6 io_apic keyboard pic1 pic2 pit speaker
854 cmos=system.pc.south_bridge.cmos
855 dma1=system.pc.south_bridge.dma1
857 io_apic=system.pc.south_bridge.io_apic
858 keyboard=system.pc.south_bridge.keyboard
859 pic1=system.pc.south_bridge.pic1
860 pic2=system.pc.south_bridge.pic2
861 pit=system.pc.south_bridge.pit
863 speaker=system.pc.south_bridge.speaker
865 [system.pc.south_bridge.cmos]
868 clk_domain=system.clk_domain
870 int_pin=system.pc.south_bridge.cmos.int_pin
871 pio_addr=9223372036854775920
874 time=Sun Jan 1 00:00:00 2012
875 pio=system.iobus.master[0]
877 [system.pc.south_bridge.cmos.int_pin]
881 [system.pc.south_bridge.dma1]
883 clk_domain=system.clk_domain
885 pio_addr=9223372036854775808
888 pio=system.iobus.master[1]
890 [system.pc.south_bridge.ide]
892 children=disks0 disks1
930 MSICAPNextCapability=0
934 MSIXCAPNextCapability=0
944 PMCAPNextCapability=0
949 PXCAPDevCapabilities=0
956 PXCAPNextCapability=0
964 clk_domain=system.clk_domain
967 disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
976 config=system.iobus.master[3]
977 dma=system.ruby.dma_cntrl0.dma_sequencer.slave[0]
978 pio=system.iobus.master[2]
980 [system.pc.south_bridge.ide.disks0]
986 image=system.pc.south_bridge.ide.disks0.image
988 [system.pc.south_bridge.ide.disks0.image]
991 child=system.pc.south_bridge.ide.disks0.image.child
997 [system.pc.south_bridge.ide.disks0.image.child]
1000 image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
1003 [system.pc.south_bridge.ide.disks1]
1009 image=system.pc.south_bridge.ide.disks1.image
1011 [system.pc.south_bridge.ide.disks1.image]
1014 child=system.pc.south_bridge.ide.disks1.image.child
1020 [system.pc.south_bridge.ide.disks1.image.child]
1023 image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
1026 [system.pc.south_bridge.int_lines0]
1030 sink=system.pc.south_bridge.int_lines0.sink
1031 source=system.pc.south_bridge.pic1.output
1033 [system.pc.south_bridge.int_lines0.sink]
1035 device=system.pc.south_bridge.io_apic
1039 [system.pc.south_bridge.int_lines1]
1043 sink=system.pc.south_bridge.int_lines1.sink
1044 source=system.pc.south_bridge.pic2.output
1046 [system.pc.south_bridge.int_lines1.sink]
1048 device=system.pc.south_bridge.pic1
1052 [system.pc.south_bridge.int_lines2]
1056 sink=system.pc.south_bridge.int_lines2.sink
1057 source=system.pc.south_bridge.cmos.int_pin
1059 [system.pc.south_bridge.int_lines2.sink]
1061 device=system.pc.south_bridge.pic2
1065 [system.pc.south_bridge.int_lines3]
1069 sink=system.pc.south_bridge.int_lines3.sink
1070 source=system.pc.south_bridge.pit.int_pin
1072 [system.pc.south_bridge.int_lines3.sink]
1074 device=system.pc.south_bridge.pic1
1078 [system.pc.south_bridge.int_lines4]
1082 sink=system.pc.south_bridge.int_lines4.sink
1083 source=system.pc.south_bridge.pit.int_pin
1085 [system.pc.south_bridge.int_lines4.sink]
1087 device=system.pc.south_bridge.io_apic
1091 [system.pc.south_bridge.int_lines5]
1095 sink=system.pc.south_bridge.int_lines5.sink
1096 source=system.pc.south_bridge.keyboard.keyboard_int_pin
1098 [system.pc.south_bridge.int_lines5.sink]
1100 device=system.pc.south_bridge.io_apic
1104 [system.pc.south_bridge.int_lines6]
1108 sink=system.pc.south_bridge.int_lines6.sink
1109 source=system.pc.south_bridge.keyboard.mouse_int_pin
1111 [system.pc.south_bridge.int_lines6.sink]
1113 device=system.pc.south_bridge.io_apic
1117 [system.pc.south_bridge.io_apic]
1120 clk_domain=system.clk_domain
1122 external_int_pic=system.pc.south_bridge.pic1
1127 int_master=system.iobus.slave[0]
1128 pio=system.iobus.master[9]
1130 [system.pc.south_bridge.keyboard]
1132 children=keyboard_int_pin mouse_int_pin
1133 clk_domain=system.clk_domain
1134 command_port=9223372036854775908
1135 data_port=9223372036854775904
1137 keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
1138 mouse_int_pin=system.pc.south_bridge.keyboard.mouse_int_pin
1142 pio=system.iobus.master[4]
1144 [system.pc.south_bridge.keyboard.keyboard_int_pin]
1145 type=X86IntSourcePin
1148 [system.pc.south_bridge.keyboard.mouse_int_pin]
1149 type=X86IntSourcePin
1152 [system.pc.south_bridge.pic1]
1155 clk_domain=system.clk_domain
1158 output=system.pc.south_bridge.pic1.output
1159 pio_addr=9223372036854775840
1161 slave=system.pc.south_bridge.pic2
1163 pio=system.iobus.master[5]
1165 [system.pc.south_bridge.pic1.output]
1166 type=X86IntSourcePin
1169 [system.pc.south_bridge.pic2]
1172 clk_domain=system.clk_domain
1175 output=system.pc.south_bridge.pic2.output
1176 pio_addr=9223372036854775968
1180 pio=system.iobus.master[6]
1182 [system.pc.south_bridge.pic2.output]
1183 type=X86IntSourcePin
1186 [system.pc.south_bridge.pit]
1189 clk_domain=system.clk_domain
1191 int_pin=system.pc.south_bridge.pit.int_pin
1192 pio_addr=9223372036854775872
1195 pio=system.iobus.master[7]
1197 [system.pc.south_bridge.pit.int_pin]
1198 type=X86IntSourcePin
1201 [system.pc.south_bridge.speaker]
1203 clk_domain=system.clk_domain
1205 i8254=system.pc.south_bridge.pit
1206 pio_addr=9223372036854775905
1209 pio=system.iobus.master[8]
1214 addr_mapping=RoRaBaChCo
1218 clk_domain=system.clk_domain
1219 conf_table_reported=true
1221 device_rowbuffer_size=1024
1225 max_accesses_per_row=16
1226 mem_sched_policy=frfcfs
1227 min_writes_per_switch=16
1229 page_policy=open_adaptive
1233 static_backend_latency=10000
1234 static_frontend_latency=10000
1249 write_buffer_size=64
1250 write_high_thresh_perc=85
1251 write_low_thresh_perc=50
1252 port=system.iobus.master[19]
1256 children=clk_domain dir_cntrl0 dma_cntrl0 l1_cntrl0 l1_cntrl1 l2_cntrl0 memctrl_clk_domain network
1257 all_instructions=false
1259 clk_domain=system.ruby.clk_domain
1268 [system.ruby.clk_domain]
1274 voltage_domain=system.voltage_domain
1276 [system.ruby.dir_cntrl0]
1277 type=Directory_Controller
1278 children=directory memBuffer
1280 clk_domain=system.ruby.clk_domain
1282 directory=system.ruby.dir_cntrl0.directory
1285 memBuffer=system.ruby.dir_cntrl0.memBuffer
1289 ruby_system=system.ruby
1290 to_mem_ctrl_latency=1
1291 transitions_per_cycle=4
1293 requestToDir=system.ruby.network.master[7]
1294 responseFromDir=system.ruby.network.slave[9]
1295 responseToDir=system.ruby.network.master[8]
1297 [system.ruby.dir_cntrl0.directory]
1298 type=RubyDirectoryMemory
1306 [system.ruby.dir_cntrl0.memBuffer]
1307 type=RubyMemoryControl
1312 basic_bus_busy_time=2
1313 clk_domain=system.ruby.memctrl_clk_domain
1319 mem_random_arbitrate=0
1325 ruby_system=system.ruby
1329 [system.ruby.dma_cntrl0]
1331 children=dma_sequencer
1333 clk_domain=system.ruby.clk_domain
1335 dma_sequencer=system.ruby.dma_cntrl0.dma_sequencer
1341 ruby_system=system.ruby
1342 transitions_per_cycle=4
1344 requestToDir=system.ruby.network.slave[10]
1345 responseFromDir=system.ruby.network.master[9]
1347 [system.ruby.dma_cntrl0.dma_sequencer]
1349 access_phys_mem=true
1350 clk_domain=system.ruby.clk_domain
1352 ruby_system=system.ruby
1353 support_data_reqs=true
1354 support_inst_reqs=true
1356 using_ruby_tester=false
1358 slave=system.pc.south_bridge.ide.dma
1360 [system.ruby.l1_cntrl0]
1361 type=L1Cache_Controller
1362 children=L1Dcache L1Icache prefetcher sequencer
1363 L1Dcache=system.ruby.l1_cntrl0.L1Dcache
1364 L1Icache=system.ruby.l1_cntrl0.L1Icache
1366 clk_domain=system.cpu_clk_domain
1368 enable_prefetch=false
1370 l1_request_latency=2
1371 l1_response_latency=2
1372 l2_select_num_bits=0
1375 prefetcher=system.ruby.l1_cntrl0.prefetcher
1377 ruby_system=system.ruby
1378 send_evictions=false
1379 sequencer=system.ruby.l1_cntrl0.sequencer
1381 transitions_per_cycle=4
1383 requestFromL1Cache=system.ruby.network.slave[0]
1384 requestToL1Cache=system.ruby.network.master[0]
1385 responseFromL1Cache=system.ruby.network.slave[1]
1386 responseToL1Cache=system.ruby.network.master[1]
1387 unblockFromL1Cache=system.ruby.network.slave[2]
1389 [system.ruby.l1_cntrl0.L1Dcache]
1397 replacement_policy=PSEUDO_LRU
1398 resourceStalls=false
1404 [system.ruby.l1_cntrl0.L1Icache]
1412 replacement_policy=PSEUDO_LRU
1413 resourceStalls=false
1419 [system.ruby.l1_cntrl0.prefetcher]
1430 [system.ruby.l1_cntrl0.sequencer]
1432 access_phys_mem=true
1433 clk_domain=system.cpu_clk_domain
1434 dcache=system.ruby.l1_cntrl0.L1Dcache
1435 deadlock_threshold=500000
1437 icache=system.ruby.l1_cntrl0.L1Icache
1438 max_outstanding_requests=16
1439 ruby_system=system.ruby
1440 support_data_reqs=true
1441 support_inst_reqs=true
1443 using_network_tester=false
1444 using_ruby_tester=false
1446 master=system.cpu0.interrupts.pio system.cpu0.interrupts.int_slave
1447 mem_master_port=system.iobus.slave[2]
1448 pio_master_port=system.iobus.slave[1]
1449 pio_slave_port=system.iobus.master[17]
1450 slave=system.cpu0.icache_port system.cpu0.dcache_port system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu0.interrupts.int_master
1452 [system.ruby.l1_cntrl1]
1453 type=L1Cache_Controller
1454 children=L1Dcache L1Icache prefetcher sequencer
1455 L1Dcache=system.ruby.l1_cntrl1.L1Dcache
1456 L1Icache=system.ruby.l1_cntrl1.L1Icache
1458 clk_domain=system.cpu_clk_domain
1460 enable_prefetch=false
1462 l1_request_latency=2
1463 l1_response_latency=2
1464 l2_select_num_bits=0
1467 prefetcher=system.ruby.l1_cntrl1.prefetcher
1469 ruby_system=system.ruby
1470 send_evictions=false
1471 sequencer=system.ruby.l1_cntrl1.sequencer
1473 transitions_per_cycle=4
1475 requestFromL1Cache=system.ruby.network.slave[3]
1476 requestToL1Cache=system.ruby.network.master[2]
1477 responseFromL1Cache=system.ruby.network.slave[4]
1478 responseToL1Cache=system.ruby.network.master[3]
1479 unblockFromL1Cache=system.ruby.network.slave[5]
1481 [system.ruby.l1_cntrl1.L1Dcache]
1489 replacement_policy=PSEUDO_LRU
1490 resourceStalls=false
1496 [system.ruby.l1_cntrl1.L1Icache]
1504 replacement_policy=PSEUDO_LRU
1505 resourceStalls=false
1511 [system.ruby.l1_cntrl1.prefetcher]
1522 [system.ruby.l1_cntrl1.sequencer]
1524 access_phys_mem=true
1525 clk_domain=system.cpu_clk_domain
1526 dcache=system.ruby.l1_cntrl1.L1Dcache
1527 deadlock_threshold=500000
1529 icache=system.ruby.l1_cntrl1.L1Icache
1530 max_outstanding_requests=16
1531 ruby_system=system.ruby
1532 support_data_reqs=true
1533 support_inst_reqs=true
1535 using_network_tester=false
1536 using_ruby_tester=false
1538 master=system.cpu1.interrupts.pio system.cpu1.interrupts.int_slave
1539 mem_master_port=system.iobus.slave[4]
1540 pio_master_port=system.iobus.slave[3]
1541 pio_slave_port=system.iobus.master[18]
1542 slave=system.cpu1.icache_port system.cpu1.dcache_port system.cpu1.itb.walker.port system.cpu1.dtb.walker.port system.cpu1.interrupts.int_master
1544 [system.ruby.l2_cntrl0]
1545 type=L2Cache_Controller
1547 L2cache=system.ruby.l2_cntrl0.L2cache
1549 clk_domain=system.ruby.clk_domain
1552 l2_request_latency=2
1553 l2_response_latency=2
1557 ruby_system=system.ruby
1559 transitions_per_cycle=4
1561 DirRequestFromL2Cache=system.ruby.network.slave[6]
1562 L1RequestFromL2Cache=system.ruby.network.slave[7]
1563 L1RequestToL2Cache=system.ruby.network.master[5]
1564 responseFromL2Cache=system.ruby.network.slave[8]
1565 responseToL2Cache=system.ruby.network.master[6]
1566 unblockToL2Cache=system.ruby.network.master[4]
1568 [system.ruby.l2_cntrl0.L2cache]
1576 replacement_policy=PSEUDO_LRU
1577 resourceStalls=false
1583 [system.ruby.memctrl_clk_domain]
1584 type=DerivedClockDomain
1586 clk_domain=system.ruby.clk_domain
1589 [system.ruby.network]
1591 children=ext_links0 ext_links1 ext_links2 ext_links3 ext_links4 int_links0 int_links1 int_links2 int_links3 int_links4 routers0 routers1 routers2 routers3 routers4 routers5
1592 adaptive_routing=false
1594 clk_domain=system.ruby.clk_domain
1596 endpoint_bandwidth=1000
1598 ext_links=system.ruby.network.ext_links0 system.ruby.network.ext_links1 system.ruby.network.ext_links2 system.ruby.network.ext_links3 system.ruby.network.ext_links4
1599 int_links=system.ruby.network.int_links0 system.ruby.network.int_links1 system.ruby.network.int_links2 system.ruby.network.int_links3 system.ruby.network.int_links4
1601 number_of_virtual_networks=10
1602 routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2 system.ruby.network.routers3 system.ruby.network.routers4 system.ruby.network.routers5
1603 ruby_system=system.ruby
1605 master=system.ruby.l1_cntrl0.requestToL1Cache system.ruby.l1_cntrl0.responseToL1Cache system.ruby.l1_cntrl1.requestToL1Cache system.ruby.l1_cntrl1.responseToL1Cache system.ruby.l2_cntrl0.unblockToL2Cache system.ruby.l2_cntrl0.L1RequestToL2Cache system.ruby.l2_cntrl0.responseToL2Cache system.ruby.dir_cntrl0.requestToDir system.ruby.dir_cntrl0.responseToDir system.ruby.dma_cntrl0.responseFromDir
1606 slave=system.ruby.l1_cntrl0.requestFromL1Cache system.ruby.l1_cntrl0.responseFromL1Cache system.ruby.l1_cntrl0.unblockFromL1Cache system.ruby.l1_cntrl1.requestFromL1Cache system.ruby.l1_cntrl1.responseFromL1Cache system.ruby.l1_cntrl1.unblockFromL1Cache system.ruby.l2_cntrl0.DirRequestFromL2Cache system.ruby.l2_cntrl0.L1RequestFromL2Cache system.ruby.l2_cntrl0.responseFromL2Cache system.ruby.dir_cntrl0.responseFromDir system.ruby.dma_cntrl0.requestToDir
1608 [system.ruby.network.ext_links0]
1612 ext_node=system.ruby.l1_cntrl0
1613 int_node=system.ruby.network.routers0
1618 [system.ruby.network.ext_links1]
1622 ext_node=system.ruby.l1_cntrl1
1623 int_node=system.ruby.network.routers1
1628 [system.ruby.network.ext_links2]
1632 ext_node=system.ruby.l2_cntrl0
1633 int_node=system.ruby.network.routers2
1638 [system.ruby.network.ext_links3]
1642 ext_node=system.ruby.dir_cntrl0
1643 int_node=system.ruby.network.routers3
1648 [system.ruby.network.ext_links4]
1652 ext_node=system.ruby.dma_cntrl0
1653 int_node=system.ruby.network.routers4
1658 [system.ruby.network.int_links0]
1664 node_a=system.ruby.network.routers0
1665 node_b=system.ruby.network.routers5
1668 [system.ruby.network.int_links1]
1674 node_a=system.ruby.network.routers1
1675 node_b=system.ruby.network.routers5
1678 [system.ruby.network.int_links2]
1684 node_a=system.ruby.network.routers2
1685 node_b=system.ruby.network.routers5
1688 [system.ruby.network.int_links3]
1694 node_a=system.ruby.network.routers3
1695 node_b=system.ruby.network.routers5
1698 [system.ruby.network.int_links4]
1704 node_a=system.ruby.network.routers4
1705 node_b=system.ruby.network.routers5
1708 [system.ruby.network.routers0]
1710 clk_domain=system.ruby.clk_domain
1715 [system.ruby.network.routers1]
1717 clk_domain=system.ruby.clk_domain
1722 [system.ruby.network.routers2]
1724 clk_domain=system.ruby.clk_domain
1729 [system.ruby.network.routers3]
1731 clk_domain=system.ruby.clk_domain
1736 [system.ruby.network.routers4]
1738 clk_domain=system.ruby.clk_domain
1743 [system.ruby.network.routers5]
1745 clk_domain=system.ruby.clk_domain
1750 [system.smbios_table]
1751 type=X86SMBiosSMBiosTable
1756 structures=system.smbios_table.structures
1758 [system.smbios_table.structures]
1759 type=X86SMBiosBiosInformation
1760 characteristic_ext_bytes=
1762 emb_cont_firmware_major=0
1763 emb_cont_firmware_minor=0
1767 release_date=06/08/2008
1769 starting_addr_segment=0
1773 [system.sys_port_proxy]
1775 access_phys_mem=true
1776 clk_domain=system.clk_domain
1778 ruby_system=system.ruby
1779 support_data_reqs=true
1780 support_inst_reqs=true
1782 using_ruby_tester=false
1784 slave=system.system_port
1786 [system.voltage_domain]