8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=acpi_description_table_pointer apicbridge bridge clk_domain cpu0 cpu1 cpu2 cpu_clk_domain dvfs_handler e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache l2c membus pc physmem smbios_table toL2Bus voltage_domain
14 acpi_description_table_pointer=system.acpi_description_table_pointer
15 boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
17 clk_domain=system.clk_domain
18 e820_table=system.e820_table
21 intel_mp_pointer=system.intel_mp_pointer
22 intel_mp_table=system.intel_mp_table
23 kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
24 kernel_addr_check=true
25 load_addr_mask=18446744073709551615
28 mem_ranges=0:134217727
29 memories=system.physmem
31 readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
32 smbios_table=system.smbios_table
34 work_begin_ckpt_count=0
35 work_begin_cpu_id_exit=-1
36 work_begin_exit_count=0
37 work_cpus_ckpt_count=0
41 system_port=system.membus.slave[1]
43 [system.acpi_description_table_pointer]
50 xsdt=system.acpi_description_table_pointer.xsdt
52 [system.acpi_description_table_pointer.xsdt]
64 clk_domain=system.clk_domain
67 ranges=11529215046068469760:11529215046068473855
70 master=system.membus.slave[0]
71 slave=system.iobus.master[0]
75 clk_domain=system.clk_domain
78 ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615
81 master=system.iobus.slave[0]
82 slave=system.membus.master[0]
90 voltage_domain=system.voltage_domain
94 children=apic_clk_domain dcache dtb icache interrupts isa itb tracer
97 clk_domain=system.cpu_clk_domain
99 do_checkpoint_insts=true
101 do_statistics_insts=true
106 function_trace_start=0
107 interrupts=system.cpu0.interrupts
110 max_insts_all_threads=0
111 max_insts_any_thread=0
112 max_loads_all_threads=0
113 max_loads_any_thread=0
117 simpoint_interval=100000000
118 simpoint_profile=false
119 simpoint_profile_file=simpoint.bb.gz
120 simpoint_start_insts=
121 simulate_data_stalls=false
122 simulate_inst_stalls=false
126 tracer=system.cpu0.tracer
129 dcache_port=system.cpu0.dcache.cpu_side
130 icache_port=system.cpu0.icache.cpu_side
132 [system.cpu0.apic_clk_domain]
133 type=DerivedClockDomain
135 clk_domain=system.cpu_clk_domain
141 addr_ranges=0:18446744073709551615
143 clk_domain=system.cpu_clk_domain
150 prefetch_on_access=false
153 sequential_access=false
156 tags=system.cpu0.dcache.tags
160 cpu_side=system.cpu0.dcache_port
161 mem_side=system.toL2Bus.slave[1]
163 [system.cpu0.dcache.tags]
167 clk_domain=system.cpu_clk_domain
170 sequential_access=false
178 walker=system.cpu0.dtb.walker
180 [system.cpu0.dtb.walker]
181 type=X86PagetableWalker
182 clk_domain=system.cpu_clk_domain
184 num_squash_per_cycle=4
186 port=system.toL2Bus.slave[3]
191 addr_ranges=0:18446744073709551615
193 clk_domain=system.cpu_clk_domain
200 prefetch_on_access=false
203 sequential_access=false
206 tags=system.cpu0.icache.tags
210 cpu_side=system.cpu0.icache_port
211 mem_side=system.toL2Bus.slave[0]
213 [system.cpu0.icache.tags]
217 clk_domain=system.cpu_clk_domain
220 sequential_access=false
223 [system.cpu0.interrupts]
225 clk_domain=system.cpu0.apic_clk_domain
228 pio_addr=2305843009213693952
231 int_master=system.membus.slave[3]
232 int_slave=system.membus.master[2]
233 pio=system.membus.master[1]
244 walker=system.cpu0.itb.walker
246 [system.cpu0.itb.walker]
247 type=X86PagetableWalker
248 clk_domain=system.cpu_clk_domain
250 num_squash_per_cycle=4
252 port=system.toL2Bus.slave[2]
260 children=dtb isa itb tracer
263 clk_domain=system.cpu_clk_domain
265 do_checkpoint_insts=true
267 do_statistics_insts=true
271 function_trace_start=0
275 max_insts_all_threads=0
276 max_insts_any_thread=0
277 max_loads_all_threads=0
278 max_loads_any_thread=0
282 simpoint_start_insts=
286 tracer=system.cpu1.tracer
294 walker=system.cpu1.dtb.walker
296 [system.cpu1.dtb.walker]
297 type=X86PagetableWalker
298 clk_domain=system.cpu_clk_domain
300 num_squash_per_cycle=4
312 walker=system.cpu1.itb.walker
314 [system.cpu1.itb.walker]
315 type=X86PagetableWalker
316 clk_domain=system.cpu_clk_domain
318 num_squash_per_cycle=4
327 children=branchPred dtb fuPool isa itb tracer
336 branchPred=system.cpu2.branchPred
339 clk_domain=system.cpu_clk_domain
340 commitToDecodeDelay=1
343 commitToRenameDelay=1
347 decodeToRenameDelay=1
350 do_checkpoint_insts=true
352 do_statistics_insts=true
360 fuPool=system.cpu2.fuPool
362 function_trace_start=0
369 issueToExecuteDelay=1
372 max_insts_all_threads=0
373 max_insts_any_thread=0
374 max_loads_all_threads=0
375 max_loads_any_thread=0
386 renameToDecodeDelay=1
391 simpoint_start_insts=
392 smtCommitPolicy=RoundRobin
393 smtFetchPolicy=SingleThread
394 smtIQPolicy=Partitioned
396 smtLSQPolicy=Partitioned
398 smtNumFetchingThreads=1
399 smtROBPolicy=Partitioned
403 store_set_clear_period=250000
406 tracer=system.cpu2.tracer
412 [system.cpu2.branchPred]
418 choicePredictorSize=8192
421 globalPredictorSize=8192
424 localHistoryTableSize=2048
425 localPredictorSize=2048
434 walker=system.cpu2.dtb.walker
436 [system.cpu2.dtb.walker]
437 type=X86PagetableWalker
438 clk_domain=system.cpu_clk_domain
440 num_squash_per_cycle=4
445 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
446 FUList=system.cpu2.fuPool.FUList0 system.cpu2.fuPool.FUList1 system.cpu2.fuPool.FUList2 system.cpu2.fuPool.FUList3 system.cpu2.fuPool.FUList4 system.cpu2.fuPool.FUList5 system.cpu2.fuPool.FUList6 system.cpu2.fuPool.FUList7 system.cpu2.fuPool.FUList8
449 [system.cpu2.fuPool.FUList0]
454 opList=system.cpu2.fuPool.FUList0.opList
456 [system.cpu2.fuPool.FUList0.opList]
463 [system.cpu2.fuPool.FUList1]
465 children=opList0 opList1
468 opList=system.cpu2.fuPool.FUList1.opList0 system.cpu2.fuPool.FUList1.opList1
470 [system.cpu2.fuPool.FUList1.opList0]
477 [system.cpu2.fuPool.FUList1.opList1]
484 [system.cpu2.fuPool.FUList2]
486 children=opList0 opList1 opList2
489 opList=system.cpu2.fuPool.FUList2.opList0 system.cpu2.fuPool.FUList2.opList1 system.cpu2.fuPool.FUList2.opList2
491 [system.cpu2.fuPool.FUList2.opList0]
498 [system.cpu2.fuPool.FUList2.opList1]
505 [system.cpu2.fuPool.FUList2.opList2]
512 [system.cpu2.fuPool.FUList3]
514 children=opList0 opList1 opList2
517 opList=system.cpu2.fuPool.FUList3.opList0 system.cpu2.fuPool.FUList3.opList1 system.cpu2.fuPool.FUList3.opList2
519 [system.cpu2.fuPool.FUList3.opList0]
526 [system.cpu2.fuPool.FUList3.opList1]
533 [system.cpu2.fuPool.FUList3.opList2]
540 [system.cpu2.fuPool.FUList4]
545 opList=system.cpu2.fuPool.FUList4.opList
547 [system.cpu2.fuPool.FUList4.opList]
554 [system.cpu2.fuPool.FUList5]
556 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
559 opList=system.cpu2.fuPool.FUList5.opList00 system.cpu2.fuPool.FUList5.opList01 system.cpu2.fuPool.FUList5.opList02 system.cpu2.fuPool.FUList5.opList03 system.cpu2.fuPool.FUList5.opList04 system.cpu2.fuPool.FUList5.opList05 system.cpu2.fuPool.FUList5.opList06 system.cpu2.fuPool.FUList5.opList07 system.cpu2.fuPool.FUList5.opList08 system.cpu2.fuPool.FUList5.opList09 system.cpu2.fuPool.FUList5.opList10 system.cpu2.fuPool.FUList5.opList11 system.cpu2.fuPool.FUList5.opList12 system.cpu2.fuPool.FUList5.opList13 system.cpu2.fuPool.FUList5.opList14 system.cpu2.fuPool.FUList5.opList15 system.cpu2.fuPool.FUList5.opList16 system.cpu2.fuPool.FUList5.opList17 system.cpu2.fuPool.FUList5.opList18 system.cpu2.fuPool.FUList5.opList19
561 [system.cpu2.fuPool.FUList5.opList00]
568 [system.cpu2.fuPool.FUList5.opList01]
575 [system.cpu2.fuPool.FUList5.opList02]
582 [system.cpu2.fuPool.FUList5.opList03]
589 [system.cpu2.fuPool.FUList5.opList04]
596 [system.cpu2.fuPool.FUList5.opList05]
603 [system.cpu2.fuPool.FUList5.opList06]
610 [system.cpu2.fuPool.FUList5.opList07]
617 [system.cpu2.fuPool.FUList5.opList08]
624 [system.cpu2.fuPool.FUList5.opList09]
631 [system.cpu2.fuPool.FUList5.opList10]
638 [system.cpu2.fuPool.FUList5.opList11]
645 [system.cpu2.fuPool.FUList5.opList12]
652 [system.cpu2.fuPool.FUList5.opList13]
659 [system.cpu2.fuPool.FUList5.opList14]
666 [system.cpu2.fuPool.FUList5.opList15]
673 [system.cpu2.fuPool.FUList5.opList16]
677 opClass=SimdFloatMisc
680 [system.cpu2.fuPool.FUList5.opList17]
684 opClass=SimdFloatMult
687 [system.cpu2.fuPool.FUList5.opList18]
691 opClass=SimdFloatMultAcc
694 [system.cpu2.fuPool.FUList5.opList19]
698 opClass=SimdFloatSqrt
701 [system.cpu2.fuPool.FUList6]
706 opList=system.cpu2.fuPool.FUList6.opList
708 [system.cpu2.fuPool.FUList6.opList]
715 [system.cpu2.fuPool.FUList7]
717 children=opList0 opList1
720 opList=system.cpu2.fuPool.FUList7.opList0 system.cpu2.fuPool.FUList7.opList1
722 [system.cpu2.fuPool.FUList7.opList0]
729 [system.cpu2.fuPool.FUList7.opList1]
736 [system.cpu2.fuPool.FUList8]
741 opList=system.cpu2.fuPool.FUList8.opList
743 [system.cpu2.fuPool.FUList8.opList]
759 walker=system.cpu2.itb.walker
761 [system.cpu2.itb.walker]
762 type=X86PagetableWalker
763 clk_domain=system.cpu_clk_domain
765 num_squash_per_cycle=4
772 [system.cpu_clk_domain]
778 voltage_domain=system.voltage_domain
780 [system.dvfs_handler]
785 sys_clk_domain=system.clk_domain
786 transition_latency=100000000
790 children=entries0 entries1 entries2 entries3
791 entries=system.e820_table.entries0 system.e820_table.entries1 system.e820_table.entries2 system.e820_table.entries3
794 [system.e820_table.entries0]
801 [system.e820_table.entries1]
808 [system.e820_table.entries2]
815 [system.e820_table.entries3]
822 [system.intel_mp_pointer]
823 type=X86IntelMPFloatingPointer
829 [system.intel_mp_table]
830 type=X86IntelMPConfigTable
831 children=base_entries00 base_entries01 base_entries02 base_entries03 base_entries04 base_entries05 base_entries06 base_entries07 base_entries08 base_entries09 base_entries10 base_entries11 base_entries12 base_entries13 base_entries14 base_entries15 base_entries16 base_entries17 base_entries18 base_entries19 base_entries20 base_entries21 base_entries22 base_entries23 base_entries24 base_entries25 base_entries26 base_entries27 base_entries28 base_entries29 base_entries30 base_entries31 base_entries32 ext_entries
832 base_entries=system.intel_mp_table.base_entries00 system.intel_mp_table.base_entries01 system.intel_mp_table.base_entries02 system.intel_mp_table.base_entries03 system.intel_mp_table.base_entries04 system.intel_mp_table.base_entries05 system.intel_mp_table.base_entries06 system.intel_mp_table.base_entries07 system.intel_mp_table.base_entries08 system.intel_mp_table.base_entries09 system.intel_mp_table.base_entries10 system.intel_mp_table.base_entries11 system.intel_mp_table.base_entries12 system.intel_mp_table.base_entries13 system.intel_mp_table.base_entries14 system.intel_mp_table.base_entries15 system.intel_mp_table.base_entries16 system.intel_mp_table.base_entries17 system.intel_mp_table.base_entries18 system.intel_mp_table.base_entries19 system.intel_mp_table.base_entries20 system.intel_mp_table.base_entries21 system.intel_mp_table.base_entries22 system.intel_mp_table.base_entries23 system.intel_mp_table.base_entries24 system.intel_mp_table.base_entries25 system.intel_mp_table.base_entries26 system.intel_mp_table.base_entries27 system.intel_mp_table.base_entries28 system.intel_mp_table.base_entries29 system.intel_mp_table.base_entries30 system.intel_mp_table.base_entries31 system.intel_mp_table.base_entries32
834 ext_entries=system.intel_mp_table.ext_entries
835 local_apic=4276092928
842 [system.intel_mp_table.base_entries00]
843 type=X86IntelMPProcessor
850 local_apic_version=20
854 [system.intel_mp_table.base_entries01]
855 type=X86IntelMPIOAPIC
862 [system.intel_mp_table.base_entries02]
868 [system.intel_mp_table.base_entries03]
874 [system.intel_mp_table.base_entries04]
875 type=X86IntelMPIOIntAssignment
877 dest_io_apic_intin=16
880 polarity=ConformPolarity
883 trigger=ConformTrigger
885 [system.intel_mp_table.base_entries05]
886 type=X86IntelMPIOIntAssignment
890 interrupt_type=ExtInt
891 polarity=ConformPolarity
894 trigger=ConformTrigger
896 [system.intel_mp_table.base_entries06]
897 type=X86IntelMPIOIntAssignment
902 polarity=ConformPolarity
905 trigger=ConformTrigger
907 [system.intel_mp_table.base_entries07]
908 type=X86IntelMPIOIntAssignment
912 interrupt_type=ExtInt
913 polarity=ConformPolarity
916 trigger=ConformTrigger
918 [system.intel_mp_table.base_entries08]
919 type=X86IntelMPIOIntAssignment
924 polarity=ConformPolarity
927 trigger=ConformTrigger
929 [system.intel_mp_table.base_entries09]
930 type=X86IntelMPIOIntAssignment
934 interrupt_type=ExtInt
935 polarity=ConformPolarity
938 trigger=ConformTrigger
940 [system.intel_mp_table.base_entries10]
941 type=X86IntelMPIOIntAssignment
946 polarity=ConformPolarity
949 trigger=ConformTrigger
951 [system.intel_mp_table.base_entries11]
952 type=X86IntelMPIOIntAssignment
956 interrupt_type=ExtInt
957 polarity=ConformPolarity
960 trigger=ConformTrigger
962 [system.intel_mp_table.base_entries12]
963 type=X86IntelMPIOIntAssignment
968 polarity=ConformPolarity
971 trigger=ConformTrigger
973 [system.intel_mp_table.base_entries13]
974 type=X86IntelMPIOIntAssignment
978 interrupt_type=ExtInt
979 polarity=ConformPolarity
982 trigger=ConformTrigger
984 [system.intel_mp_table.base_entries14]
985 type=X86IntelMPIOIntAssignment
990 polarity=ConformPolarity
993 trigger=ConformTrigger
995 [system.intel_mp_table.base_entries15]
996 type=X86IntelMPIOIntAssignment
1000 interrupt_type=ExtInt
1001 polarity=ConformPolarity
1004 trigger=ConformTrigger
1006 [system.intel_mp_table.base_entries16]
1007 type=X86IntelMPIOIntAssignment
1009 dest_io_apic_intin=6
1012 polarity=ConformPolarity
1015 trigger=ConformTrigger
1017 [system.intel_mp_table.base_entries17]
1018 type=X86IntelMPIOIntAssignment
1020 dest_io_apic_intin=0
1022 interrupt_type=ExtInt
1023 polarity=ConformPolarity
1026 trigger=ConformTrigger
1028 [system.intel_mp_table.base_entries18]
1029 type=X86IntelMPIOIntAssignment
1031 dest_io_apic_intin=7
1034 polarity=ConformPolarity
1037 trigger=ConformTrigger
1039 [system.intel_mp_table.base_entries19]
1040 type=X86IntelMPIOIntAssignment
1042 dest_io_apic_intin=0
1044 interrupt_type=ExtInt
1045 polarity=ConformPolarity
1048 trigger=ConformTrigger
1050 [system.intel_mp_table.base_entries20]
1051 type=X86IntelMPIOIntAssignment
1053 dest_io_apic_intin=8
1056 polarity=ConformPolarity
1059 trigger=ConformTrigger
1061 [system.intel_mp_table.base_entries21]
1062 type=X86IntelMPIOIntAssignment
1064 dest_io_apic_intin=0
1066 interrupt_type=ExtInt
1067 polarity=ConformPolarity
1070 trigger=ConformTrigger
1072 [system.intel_mp_table.base_entries22]
1073 type=X86IntelMPIOIntAssignment
1075 dest_io_apic_intin=9
1078 polarity=ConformPolarity
1081 trigger=ConformTrigger
1083 [system.intel_mp_table.base_entries23]
1084 type=X86IntelMPIOIntAssignment
1086 dest_io_apic_intin=0
1088 interrupt_type=ExtInt
1089 polarity=ConformPolarity
1092 trigger=ConformTrigger
1094 [system.intel_mp_table.base_entries24]
1095 type=X86IntelMPIOIntAssignment
1097 dest_io_apic_intin=10
1100 polarity=ConformPolarity
1103 trigger=ConformTrigger
1105 [system.intel_mp_table.base_entries25]
1106 type=X86IntelMPIOIntAssignment
1108 dest_io_apic_intin=0
1110 interrupt_type=ExtInt
1111 polarity=ConformPolarity
1114 trigger=ConformTrigger
1116 [system.intel_mp_table.base_entries26]
1117 type=X86IntelMPIOIntAssignment
1119 dest_io_apic_intin=11
1122 polarity=ConformPolarity
1125 trigger=ConformTrigger
1127 [system.intel_mp_table.base_entries27]
1128 type=X86IntelMPIOIntAssignment
1130 dest_io_apic_intin=0
1132 interrupt_type=ExtInt
1133 polarity=ConformPolarity
1136 trigger=ConformTrigger
1138 [system.intel_mp_table.base_entries28]
1139 type=X86IntelMPIOIntAssignment
1141 dest_io_apic_intin=12
1144 polarity=ConformPolarity
1147 trigger=ConformTrigger
1149 [system.intel_mp_table.base_entries29]
1150 type=X86IntelMPIOIntAssignment
1152 dest_io_apic_intin=0
1154 interrupt_type=ExtInt
1155 polarity=ConformPolarity
1158 trigger=ConformTrigger
1160 [system.intel_mp_table.base_entries30]
1161 type=X86IntelMPIOIntAssignment
1163 dest_io_apic_intin=13
1166 polarity=ConformPolarity
1169 trigger=ConformTrigger
1171 [system.intel_mp_table.base_entries31]
1172 type=X86IntelMPIOIntAssignment
1174 dest_io_apic_intin=0
1176 interrupt_type=ExtInt
1177 polarity=ConformPolarity
1180 trigger=ConformTrigger
1182 [system.intel_mp_table.base_entries32]
1183 type=X86IntelMPIOIntAssignment
1185 dest_io_apic_intin=14
1188 polarity=ConformPolarity
1191 trigger=ConformTrigger
1193 [system.intel_mp_table.ext_entries]
1194 type=X86IntelMPBusHierarchy
1198 subtractive_decode=true
1207 clk_domain=system.clk_domain
1210 use_default_range=false
1212 default=system.pc.pciconfig.pio
1213 master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side
1214 slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master
1219 addr_ranges=0:134217727
1221 clk_domain=system.clk_domain
1223 forward_snoops=false
1228 prefetch_on_access=false
1231 sequential_access=false
1234 tags=system.iocache.tags
1238 cpu_side=system.iobus.master[18]
1239 mem_side=system.membus.slave[4]
1241 [system.iocache.tags]
1245 clk_domain=system.clk_domain
1248 sequential_access=false
1254 addr_ranges=0:18446744073709551615
1256 clk_domain=system.cpu_clk_domain
1263 prefetch_on_access=false
1266 sequential_access=false
1269 tags=system.l2c.tags
1273 cpu_side=system.toL2Bus.master[0]
1274 mem_side=system.membus.slave[2]
1280 clk_domain=system.cpu_clk_domain
1283 sequential_access=false
1288 children=badaddr_responder
1289 clk_domain=system.clk_domain
1293 use_default_range=false
1295 default=system.membus.badaddr_responder.pio
1296 master=system.bridge.slave system.cpu0.interrupts.pio system.cpu0.interrupts.int_slave system.physmem.port
1297 slave=system.apicbridge.master system.system_port system.l2c.mem_side system.cpu0.interrupts.int_master system.iocache.mem_side
1299 [system.membus.badaddr_responder]
1301 clk_domain=system.clk_domain
1309 ret_data32=4294967295
1310 ret_data64=18446744073709551615
1315 pio=system.membus.default
1319 children=behind_pci com_1 fake_com_2 fake_com_3 fake_com_4 fake_floppy i_dont_exist pciconfig south_bridge
1321 intrctrl=system.intrctrl
1324 [system.pc.behind_pci]
1326 clk_domain=system.clk_domain
1329 pio_addr=9223372036854779128
1334 ret_data32=4294967295
1335 ret_data64=18446744073709551615
1340 pio=system.iobus.master[12]
1345 clk_domain=system.clk_domain
1347 pio_addr=9223372036854776824
1351 terminal=system.pc.com_1.terminal
1352 pio=system.iobus.master[13]
1354 [system.pc.com_1.terminal]
1357 intr_control=system.intrctrl
1362 [system.pc.fake_com_2]
1364 clk_domain=system.clk_domain
1367 pio_addr=9223372036854776568
1372 ret_data32=4294967295
1373 ret_data64=18446744073709551615
1378 pio=system.iobus.master[14]
1380 [system.pc.fake_com_3]
1382 clk_domain=system.clk_domain
1385 pio_addr=9223372036854776808
1390 ret_data32=4294967295
1391 ret_data64=18446744073709551615
1396 pio=system.iobus.master[15]
1398 [system.pc.fake_com_4]
1400 clk_domain=system.clk_domain
1403 pio_addr=9223372036854776552
1408 ret_data32=4294967295
1409 ret_data64=18446744073709551615
1414 pio=system.iobus.master[16]
1416 [system.pc.fake_floppy]
1418 clk_domain=system.clk_domain
1421 pio_addr=9223372036854776818
1426 ret_data32=4294967295
1427 ret_data64=18446744073709551615
1432 pio=system.iobus.master[17]
1434 [system.pc.i_dont_exist]
1436 clk_domain=system.clk_domain
1439 pio_addr=9223372036854775936
1444 ret_data32=4294967295
1445 ret_data64=18446744073709551615
1450 pio=system.iobus.master[11]
1452 [system.pc.pciconfig]
1455 clk_domain=system.clk_domain
1462 pio=system.iobus.default
1464 [system.pc.south_bridge]
1466 children=cmos dma1 ide int_lines0 int_lines1 int_lines2 int_lines3 int_lines4 int_lines5 int_lines6 io_apic keyboard pic1 pic2 pit speaker
1467 cmos=system.pc.south_bridge.cmos
1468 dma1=system.pc.south_bridge.dma1
1470 io_apic=system.pc.south_bridge.io_apic
1471 keyboard=system.pc.south_bridge.keyboard
1472 pic1=system.pc.south_bridge.pic1
1473 pic2=system.pc.south_bridge.pic2
1474 pit=system.pc.south_bridge.pit
1476 speaker=system.pc.south_bridge.speaker
1478 [system.pc.south_bridge.cmos]
1481 clk_domain=system.clk_domain
1483 int_pin=system.pc.south_bridge.cmos.int_pin
1484 pio_addr=9223372036854775920
1487 time=Sun Jan 1 00:00:00 2012
1488 pio=system.iobus.master[1]
1490 [system.pc.south_bridge.cmos.int_pin]
1491 type=X86IntSourcePin
1494 [system.pc.south_bridge.dma1]
1496 clk_domain=system.clk_domain
1498 pio_addr=9223372036854775808
1501 pio=system.iobus.master[2]
1503 [system.pc.south_bridge.ide]
1505 children=disks0 disks1
1542 MSICAPMsgUpperAddr=0
1543 MSICAPNextCapability=0
1547 MSIXCAPNextCapability=0
1557 PMCAPNextCapability=0
1562 PXCAPDevCapabilities=0
1569 PXCAPNextCapability=0
1577 clk_domain=system.clk_domain
1578 config_latency=20000
1580 disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
1589 config=system.iobus.master[4]
1590 dma=system.iobus.slave[1]
1591 pio=system.iobus.master[3]
1593 [system.pc.south_bridge.ide.disks0]
1599 image=system.pc.south_bridge.ide.disks0.image
1601 [system.pc.south_bridge.ide.disks0.image]
1604 child=system.pc.south_bridge.ide.disks0.image.child
1610 [system.pc.south_bridge.ide.disks0.image.child]
1613 image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
1616 [system.pc.south_bridge.ide.disks1]
1622 image=system.pc.south_bridge.ide.disks1.image
1624 [system.pc.south_bridge.ide.disks1.image]
1627 child=system.pc.south_bridge.ide.disks1.image.child
1633 [system.pc.south_bridge.ide.disks1.image.child]
1636 image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
1639 [system.pc.south_bridge.int_lines0]
1643 sink=system.pc.south_bridge.int_lines0.sink
1644 source=system.pc.south_bridge.pic1.output
1646 [system.pc.south_bridge.int_lines0.sink]
1648 device=system.pc.south_bridge.io_apic
1652 [system.pc.south_bridge.int_lines1]
1656 sink=system.pc.south_bridge.int_lines1.sink
1657 source=system.pc.south_bridge.pic2.output
1659 [system.pc.south_bridge.int_lines1.sink]
1661 device=system.pc.south_bridge.pic1
1665 [system.pc.south_bridge.int_lines2]
1669 sink=system.pc.south_bridge.int_lines2.sink
1670 source=system.pc.south_bridge.cmos.int_pin
1672 [system.pc.south_bridge.int_lines2.sink]
1674 device=system.pc.south_bridge.pic2
1678 [system.pc.south_bridge.int_lines3]
1682 sink=system.pc.south_bridge.int_lines3.sink
1683 source=system.pc.south_bridge.pit.int_pin
1685 [system.pc.south_bridge.int_lines3.sink]
1687 device=system.pc.south_bridge.pic1
1691 [system.pc.south_bridge.int_lines4]
1695 sink=system.pc.south_bridge.int_lines4.sink
1696 source=system.pc.south_bridge.pit.int_pin
1698 [system.pc.south_bridge.int_lines4.sink]
1700 device=system.pc.south_bridge.io_apic
1704 [system.pc.south_bridge.int_lines5]
1708 sink=system.pc.south_bridge.int_lines5.sink
1709 source=system.pc.south_bridge.keyboard.keyboard_int_pin
1711 [system.pc.south_bridge.int_lines5.sink]
1713 device=system.pc.south_bridge.io_apic
1717 [system.pc.south_bridge.int_lines6]
1721 sink=system.pc.south_bridge.int_lines6.sink
1722 source=system.pc.south_bridge.keyboard.mouse_int_pin
1724 [system.pc.south_bridge.int_lines6.sink]
1726 device=system.pc.south_bridge.io_apic
1730 [system.pc.south_bridge.io_apic]
1733 clk_domain=system.clk_domain
1735 external_int_pic=system.pc.south_bridge.pic1
1740 int_master=system.iobus.slave[2]
1741 pio=system.iobus.master[10]
1743 [system.pc.south_bridge.keyboard]
1745 children=keyboard_int_pin mouse_int_pin
1746 clk_domain=system.clk_domain
1747 command_port=9223372036854775908
1748 data_port=9223372036854775904
1750 keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
1751 mouse_int_pin=system.pc.south_bridge.keyboard.mouse_int_pin
1755 pio=system.iobus.master[5]
1757 [system.pc.south_bridge.keyboard.keyboard_int_pin]
1758 type=X86IntSourcePin
1761 [system.pc.south_bridge.keyboard.mouse_int_pin]
1762 type=X86IntSourcePin
1765 [system.pc.south_bridge.pic1]
1768 clk_domain=system.clk_domain
1771 output=system.pc.south_bridge.pic1.output
1772 pio_addr=9223372036854775840
1774 slave=system.pc.south_bridge.pic2
1776 pio=system.iobus.master[6]
1778 [system.pc.south_bridge.pic1.output]
1779 type=X86IntSourcePin
1782 [system.pc.south_bridge.pic2]
1785 clk_domain=system.clk_domain
1788 output=system.pc.south_bridge.pic2.output
1789 pio_addr=9223372036854775968
1793 pio=system.iobus.master[7]
1795 [system.pc.south_bridge.pic2.output]
1796 type=X86IntSourcePin
1799 [system.pc.south_bridge.pit]
1802 clk_domain=system.clk_domain
1804 int_pin=system.pc.south_bridge.pit.int_pin
1805 pio_addr=9223372036854775872
1808 pio=system.iobus.master[8]
1810 [system.pc.south_bridge.pit.int_pin]
1811 type=X86IntSourcePin
1814 [system.pc.south_bridge.speaker]
1816 clk_domain=system.clk_domain
1818 i8254=system.pc.south_bridge.pit
1819 pio_addr=9223372036854775905
1822 pio=system.iobus.master[9]
1827 addr_mapping=RoRaBaChCo
1831 clk_domain=system.clk_domain
1832 conf_table_reported=true
1834 device_rowbuffer_size=1024
1838 max_accesses_per_row=16
1839 mem_sched_policy=frfcfs
1840 min_writes_per_switch=16
1842 page_policy=open_adaptive
1846 static_backend_latency=10000
1847 static_frontend_latency=10000
1862 write_buffer_size=64
1863 write_high_thresh_perc=85
1864 write_low_thresh_perc=50
1865 port=system.membus.master[3]
1867 [system.smbios_table]
1868 type=X86SMBiosSMBiosTable
1873 structures=system.smbios_table.structures
1875 [system.smbios_table.structures]
1876 type=X86SMBiosBiosInformation
1877 characteristic_ext_bytes=
1879 emb_cont_firmware_major=0
1880 emb_cont_firmware_minor=0
1884 release_date=06/08/2008
1886 starting_addr_segment=0
1892 clk_domain=system.cpu_clk_domain
1896 use_default_range=false
1898 master=system.l2c.cpu_side
1899 slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
1901 [system.voltage_domain]