stats: updates due to changes to x86, stale configs.
[gem5.git] / tests / long / fs / 80.solaris-boot / ref / sparc / solaris / t1000-simple-atomic / config.ini
1 [root]
2 type=Root
3 children=system
4 eventq_index=0
5 full_system=true
6 sim_quantum=0
7 time_sync_enable=false
8 time_sync_period=200000000
9 time_sync_spin_threshold=200000
10
11 [system]
12 type=SparcSystem
13 children=bridge clk_domain cpu cpu_clk_domain disk0 dvfs_handler hypervisor_desc intrctrl iobus membus nvram partition_desc physmem0 physmem1 rom t1000 voltage_domain
14 boot_osflags=a
15 cache_line_size=64
16 clk_domain=system.clk_domain
17 eventq_index=0
18 hypervisor_addr=1099243257856
19 hypervisor_bin=/scratch/nilay/GEM5/system/binaries/q_new.bin
20 hypervisor_desc=system.hypervisor_desc
21 hypervisor_desc_addr=133446500352
22 hypervisor_desc_bin=/scratch/nilay/GEM5/system/binaries/1up-hv.bin
23 init_param=0
24 kernel=
25 kernel_addr_check=true
26 load_addr_mask=1099511627775
27 load_offset=0
28 mem_mode=atomic
29 mem_ranges=1048576:68157439 2147483648:2415919103
30 memories=system.nvram system.physmem1 system.hypervisor_desc system.partition_desc system.physmem0 system.rom
31 num_work_ids=16
32 nvram=system.nvram
33 nvram_addr=133429198848
34 nvram_bin=/scratch/nilay/GEM5/system/binaries/nvram1
35 openboot_addr=1099243716608
36 openboot_bin=/scratch/nilay/GEM5/system/binaries/openboot_new.bin
37 partition_desc=system.partition_desc
38 partition_desc_addr=133445976064
39 partition_desc_bin=/scratch/nilay/GEM5/system/binaries/1up-md.bin
40 readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
41 reset_addr=1099243192320
42 reset_bin=/scratch/nilay/GEM5/system/binaries/reset_new.bin
43 rom=system.rom
44 symbolfile=
45 work_begin_ckpt_count=0
46 work_begin_cpu_id_exit=-1
47 work_begin_exit_count=0
48 work_cpus_ckpt_count=0
49 work_end_ckpt_count=0
50 work_end_exit_count=0
51 work_item_id=-1
52 system_port=system.membus.slave[0]
53
54 [system.bridge]
55 type=Bridge
56 clk_domain=system.clk_domain
57 delay=100
58 eventq_index=0
59 ranges=133412421632:133412421639 134217728000:554050781183 644245094400:652835028991 725849473024:1095485095935 1099255955456:1099255955463
60 req_size=16
61 resp_size=16
62 master=system.iobus.slave[0]
63 slave=system.membus.master[2]
64
65 [system.clk_domain]
66 type=SrcClockDomain
67 clock=2
68 domain_id=-1
69 eventq_index=0
70 init_perf_level=0
71 voltage_domain=system.voltage_domain
72
73 [system.cpu]
74 type=AtomicSimpleCPU
75 children=dtb interrupts isa itb tracer
76 branchPred=Null
77 checker=Null
78 clk_domain=system.cpu_clk_domain
79 cpu_id=0
80 do_checkpoint_insts=true
81 do_quiesce=true
82 do_statistics_insts=true
83 dtb=system.cpu.dtb
84 eventq_index=0
85 fastmem=false
86 function_trace=false
87 function_trace_start=0
88 interrupts=system.cpu.interrupts
89 isa=system.cpu.isa
90 itb=system.cpu.itb
91 max_insts_all_threads=0
92 max_insts_any_thread=0
93 max_loads_all_threads=0
94 max_loads_any_thread=0
95 numThreads=1
96 profile=0
97 progress_interval=0
98 simpoint_start_insts=
99 simulate_data_stalls=false
100 simulate_inst_stalls=false
101 socket_id=0
102 switched_out=false
103 system=system
104 tracer=system.cpu.tracer
105 width=1
106 workload=
107 dcache_port=system.membus.slave[2]
108 icache_port=system.membus.slave[1]
109
110 [system.cpu.dtb]
111 type=SparcTLB
112 eventq_index=0
113 size=64
114
115 [system.cpu.interrupts]
116 type=SparcInterrupts
117 eventq_index=0
118
119 [system.cpu.isa]
120 type=SparcISA
121 eventq_index=0
122
123 [system.cpu.itb]
124 type=SparcTLB
125 eventq_index=0
126 size=64
127
128 [system.cpu.tracer]
129 type=ExeTracer
130 eventq_index=0
131
132 [system.cpu_clk_domain]
133 type=SrcClockDomain
134 clock=2
135 domain_id=-1
136 eventq_index=0
137 init_perf_level=0
138 voltage_domain=system.voltage_domain
139
140 [system.disk0]
141 type=MmDisk
142 children=image
143 clk_domain=system.clk_domain
144 eventq_index=0
145 image=system.disk0.image
146 pio_addr=134217728000
147 pio_latency=200
148 system=system
149 pio=system.iobus.master[14]
150
151 [system.disk0.image]
152 type=CowDiskImage
153 children=child
154 child=system.disk0.image.child
155 eventq_index=0
156 image_file=
157 read_only=false
158 table_size=65536
159
160 [system.disk0.image.child]
161 type=RawDiskImage
162 eventq_index=0
163 image_file=/scratch/nilay/GEM5/system/disks/disk.s10hw2
164 read_only=true
165
166 [system.dvfs_handler]
167 type=DVFSHandler
168 domains=
169 enable=false
170 eventq_index=0
171 sys_clk_domain=system.clk_domain
172 transition_latency=200000
173
174 [system.hypervisor_desc]
175 type=SimpleMemory
176 bandwidth=0.000000
177 clk_domain=system.clk_domain
178 conf_table_reported=true
179 eventq_index=0
180 in_addr_map=true
181 latency=60
182 latency_var=0
183 null=false
184 range=133446500352:133446508543
185 port=system.membus.master[5]
186
187 [system.intrctrl]
188 type=IntrControl
189 eventq_index=0
190 sys=system
191
192 [system.iobus]
193 type=NoncoherentXBar
194 clk_domain=system.clk_domain
195 eventq_index=0
196 header_cycles=1
197 use_default_range=false
198 width=8
199 master=system.t1000.fake_clk.pio system.t1000.fake_membnks.pio system.t1000.fake_l2_1.pio system.t1000.fake_l2_2.pio system.t1000.fake_l2_3.pio system.t1000.fake_l2_4.pio system.t1000.fake_l2esr_1.pio system.t1000.fake_l2esr_2.pio system.t1000.fake_l2esr_3.pio system.t1000.fake_l2esr_4.pio system.t1000.fake_ssi.pio system.t1000.fake_jbi.pio system.t1000.puart0.pio system.t1000.hvuart.pio system.disk0.pio
200 slave=system.bridge.master
201
202 [system.membus]
203 type=CoherentXBar
204 children=badaddr_responder
205 clk_domain=system.clk_domain
206 eventq_index=0
207 header_cycles=1
208 snoop_filter=Null
209 system=system
210 use_default_range=false
211 width=8
212 default=system.membus.badaddr_responder.pio
213 master=system.t1000.iob.pio system.t1000.htod.pio system.bridge.slave system.rom.port system.nvram.port system.hypervisor_desc.port system.partition_desc.port system.physmem0.port system.physmem1.port
214 slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
215
216 [system.membus.badaddr_responder]
217 type=IsaFake
218 clk_domain=system.clk_domain
219 eventq_index=0
220 fake_mem=false
221 pio_addr=0
222 pio_latency=200
223 pio_size=8
224 ret_bad_addr=true
225 ret_data16=65535
226 ret_data32=4294967295
227 ret_data64=18446744073709551615
228 ret_data8=255
229 system=system
230 update_data=false
231 warn_access=
232 pio=system.membus.default
233
234 [system.nvram]
235 type=SimpleMemory
236 bandwidth=0.000000
237 clk_domain=system.clk_domain
238 conf_table_reported=true
239 eventq_index=0
240 in_addr_map=true
241 latency=60
242 latency_var=0
243 null=false
244 range=133429198848:133429207039
245 port=system.membus.master[4]
246
247 [system.partition_desc]
248 type=SimpleMemory
249 bandwidth=0.000000
250 clk_domain=system.clk_domain
251 conf_table_reported=true
252 eventq_index=0
253 in_addr_map=true
254 latency=60
255 latency_var=0
256 null=false
257 range=133445976064:133445984255
258 port=system.membus.master[6]
259
260 [system.physmem0]
261 type=SimpleMemory
262 bandwidth=0.000000
263 clk_domain=system.clk_domain
264 conf_table_reported=true
265 eventq_index=0
266 in_addr_map=true
267 latency=60
268 latency_var=0
269 null=false
270 range=1048576:68157439
271 port=system.membus.master[7]
272
273 [system.physmem1]
274 type=SimpleMemory
275 bandwidth=0.000000
276 clk_domain=system.clk_domain
277 conf_table_reported=true
278 eventq_index=0
279 in_addr_map=true
280 latency=60
281 latency_var=0
282 null=false
283 range=2147483648:2415919103
284 port=system.membus.master[8]
285
286 [system.rom]
287 type=SimpleMemory
288 bandwidth=0.000000
289 clk_domain=system.clk_domain
290 conf_table_reported=true
291 eventq_index=0
292 in_addr_map=true
293 latency=60
294 latency_var=0
295 null=false
296 range=1099243192320:1099251580927
297 port=system.membus.master[3]
298
299 [system.t1000]
300 type=T1000
301 children=fake_clk fake_jbi fake_l2_1 fake_l2_2 fake_l2_3 fake_l2_4 fake_l2esr_1 fake_l2esr_2 fake_l2esr_3 fake_l2esr_4 fake_membnks fake_ssi hterm htod hvuart iob pterm puart0
302 eventq_index=0
303 intrctrl=system.intrctrl
304 system=system
305
306 [system.t1000.fake_clk]
307 type=IsaFake
308 clk_domain=system.clk_domain
309 eventq_index=0
310 fake_mem=false
311 pio_addr=644245094400
312 pio_latency=200
313 pio_size=4294967296
314 ret_bad_addr=false
315 ret_data16=65535
316 ret_data32=4294967295
317 ret_data64=18446744073709551615
318 ret_data8=255
319 system=system
320 update_data=false
321 warn_access=
322 pio=system.iobus.master[0]
323
324 [system.t1000.fake_jbi]
325 type=IsaFake
326 clk_domain=system.clk_domain
327 eventq_index=0
328 fake_mem=false
329 pio_addr=549755813888
330 pio_latency=200
331 pio_size=4294967296
332 ret_bad_addr=false
333 ret_data16=65535
334 ret_data32=4294967295
335 ret_data64=18446744073709551615
336 ret_data8=255
337 system=system
338 update_data=false
339 warn_access=
340 pio=system.iobus.master[11]
341
342 [system.t1000.fake_l2_1]
343 type=IsaFake
344 clk_domain=system.clk_domain
345 eventq_index=0
346 fake_mem=false
347 pio_addr=725849473024
348 pio_latency=200
349 pio_size=8
350 ret_bad_addr=false
351 ret_data16=65535
352 ret_data32=4294967295
353 ret_data64=1
354 ret_data8=255
355 system=system
356 update_data=true
357 warn_access=
358 pio=system.iobus.master[2]
359
360 [system.t1000.fake_l2_2]
361 type=IsaFake
362 clk_domain=system.clk_domain
363 eventq_index=0
364 fake_mem=false
365 pio_addr=725849473088
366 pio_latency=200
367 pio_size=8
368 ret_bad_addr=false
369 ret_data16=65535
370 ret_data32=4294967295
371 ret_data64=1
372 ret_data8=255
373 system=system
374 update_data=true
375 warn_access=
376 pio=system.iobus.master[3]
377
378 [system.t1000.fake_l2_3]
379 type=IsaFake
380 clk_domain=system.clk_domain
381 eventq_index=0
382 fake_mem=false
383 pio_addr=725849473152
384 pio_latency=200
385 pio_size=8
386 ret_bad_addr=false
387 ret_data16=65535
388 ret_data32=4294967295
389 ret_data64=1
390 ret_data8=255
391 system=system
392 update_data=true
393 warn_access=
394 pio=system.iobus.master[4]
395
396 [system.t1000.fake_l2_4]
397 type=IsaFake
398 clk_domain=system.clk_domain
399 eventq_index=0
400 fake_mem=false
401 pio_addr=725849473216
402 pio_latency=200
403 pio_size=8
404 ret_bad_addr=false
405 ret_data16=65535
406 ret_data32=4294967295
407 ret_data64=1
408 ret_data8=255
409 system=system
410 update_data=true
411 warn_access=
412 pio=system.iobus.master[5]
413
414 [system.t1000.fake_l2esr_1]
415 type=IsaFake
416 clk_domain=system.clk_domain
417 eventq_index=0
418 fake_mem=false
419 pio_addr=734439407616
420 pio_latency=200
421 pio_size=8
422 ret_bad_addr=false
423 ret_data16=65535
424 ret_data32=4294967295
425 ret_data64=0
426 ret_data8=255
427 system=system
428 update_data=true
429 warn_access=
430 pio=system.iobus.master[6]
431
432 [system.t1000.fake_l2esr_2]
433 type=IsaFake
434 clk_domain=system.clk_domain
435 eventq_index=0
436 fake_mem=false
437 pio_addr=734439407680
438 pio_latency=200
439 pio_size=8
440 ret_bad_addr=false
441 ret_data16=65535
442 ret_data32=4294967295
443 ret_data64=0
444 ret_data8=255
445 system=system
446 update_data=true
447 warn_access=
448 pio=system.iobus.master[7]
449
450 [system.t1000.fake_l2esr_3]
451 type=IsaFake
452 clk_domain=system.clk_domain
453 eventq_index=0
454 fake_mem=false
455 pio_addr=734439407744
456 pio_latency=200
457 pio_size=8
458 ret_bad_addr=false
459 ret_data16=65535
460 ret_data32=4294967295
461 ret_data64=0
462 ret_data8=255
463 system=system
464 update_data=true
465 warn_access=
466 pio=system.iobus.master[8]
467
468 [system.t1000.fake_l2esr_4]
469 type=IsaFake
470 clk_domain=system.clk_domain
471 eventq_index=0
472 fake_mem=false
473 pio_addr=734439407808
474 pio_latency=200
475 pio_size=8
476 ret_bad_addr=false
477 ret_data16=65535
478 ret_data32=4294967295
479 ret_data64=0
480 ret_data8=255
481 system=system
482 update_data=true
483 warn_access=
484 pio=system.iobus.master[9]
485
486 [system.t1000.fake_membnks]
487 type=IsaFake
488 clk_domain=system.clk_domain
489 eventq_index=0
490 fake_mem=false
491 pio_addr=648540061696
492 pio_latency=200
493 pio_size=16384
494 ret_bad_addr=false
495 ret_data16=65535
496 ret_data32=4294967295
497 ret_data64=0
498 ret_data8=255
499 system=system
500 update_data=false
501 warn_access=
502 pio=system.iobus.master[1]
503
504 [system.t1000.fake_ssi]
505 type=IsaFake
506 clk_domain=system.clk_domain
507 eventq_index=0
508 fake_mem=false
509 pio_addr=1095216660480
510 pio_latency=200
511 pio_size=268435456
512 ret_bad_addr=false
513 ret_data16=65535
514 ret_data32=4294967295
515 ret_data64=18446744073709551615
516 ret_data8=255
517 system=system
518 update_data=false
519 warn_access=
520 pio=system.iobus.master[10]
521
522 [system.t1000.hterm]
523 type=Terminal
524 eventq_index=0
525 intr_control=system.intrctrl
526 number=0
527 output=true
528 port=3456
529
530 [system.t1000.htod]
531 type=DumbTOD
532 clk_domain=system.clk_domain
533 eventq_index=0
534 pio_addr=1099255906296
535 pio_latency=200
536 system=system
537 time=Thu Jan 1 00:00:00 2009
538 pio=system.membus.master[1]
539
540 [system.t1000.hvuart]
541 type=Uart8250
542 clk_domain=system.clk_domain
543 eventq_index=0
544 pio_addr=1099255955456
545 pio_latency=200
546 platform=system.t1000
547 system=system
548 terminal=system.t1000.hterm
549 pio=system.iobus.master[13]
550
551 [system.t1000.iob]
552 type=Iob
553 clk_domain=system.clk_domain
554 eventq_index=0
555 pio_latency=2
556 platform=system.t1000
557 system=system
558 pio=system.membus.master[0]
559
560 [system.t1000.pterm]
561 type=Terminal
562 eventq_index=0
563 intr_control=system.intrctrl
564 number=0
565 output=true
566 port=3456
567
568 [system.t1000.puart0]
569 type=Uart8250
570 clk_domain=system.clk_domain
571 eventq_index=0
572 pio_addr=133412421632
573 pio_latency=200
574 platform=system.t1000
575 system=system
576 terminal=system.t1000.pterm
577 pio=system.iobus.master[12]
578
579 [system.voltage_domain]
580 type=VoltageDomain
581 eventq_index=0
582 voltage=1.000000
583