tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 full_system=true
   5 time_sync_enable=false
   6 time_sync_period=200000000
   7 time_sync_spin_threshold=200000
   8
   9 [system]
  10 type=SparcSystem
  11 children=bridge cpu disk0 hypervisor_desc intrctrl iobus membus nvram partition_desc physmem physmem2 rom t1000
  12 boot_osflags=a
  13 hypervisor_addr=1099243257856
  14 hypervisor_bin=/dist/m5/system/binaries/q_new.bin
  15 hypervisor_desc=system.hypervisor_desc
  16 hypervisor_desc_addr=133446500352
  17 hypervisor_desc_bin=/dist/m5/system/binaries/1up-hv.bin
  18 init_param=0
  19 kernel=
  20 load_addr_mask=1099511627775
  21 mem_mode=atomic
  22 memories=system.hypervisor_desc system.nvram system.partition_desc system.physmem2 system.rom system.physmem
  23 num_work_ids=16
  24 nvram=system.nvram
  25 nvram_addr=133429198848
  26 nvram_bin=/dist/m5/system/binaries/nvram1
  27 openboot_addr=1099243716608
  28 openboot_bin=/dist/m5/system/binaries/openboot_new.bin
  29 partition_desc=system.partition_desc
  30 partition_desc_addr=133445976064
  31 partition_desc_bin=/dist/m5/system/binaries/1up-md.bin
  32 readfile=tests/halt.sh
  33 reset_addr=1099243192320
  34 reset_bin=/dist/m5/system/binaries/reset_new.bin
  35 rom=system.rom
  36 symbolfile=
  37 work_begin_ckpt_count=0
  38 work_begin_cpu_id_exit=-1
  39 work_begin_exit_count=0
  40 work_cpus_ckpt_count=0
  41 work_end_ckpt_count=0
  42 work_end_exit_count=0
  43 work_item_id=-1
  44 system_port=system.membus.slave[0]
  45
  46 [system.bridge]
  47 type=Bridge
  48 delay=100
  49 nack_delay=8
  50 ranges=133412421632:133412421639 134217728000:554050781183 644245094400:652835028991 725849473024:1095485095935 1099255955456:1099255955463
  51 req_size=16
  52 resp_size=16
  53 write_ack=false
  54 master=system.iobus.slave[0]
  55 slave=system.membus.master[2]
  56
  57 [system.cpu]
  58 type=AtomicSimpleCPU
  59 children=dtb interrupts itb tracer
  60 checker=Null
  61 clock=1
  62 cpu_id=0
  63 defer_registration=false
  64 do_checkpoint_insts=true
  65 do_quiesce=true
  66 do_statistics_insts=true
  67 dtb=system.cpu.dtb
  68 fastmem=false
  69 function_trace=false
  70 function_trace_start=0
  71 interrupts=system.cpu.interrupts
  72 itb=system.cpu.itb
  73 max_insts_all_threads=0
  74 max_insts_any_thread=0
  75 max_loads_all_threads=0
  76 max_loads_any_thread=0
  77 numThreads=1
  78 phase=0
  79 profile=0
  80 progress_interval=0
  81 simulate_data_stalls=false
  82 simulate_inst_stalls=false
  83 system=system
  84 tracer=system.cpu.tracer
  85 width=1
  86 workload=
  87 dcache_port=system.membus.slave[2]
  88 icache_port=system.membus.slave[1]
  89
  90 [system.cpu.dtb]
  91 type=SparcTLB
  92 size=64
  93
  94 [system.cpu.interrupts]
  95 type=SparcInterrupts
  96
  97 [system.cpu.itb]
  98 type=SparcTLB
  99 size=64
 100
 101 [system.cpu.tracer]
 102 type=ExeTracer
 103
 104 [system.disk0]
 105 type=MmDisk
 106 children=image
 107 image=system.disk0.image
 108 pio_addr=134217728000
 109 pio_latency=2
 110 system=system
 111 pio=system.iobus.master[14]
 112
 113 [system.disk0.image]
 114 type=CowDiskImage
 115 children=child
 116 child=system.disk0.image.child
 117 image_file=
 118 read_only=false
 119 table_size=65536
 120
 121 [system.disk0.image.child]
 122 type=RawDiskImage
 123 image_file=/dist/m5/system/disks/disk.s10hw2
 124 read_only=true
 125
 126 [system.hypervisor_desc]
 127 type=SimpleMemory
 128 conf_table_reported=false
 129 file=
 130 in_addr_map=true
 131 latency=60
 132 latency_var=0
 133 null=false
 134 range=133446500352:133446508543
 135 zero=false
 136 port=system.membus.master[7]
 137
 138 [system.intrctrl]
 139 type=IntrControl
 140 sys=system
 141
 142 [system.iobus]
 143 type=Bus
 144 block_size=64
 145 bus_id=0
 146 clock=2
 147 header_cycles=1
 148 use_default_range=false
 149 width=64
 150 master=system.t1000.fake_clk.pio system.t1000.fake_membnks.pio system.t1000.fake_l2_1.pio system.t1000.fake_l2_2.pio system.t1000.fake_l2_3.pio system.t1000.fake_l2_4.pio system.t1000.fake_l2esr_1.pio system.t1000.fake_l2esr_2.pio system.t1000.fake_l2esr_3.pio system.t1000.fake_l2esr_4.pio system.t1000.fake_ssi.pio system.t1000.fake_jbi.pio system.t1000.puart0.pio system.t1000.hvuart.pio system.disk0.pio
 151 slave=system.bridge.master
 152
 153 [system.membus]
 154 type=Bus
 155 children=badaddr_responder
 156 block_size=64
 157 bus_id=1
 158 clock=2
 159 header_cycles=1
 160 use_default_range=false
 161 width=64
 162 default=system.membus.badaddr_responder.pio
 163 master=system.t1000.iob.pio system.t1000.htod.pio system.bridge.slave system.physmem.port[0] system.physmem2.port[0] system.rom.port[0] system.nvram.port[0] system.hypervisor_desc.port[0] system.partition_desc.port[0]
 164 slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
 165
 166 [system.membus.badaddr_responder]
 167 type=IsaFake
 168 fake_mem=false
 169 pio_addr=0
 170 pio_latency=2
 171 pio_size=8
 172 ret_bad_addr=true
 173 ret_data16=65535
 174 ret_data32=4294967295
 175 ret_data64=18446744073709551615
 176 ret_data8=255
 177 system=system
 178 update_data=false
 179 warn_access=
 180 pio=system.membus.default
 181
 182 [system.nvram]
 183 type=SimpleMemory
 184 conf_table_reported=false
 185 file=
 186 in_addr_map=true
 187 latency=60
 188 latency_var=0
 189 null=false
 190 range=133429198848:133429207039
 191 zero=false
 192 port=system.membus.master[6]
 193
 194 [system.partition_desc]
 195 type=SimpleMemory
 196 conf_table_reported=false
 197 file=
 198 in_addr_map=true
 199 latency=60
 200 latency_var=0
 201 null=false
 202 range=133445976064:133445984255
 203 zero=false
 204 port=system.membus.master[8]
 205
 206 [system.physmem]
 207 type=SimpleMemory
 208 conf_table_reported=false
 209 file=
 210 in_addr_map=true
 211 latency=60
 212 latency_var=0
 213 null=false
 214 range=1048576:68157439
 215 zero=true
 216 port=system.membus.master[3]
 217
 218 [system.physmem2]
 219 type=SimpleMemory
 220 conf_table_reported=false
 221 file=
 222 in_addr_map=true
 223 latency=60
 224 latency_var=0
 225 null=false
 226 range=2147483648:2415919103
 227 zero=true
 228 port=system.membus.master[4]
 229
 230 [system.rom]
 231 type=SimpleMemory
 232 conf_table_reported=false
 233 file=
 234 in_addr_map=true
 235 latency=60
 236 latency_var=0
 237 null=false
 238 range=1099243192320:1099251580927
 239 zero=false
 240 port=system.membus.master[5]
 241
 242 [system.t1000]
 243 type=T1000
 244 children=fake_clk fake_jbi fake_l2_1 fake_l2_2 fake_l2_3 fake_l2_4 fake_l2esr_1 fake_l2esr_2 fake_l2esr_3 fake_l2esr_4 fake_membnks fake_ssi hterm htod hvuart iob pterm puart0
 245 intrctrl=system.intrctrl
 246 system=system
 247
 248 [system.t1000.fake_clk]
 249 type=IsaFake
 250 fake_mem=false
 251 pio_addr=644245094400
 252 pio_latency=2
 253 pio_size=4294967296
 254 ret_bad_addr=false
 255 ret_data16=65535
 256 ret_data32=4294967295
 257 ret_data64=18446744073709551615
 258 ret_data8=255
 259 system=system
 260 update_data=false
 261 warn_access=
 262 pio=system.iobus.master[0]
 263
 264 [system.t1000.fake_jbi]
 265 type=IsaFake
 266 fake_mem=false
 267 pio_addr=549755813888
 268 pio_latency=2
 269 pio_size=4294967296
 270 ret_bad_addr=false
 271 ret_data16=65535
 272 ret_data32=4294967295
 273 ret_data64=18446744073709551615
 274 ret_data8=255
 275 system=system
 276 update_data=false
 277 warn_access=
 278 pio=system.iobus.master[11]
 279
 280 [system.t1000.fake_l2_1]
 281 type=IsaFake
 282 fake_mem=false
 283 pio_addr=725849473024
 284 pio_latency=2
 285 pio_size=8
 286 ret_bad_addr=false
 287 ret_data16=65535
 288 ret_data32=4294967295
 289 ret_data64=1
 290 ret_data8=255
 291 system=system
 292 update_data=true
 293 warn_access=
 294 pio=system.iobus.master[2]
 295
 296 [system.t1000.fake_l2_2]
 297 type=IsaFake
 298 fake_mem=false
 299 pio_addr=725849473088
 300 pio_latency=2
 301 pio_size=8
 302 ret_bad_addr=false
 303 ret_data16=65535
 304 ret_data32=4294967295
 305 ret_data64=1
 306 ret_data8=255
 307 system=system
 308 update_data=true
 309 warn_access=
 310 pio=system.iobus.master[3]
 311
 312 [system.t1000.fake_l2_3]
 313 type=IsaFake
 314 fake_mem=false
 315 pio_addr=725849473152
 316 pio_latency=2
 317 pio_size=8
 318 ret_bad_addr=false
 319 ret_data16=65535
 320 ret_data32=4294967295
 321 ret_data64=1
 322 ret_data8=255
 323 system=system
 324 update_data=true
 325 warn_access=
 326 pio=system.iobus.master[4]
 327
 328 [system.t1000.fake_l2_4]
 329 type=IsaFake
 330 fake_mem=false
 331 pio_addr=725849473216
 332 pio_latency=2
 333 pio_size=8
 334 ret_bad_addr=false
 335 ret_data16=65535
 336 ret_data32=4294967295
 337 ret_data64=1
 338 ret_data8=255
 339 system=system
 340 update_data=true
 341 warn_access=
 342 pio=system.iobus.master[5]
 343
 344 [system.t1000.fake_l2esr_1]
 345 type=IsaFake
 346 fake_mem=false
 347 pio_addr=734439407616
 348 pio_latency=2
 349 pio_size=8
 350 ret_bad_addr=false
 351 ret_data16=65535
 352 ret_data32=4294967295
 353 ret_data64=0
 354 ret_data8=255
 355 system=system
 356 update_data=true
 357 warn_access=
 358 pio=system.iobus.master[6]
 359
 360 [system.t1000.fake_l2esr_2]
 361 type=IsaFake
 362 fake_mem=false
 363 pio_addr=734439407680
 364 pio_latency=2
 365 pio_size=8
 366 ret_bad_addr=false
 367 ret_data16=65535
 368 ret_data32=4294967295
 369 ret_data64=0
 370 ret_data8=255
 371 system=system
 372 update_data=true
 373 warn_access=
 374 pio=system.iobus.master[7]
 375
 376 [system.t1000.fake_l2esr_3]
 377 type=IsaFake
 378 fake_mem=false
 379 pio_addr=734439407744
 380 pio_latency=2
 381 pio_size=8
 382 ret_bad_addr=false
 383 ret_data16=65535
 384 ret_data32=4294967295
 385 ret_data64=0
 386 ret_data8=255
 387 system=system
 388 update_data=true
 389 warn_access=
 390 pio=system.iobus.master[8]
 391
 392 [system.t1000.fake_l2esr_4]
 393 type=IsaFake
 394 fake_mem=false
 395 pio_addr=734439407808
 396 pio_latency=2
 397 pio_size=8
 398 ret_bad_addr=false
 399 ret_data16=65535
 400 ret_data32=4294967295
 401 ret_data64=0
 402 ret_data8=255
 403 system=system
 404 update_data=true
 405 warn_access=
 406 pio=system.iobus.master[9]
 407
 408 [system.t1000.fake_membnks]
 409 type=IsaFake
 410 fake_mem=false
 411 pio_addr=648540061696
 412 pio_latency=2
 413 pio_size=16384
 414 ret_bad_addr=false
 415 ret_data16=65535
 416 ret_data32=4294967295
 417 ret_data64=0
 418 ret_data8=255
 419 system=system
 420 update_data=false
 421 warn_access=
 422 pio=system.iobus.master[1]
 423
 424 [system.t1000.fake_ssi]
 425 type=IsaFake
 426 fake_mem=false
 427 pio_addr=1095216660480
 428 pio_latency=2
 429 pio_size=268435456
 430 ret_bad_addr=false
 431 ret_data16=65535
 432 ret_data32=4294967295
 433 ret_data64=18446744073709551615
 434 ret_data8=255
 435 system=system
 436 update_data=false
 437 warn_access=
 438 pio=system.iobus.master[10]
 439
 440 [system.t1000.hterm]
 441 type=Terminal
 442 intr_control=system.intrctrl
 443 number=0
 444 output=true
 445 port=3456
 446
 447 [system.t1000.htod]
 448 type=DumbTOD
 449 pio_addr=1099255906296
 450 pio_latency=2
 451 system=system
 452 time=Thu Jan  1 00:00:00 2009
 453 pio=system.membus.master[1]
 454
 455 [system.t1000.hvuart]
 456 type=Uart8250
 457 pio_addr=1099255955456
 458 pio_latency=2
 459 platform=system.t1000
 460 system=system
 461 terminal=system.t1000.hterm
 462 pio=system.iobus.master[13]
 463
 464 [system.t1000.iob]
 465 type=Iob
 466 pio_latency=2
 467 platform=system.t1000
 468 system=system
 469 pio=system.membus.master[0]
 470
 471 [system.t1000.pterm]
 472 type=Terminal
 473 intr_control=system.intrctrl
 474 number=0
 475 output=true
 476 port=3456
 477
 478 [system.t1000.puart0]
 479 type=Uart8250
 480 pio_addr=133412421632
 481 pio_latency=2
 482 platform=system.t1000
 483 system=system
 484 terminal=system.t1000.pterm
 485 pio=system.iobus.master[12]
 486