stats: update stats for insts/ops and master id changes
[gem5.git] / tests / long / se / 10.mcf / ref / arm / linux / simple-timing / config.ini
1 [root]
2 type=Root
3 children=system
4 full_system=false
5 time_sync_enable=false
6 time_sync_period=100000000000
7 time_sync_spin_threshold=100000000
8
9 [system]
10 type=System
11 children=cpu membus physmem
12 boot_osflags=a
13 init_param=0
14 kernel=
15 load_addr_mask=1099511627775
16 mem_mode=atomic
17 memories=system.physmem
18 num_work_ids=16
19 physmem=system.physmem
20 readfile=
21 symbolfile=
22 work_begin_ckpt_count=0
23 work_begin_cpu_id_exit=-1
24 work_begin_exit_count=0
25 work_cpus_ckpt_count=0
26 work_end_ckpt_count=0
27 work_end_exit_count=0
28 work_item_id=-1
29 system_port=system.membus.port[0]
30
31 [system.cpu]
32 type=TimingSimpleCPU
33 children=dcache dtb icache interrupts itb l2cache toL2Bus tracer workload
34 checker=Null
35 clock=500
36 cpu_id=0
37 defer_registration=false
38 do_checkpoint_insts=true
39 do_quiesce=true
40 do_statistics_insts=true
41 dtb=system.cpu.dtb
42 function_trace=false
43 function_trace_start=0
44 interrupts=system.cpu.interrupts
45 itb=system.cpu.itb
46 max_insts_all_threads=0
47 max_insts_any_thread=0
48 max_loads_all_threads=0
49 max_loads_any_thread=0
50 numThreads=1
51 phase=0
52 profile=0
53 progress_interval=0
54 system=system
55 tracer=system.cpu.tracer
56 workload=system.cpu.workload
57 dcache_port=system.cpu.dcache.cpu_side
58 icache_port=system.cpu.icache.cpu_side
59
60 [system.cpu.dcache]
61 type=BaseCache
62 addr_range=0:18446744073709551615
63 assoc=2
64 block_size=64
65 forward_snoops=true
66 hash_delay=1
67 is_top_level=true
68 latency=1000
69 max_miss_count=0
70 mshrs=10
71 prefetch_on_access=false
72 prefetcher=Null
73 prioritizeRequests=false
74 repl=Null
75 size=262144
76 subblock_size=0
77 system=system
78 tgts_per_mshr=5
79 trace_addr=0
80 two_queue=false
81 write_buffers=8
82 cpu_side=system.cpu.dcache_port
83 mem_side=system.cpu.toL2Bus.port[1]
84
85 [system.cpu.dtb]
86 type=ArmTLB
87 children=walker
88 size=64
89 walker=system.cpu.dtb.walker
90
91 [system.cpu.dtb.walker]
92 type=ArmTableWalker
93 max_backoff=100000
94 min_backoff=0
95 sys=system
96 port=system.cpu.toL2Bus.port[3]
97
98 [system.cpu.icache]
99 type=BaseCache
100 addr_range=0:18446744073709551615
101 assoc=2
102 block_size=64
103 forward_snoops=true
104 hash_delay=1
105 is_top_level=true
106 latency=1000
107 max_miss_count=0
108 mshrs=10
109 prefetch_on_access=false
110 prefetcher=Null
111 prioritizeRequests=false
112 repl=Null
113 size=131072
114 subblock_size=0
115 system=system
116 tgts_per_mshr=5
117 trace_addr=0
118 two_queue=false
119 write_buffers=8
120 cpu_side=system.cpu.icache_port
121 mem_side=system.cpu.toL2Bus.port[0]
122
123 [system.cpu.interrupts]
124 type=ArmInterrupts
125
126 [system.cpu.itb]
127 type=ArmTLB
128 children=walker
129 size=64
130 walker=system.cpu.itb.walker
131
132 [system.cpu.itb.walker]
133 type=ArmTableWalker
134 max_backoff=100000
135 min_backoff=0
136 sys=system
137 port=system.cpu.toL2Bus.port[2]
138
139 [system.cpu.l2cache]
140 type=BaseCache
141 addr_range=0:18446744073709551615
142 assoc=2
143 block_size=64
144 forward_snoops=true
145 hash_delay=1
146 is_top_level=false
147 latency=10000
148 max_miss_count=0
149 mshrs=10
150 prefetch_on_access=false
151 prefetcher=Null
152 prioritizeRequests=false
153 repl=Null
154 size=2097152
155 subblock_size=0
156 system=system
157 tgts_per_mshr=5
158 trace_addr=0
159 two_queue=false
160 write_buffers=8
161 cpu_side=system.cpu.toL2Bus.port[4]
162 mem_side=system.membus.port[2]
163
164 [system.cpu.toL2Bus]
165 type=Bus
166 block_size=64
167 bus_id=0
168 clock=1000
169 header_cycles=1
170 use_default_range=false
171 width=64
172 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.l2cache.cpu_side
173
174 [system.cpu.tracer]
175 type=ExeTracer
176
177 [system.cpu.workload]
178 type=LiveProcess
179 cmd=mcf mcf.in
180 cwd=build/ARM/tests/fast/long/se/10.mcf/arm/linux/simple-timing
181 egid=100
182 env=
183 errout=cerr
184 euid=100
185 executable=/dist/m5/cpu2000/binaries/arm/linux/mcf
186 gid=100
187 input=/dist/m5/cpu2000/data/mcf/smred/input/mcf.in
188 max_stack_size=67108864
189 output=cout
190 pid=100
191 ppid=99
192 simpoint=55300000000
193 system=system
194 uid=100
195
196 [system.membus]
197 type=Bus
198 block_size=64
199 bus_id=0
200 clock=1000
201 header_cycles=1
202 use_default_range=false
203 width=64
204 port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
205
206 [system.physmem]
207 type=PhysicalMemory
208 file=
209 latency=30000
210 latency_var=0
211 null=false
212 range=0:268435455
213 zero=false
214 port=system.membus.port[1]
215