tests/long/se/20.parser/ref/alpha/tru64/minor-timing/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 eventq_index=0
   5 full_system=false
   6 sim_quantum=0
   7 time_sync_enable=false
   8 time_sync_period=100000000000
   9 time_sync_spin_threshold=100000000
  10
  11 [system]
  12 type=System
  13 children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
  14 boot_osflags=a
  15 cache_line_size=64
  16 clk_domain=system.clk_domain
  17 eventq_index=0
  18 init_param=0
  19 kernel=
  20 kernel_addr_check=true
  21 load_addr_mask=1099511627775
  22 load_offset=0
  23 mem_mode=timing
  24 mem_ranges=
  25 memories=system.physmem
  26 num_work_ids=16
  27 readfile=
  28 symbolfile=
  29 work_begin_ckpt_count=0
  30 work_begin_cpu_id_exit=-1
  31 work_begin_exit_count=0
  32 work_cpus_ckpt_count=0
  33 work_end_ckpt_count=0
  34 work_end_exit_count=0
  35 work_item_id=-1
  36 system_port=system.membus.slave[0]
  37
  38 [system.clk_domain]
  39 type=SrcClockDomain
  40 clock=1000
  41 domain_id=-1
  42 eventq_index=0
  43 init_perf_level=0
  44 voltage_domain=system.voltage_domain
  45
  46 [system.cpu]
  47 type=MinorCPU
  48 children=branchPred dcache dtb executeFuncUnits icache interrupts isa itb l2cache toL2Bus tracer workload
  49 branchPred=system.cpu.branchPred
  50 checker=Null
  51 clk_domain=system.cpu_clk_domain
  52 cpu_id=0
  53 decodeCycleInput=true
  54 decodeInputBufferSize=3
  55 decodeInputWidth=2
  56 decodeToExecuteForwardDelay=1
  57 do_checkpoint_insts=true
  58 do_quiesce=true
  59 do_statistics_insts=true
  60 dtb=system.cpu.dtb
  61 enableIdling=true
  62 eventq_index=0
  63 executeAllowEarlyMemoryIssue=true
  64 executeBranchDelay=1
  65 executeCommitLimit=2
  66 executeCycleInput=true
  67 executeFuncUnits=system.cpu.executeFuncUnits
  68 executeInputBufferSize=7
  69 executeInputWidth=2
  70 executeIssueLimit=2
  71 executeLSQMaxStoreBufferStoresPerCycle=2
  72 executeLSQRequestsQueueSize=1
  73 executeLSQStoreBufferSize=5
  74 executeLSQTransfersQueueSize=2
  75 executeMaxAccessesInMemory=2
  76 executeMemoryCommitLimit=1
  77 executeMemoryIssueLimit=1
  78 executeMemoryWidth=0
  79 executeSetTraceTimeOnCommit=true
  80 executeSetTraceTimeOnIssue=false
  81 fetch1FetchLimit=1
  82 fetch1LineSnapWidth=0
  83 fetch1LineWidth=0
  84 fetch1ToFetch2BackwardDelay=1
  85 fetch1ToFetch2ForwardDelay=1
  86 fetch2CycleInput=true
  87 fetch2InputBufferSize=2
  88 fetch2ToDecodeForwardDelay=1
  89 function_trace=false
  90 function_trace_start=0
  91 interrupts=system.cpu.interrupts
  92 isa=system.cpu.isa
  93 itb=system.cpu.itb
  94 max_insts_all_threads=0
  95 max_insts_any_thread=0
  96 max_loads_all_threads=0
  97 max_loads_any_thread=0
  98 numThreads=1
  99 profile=0
 100 progress_interval=0
 101 simpoint_start_insts=
 102 socket_id=0
 103 switched_out=false
 104 system=system
 105 tracer=system.cpu.tracer
 106 workload=system.cpu.workload
 107 dcache_port=system.cpu.dcache.cpu_side
 108 icache_port=system.cpu.icache.cpu_side
 109
 110 [system.cpu.branchPred]
 111 type=BranchPredictor
 112 BTBEntries=4096
 113 BTBTagSize=16
 114 RASSize=16
 115 choiceCtrBits=2
 116 choicePredictorSize=8192
 117 eventq_index=0
 118 globalCtrBits=2
 119 globalPredictorSize=8192
 120 instShiftAmt=2
 121 localCtrBits=2
 122 localHistoryTableSize=2048
 123 localPredictorSize=2048
 124 numThreads=1
 125 predType=tournament
 126
 127 [system.cpu.dcache]
 128 type=BaseCache
 129 children=tags
 130 addr_ranges=0:18446744073709551615
 131 assoc=2
 132 clk_domain=system.cpu_clk_domain
 133 eventq_index=0
 134 forward_snoops=true
 135 hit_latency=2
 136 is_top_level=true
 137 max_miss_count=0
 138 mshrs=4
 139 prefetch_on_access=false
 140 prefetcher=Null
 141 response_latency=2
 142 sequential_access=false
 143 size=262144
 144 system=system
 145 tags=system.cpu.dcache.tags
 146 tgts_per_mshr=20
 147 two_queue=false
 148 write_buffers=8
 149 cpu_side=system.cpu.dcache_port
 150 mem_side=system.cpu.toL2Bus.slave[1]
 151
 152 [system.cpu.dcache.tags]
 153 type=LRU
 154 assoc=2
 155 block_size=64
 156 clk_domain=system.cpu_clk_domain
 157 eventq_index=0
 158 hit_latency=2
 159 sequential_access=false
 160 size=262144
 161
 162 [system.cpu.dtb]
 163 type=AlphaTLB
 164 eventq_index=0
 165 size=64
 166
 167 [system.cpu.executeFuncUnits]
 168 type=MinorFUPool
 169 children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
 170 eventq_index=0
 171 funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
 172
 173 [system.cpu.executeFuncUnits.funcUnits0]
 174 type=MinorFU
 175 children=opClasses timings
 176 cantForwardFromFUIndices=
 177 eventq_index=0
 178 issueLat=1
 179 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
 180 opLat=3
 181 timings=system.cpu.executeFuncUnits.funcUnits0.timings
 182
 183 [system.cpu.executeFuncUnits.funcUnits0.opClasses]
 184 type=MinorOpClassSet
 185 children=opClasses
 186 eventq_index=0
 187 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
 188
 189 [system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
 190 type=MinorOpClass
 191 eventq_index=0
 192 opClass=IntAlu
 193
 194 [system.cpu.executeFuncUnits.funcUnits0.timings]
 195 type=MinorFUTiming
 196 children=opClasses
 197 description=Int
 198 eventq_index=0
 199 extraAssumedLat=0
 200 extraCommitLat=0
 201 extraCommitLatExpr=Null
 202 mask=0
 203 match=0
 204 opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
 205 srcRegsRelativeLats=2
 206 suppress=false
 207
 208 [system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
 209 type=MinorOpClassSet
 210 eventq_index=0
 211 opClasses=
 212
 213 [system.cpu.executeFuncUnits.funcUnits1]
 214 type=MinorFU
 215 children=opClasses timings
 216 cantForwardFromFUIndices=
 217 eventq_index=0
 218 issueLat=1
 219 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
 220 opLat=3
 221 timings=system.cpu.executeFuncUnits.funcUnits1.timings
 222
 223 [system.cpu.executeFuncUnits.funcUnits1.opClasses]
 224 type=MinorOpClassSet
 225 children=opClasses
 226 eventq_index=0
 227 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
 228
 229 [system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
 230 type=MinorOpClass
 231 eventq_index=0
 232 opClass=IntAlu
 233
 234 [system.cpu.executeFuncUnits.funcUnits1.timings]
 235 type=MinorFUTiming
 236 children=opClasses
 237 description=Int
 238 eventq_index=0
 239 extraAssumedLat=0
 240 extraCommitLat=0
 241 extraCommitLatExpr=Null
 242 mask=0
 243 match=0
 244 opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
 245 srcRegsRelativeLats=2
 246 suppress=false
 247
 248 [system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
 249 type=MinorOpClassSet
 250 eventq_index=0
 251 opClasses=
 252
 253 [system.cpu.executeFuncUnits.funcUnits2]
 254 type=MinorFU
 255 children=opClasses timings
 256 cantForwardFromFUIndices=
 257 eventq_index=0
 258 issueLat=1
 259 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
 260 opLat=3
 261 timings=system.cpu.executeFuncUnits.funcUnits2.timings
 262
 263 [system.cpu.executeFuncUnits.funcUnits2.opClasses]
 264 type=MinorOpClassSet
 265 children=opClasses
 266 eventq_index=0
 267 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
 268
 269 [system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
 270 type=MinorOpClass
 271 eventq_index=0
 272 opClass=IntMult
 273
 274 [system.cpu.executeFuncUnits.funcUnits2.timings]
 275 type=MinorFUTiming
 276 children=opClasses
 277 description=Mul
 278 eventq_index=0
 279 extraAssumedLat=0
 280 extraCommitLat=0
 281 extraCommitLatExpr=Null
 282 mask=0
 283 match=0
 284 opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
 285 srcRegsRelativeLats=0
 286 suppress=false
 287
 288 [system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
 289 type=MinorOpClassSet
 290 eventq_index=0
 291 opClasses=
 292
 293 [system.cpu.executeFuncUnits.funcUnits3]
 294 type=MinorFU
 295 children=opClasses
 296 cantForwardFromFUIndices=
 297 eventq_index=0
 298 issueLat=9
 299 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
 300 opLat=9
 301 timings=
 302
 303 [system.cpu.executeFuncUnits.funcUnits3.opClasses]
 304 type=MinorOpClassSet
 305 children=opClasses
 306 eventq_index=0
 307 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
 308
 309 [system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
 310 type=MinorOpClass
 311 eventq_index=0
 312 opClass=IntDiv
 313
 314 [system.cpu.executeFuncUnits.funcUnits4]
 315 type=MinorFU
 316 children=opClasses timings
 317 cantForwardFromFUIndices=
 318 eventq_index=0
 319 issueLat=1
 320 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
 321 opLat=6
 322 timings=system.cpu.executeFuncUnits.funcUnits4.timings
 323
 324 [system.cpu.executeFuncUnits.funcUnits4.opClasses]
 325 type=MinorOpClassSet
 326 children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
 327 eventq_index=0
 328 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25
 329
 330 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
 331 type=MinorOpClass
 332 eventq_index=0
 333 opClass=FloatAdd
 334
 335 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
 336 type=MinorOpClass
 337 eventq_index=0
 338 opClass=FloatCmp
 339
 340 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
 341 type=MinorOpClass
 342 eventq_index=0
 343 opClass=FloatCvt
 344
 345 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
 346 type=MinorOpClass
 347 eventq_index=0
 348 opClass=FloatMult
 349
 350 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
 351 type=MinorOpClass
 352 eventq_index=0
 353 opClass=FloatDiv
 354
 355 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
 356 type=MinorOpClass
 357 eventq_index=0
 358 opClass=FloatSqrt
 359
 360 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
 361 type=MinorOpClass
 362 eventq_index=0
 363 opClass=SimdAdd
 364
 365 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
 366 type=MinorOpClass
 367 eventq_index=0
 368 opClass=SimdAddAcc
 369
 370 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
 371 type=MinorOpClass
 372 eventq_index=0
 373 opClass=SimdAlu
 374
 375 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
 376 type=MinorOpClass
 377 eventq_index=0
 378 opClass=SimdCmp
 379
 380 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
 381 type=MinorOpClass
 382 eventq_index=0
 383 opClass=SimdCvt
 384
 385 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
 386 type=MinorOpClass
 387 eventq_index=0
 388 opClass=SimdMisc
 389
 390 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
 391 type=MinorOpClass
 392 eventq_index=0
 393 opClass=SimdMult
 394
 395 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
 396 type=MinorOpClass
 397 eventq_index=0
 398 opClass=SimdMultAcc
 399
 400 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
 401 type=MinorOpClass
 402 eventq_index=0
 403 opClass=SimdShift
 404
 405 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
 406 type=MinorOpClass
 407 eventq_index=0
 408 opClass=SimdShiftAcc
 409
 410 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
 411 type=MinorOpClass
 412 eventq_index=0
 413 opClass=SimdSqrt
 414
 415 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
 416 type=MinorOpClass
 417 eventq_index=0
 418 opClass=SimdFloatAdd
 419
 420 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
 421 type=MinorOpClass
 422 eventq_index=0
 423 opClass=SimdFloatAlu
 424
 425 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
 426 type=MinorOpClass
 427 eventq_index=0
 428 opClass=SimdFloatCmp
 429
 430 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
 431 type=MinorOpClass
 432 eventq_index=0
 433 opClass=SimdFloatCvt
 434
 435 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
 436 type=MinorOpClass
 437 eventq_index=0
 438 opClass=SimdFloatDiv
 439
 440 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
 441 type=MinorOpClass
 442 eventq_index=0
 443 opClass=SimdFloatMisc
 444
 445 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
 446 type=MinorOpClass
 447 eventq_index=0
 448 opClass=SimdFloatMult
 449
 450 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
 451 type=MinorOpClass
 452 eventq_index=0
 453 opClass=SimdFloatMultAcc
 454
 455 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
 456 type=MinorOpClass
 457 eventq_index=0
 458 opClass=SimdFloatSqrt
 459
 460 [system.cpu.executeFuncUnits.funcUnits4.timings]
 461 type=MinorFUTiming
 462 children=opClasses
 463 description=FloatSimd
 464 eventq_index=0
 465 extraAssumedLat=0
 466 extraCommitLat=0
 467 extraCommitLatExpr=Null
 468 mask=0
 469 match=0
 470 opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
 471 srcRegsRelativeLats=2
 472 suppress=false
 473
 474 [system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
 475 type=MinorOpClassSet
 476 eventq_index=0
 477 opClasses=
 478
 479 [system.cpu.executeFuncUnits.funcUnits5]
 480 type=MinorFU
 481 children=opClasses timings
 482 cantForwardFromFUIndices=
 483 eventq_index=0
 484 issueLat=1
 485 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
 486 opLat=1
 487 timings=system.cpu.executeFuncUnits.funcUnits5.timings
 488
 489 [system.cpu.executeFuncUnits.funcUnits5.opClasses]
 490 type=MinorOpClassSet
 491 children=opClasses0 opClasses1
 492 eventq_index=0
 493 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1
 494
 495 [system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
 496 type=MinorOpClass
 497 eventq_index=0
 498 opClass=MemRead
 499
 500 [system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
 501 type=MinorOpClass
 502 eventq_index=0
 503 opClass=MemWrite
 504
 505 [system.cpu.executeFuncUnits.funcUnits5.timings]
 506 type=MinorFUTiming
 507 children=opClasses
 508 description=Mem
 509 eventq_index=0
 510 extraAssumedLat=2
 511 extraCommitLat=0
 512 extraCommitLatExpr=Null
 513 mask=0
 514 match=0
 515 opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
 516 srcRegsRelativeLats=1
 517 suppress=false
 518
 519 [system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
 520 type=MinorOpClassSet
 521 eventq_index=0
 522 opClasses=
 523
 524 [system.cpu.executeFuncUnits.funcUnits6]
 525 type=MinorFU
 526 children=opClasses
 527 cantForwardFromFUIndices=
 528 eventq_index=0
 529 issueLat=1
 530 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
 531 opLat=1
 532 timings=
 533
 534 [system.cpu.executeFuncUnits.funcUnits6.opClasses]
 535 type=MinorOpClassSet
 536 children=opClasses0 opClasses1
 537 eventq_index=0
 538 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
 539
 540 [system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
 541 type=MinorOpClass
 542 eventq_index=0
 543 opClass=IprAccess
 544
 545 [system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
 546 type=MinorOpClass
 547 eventq_index=0
 548 opClass=InstPrefetch
 549
 550 [system.cpu.icache]
 551 type=BaseCache
 552 children=tags
 553 addr_ranges=0:18446744073709551615
 554 assoc=2
 555 clk_domain=system.cpu_clk_domain
 556 eventq_index=0
 557 forward_snoops=true
 558 hit_latency=2
 559 is_top_level=true
 560 max_miss_count=0
 561 mshrs=4
 562 prefetch_on_access=false
 563 prefetcher=Null
 564 response_latency=2
 565 sequential_access=false
 566 size=131072
 567 system=system
 568 tags=system.cpu.icache.tags
 569 tgts_per_mshr=20
 570 two_queue=false
 571 write_buffers=8
 572 cpu_side=system.cpu.icache_port
 573 mem_side=system.cpu.toL2Bus.slave[0]
 574
 575 [system.cpu.icache.tags]
 576 type=LRU
 577 assoc=2
 578 block_size=64
 579 clk_domain=system.cpu_clk_domain
 580 eventq_index=0
 581 hit_latency=2
 582 sequential_access=false
 583 size=131072
 584
 585 [system.cpu.interrupts]
 586 type=AlphaInterrupts
 587 eventq_index=0
 588
 589 [system.cpu.isa]
 590 type=AlphaISA
 591 eventq_index=0
 592 system=system
 593
 594 [system.cpu.itb]
 595 type=AlphaTLB
 596 eventq_index=0
 597 size=48
 598
 599 [system.cpu.l2cache]
 600 type=BaseCache
 601 children=tags
 602 addr_ranges=0:18446744073709551615
 603 assoc=8
 604 clk_domain=system.cpu_clk_domain
 605 eventq_index=0
 606 forward_snoops=true
 607 hit_latency=20
 608 is_top_level=false
 609 max_miss_count=0
 610 mshrs=20
 611 prefetch_on_access=false
 612 prefetcher=Null
 613 response_latency=20
 614 sequential_access=false
 615 size=2097152
 616 system=system
 617 tags=system.cpu.l2cache.tags
 618 tgts_per_mshr=12
 619 two_queue=false
 620 write_buffers=8
 621 cpu_side=system.cpu.toL2Bus.master[0]
 622 mem_side=system.membus.slave[1]
 623
 624 [system.cpu.l2cache.tags]
 625 type=LRU
 626 assoc=8
 627 block_size=64
 628 clk_domain=system.cpu_clk_domain
 629 eventq_index=0
 630 hit_latency=20
 631 sequential_access=false
 632 size=2097152
 633
 634 [system.cpu.toL2Bus]
 635 type=CoherentXBar
 636 clk_domain=system.cpu_clk_domain
 637 eventq_index=0
 638 header_cycles=1
 639 snoop_filter=Null
 640 system=system
 641 use_default_range=false
 642 width=32
 643 master=system.cpu.l2cache.cpu_side
 644 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
 645
 646 [system.cpu.tracer]
 647 type=ExeTracer
 648 eventq_index=0
 649
 650 [system.cpu.workload]
 651 type=LiveProcess
 652 cmd=parser 2.1.dict -batch
 653 cwd=build/ALPHA/tests/opt/long/se/20.parser/alpha/tru64/minor-timing
 654 egid=100
 655 env=
 656 errout=cerr
 657 euid=100
 658 eventq_index=0
 659 executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/parser
 660 gid=100
 661 input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in
 662 max_stack_size=67108864
 663 output=cout
 664 pid=100
 665 ppid=99
 666 simpoint=114600000000
 667 system=system
 668 uid=100
 669 useArchPT=false
 670
 671 [system.cpu_clk_domain]
 672 type=SrcClockDomain
 673 clock=500
 674 domain_id=-1
 675 eventq_index=0
 676 init_perf_level=0
 677 voltage_domain=system.voltage_domain
 678
 679 [system.dvfs_handler]
 680 type=DVFSHandler
 681 domains=
 682 enable=false
 683 eventq_index=0
 684 sys_clk_domain=system.clk_domain
 685 transition_latency=100000000
 686
 687 [system.membus]
 688 type=CoherentXBar
 689 clk_domain=system.clk_domain
 690 eventq_index=0
 691 header_cycles=1
 692 snoop_filter=Null
 693 system=system
 694 use_default_range=false
 695 width=8
 696 master=system.physmem.port
 697 slave=system.system_port system.cpu.l2cache.mem_side
 698
 699 [system.physmem]
 700 type=DRAMCtrl
 701 IDD0=0.075000
 702 IDD02=0.000000
 703 IDD2N=0.050000
 704 IDD2N2=0.000000
 705 IDD2P0=0.000000
 706 IDD2P02=0.000000
 707 IDD2P1=0.000000
 708 IDD2P12=0.000000
 709 IDD3N=0.057000
 710 IDD3N2=0.000000
 711 IDD3P0=0.000000
 712 IDD3P02=0.000000
 713 IDD3P1=0.000000
 714 IDD3P12=0.000000
 715 IDD4R=0.187000
 716 IDD4R2=0.000000
 717 IDD4W=0.165000
 718 IDD4W2=0.000000
 719 IDD5=0.220000
 720 IDD52=0.000000
 721 IDD6=0.000000
 722 IDD62=0.000000
 723 VDD=1.500000
 724 VDD2=0.000000
 725 activation_limit=4
 726 addr_mapping=RoRaBaChCo
 727 bank_groups_per_rank=0
 728 banks_per_rank=8
 729 burst_length=8
 730 channels=1
 731 clk_domain=system.clk_domain
 732 conf_table_reported=true
 733 device_bus_width=8
 734 device_rowbuffer_size=1024
 735 devices_per_rank=8
 736 dll=true
 737 eventq_index=0
 738 in_addr_map=true
 739 max_accesses_per_row=16
 740 mem_sched_policy=frfcfs
 741 min_writes_per_switch=16
 742 null=false
 743 page_policy=open_adaptive
 744 range=0:134217727
 745 ranks_per_channel=2
 746 read_buffer_size=32
 747 static_backend_latency=10000
 748 static_frontend_latency=10000
 749 tBURST=5000
 750 tCCD_L=0
 751 tCK=1250
 752 tCL=13750
 753 tCS=2500
 754 tRAS=35000
 755 tRCD=13750
 756 tREFI=7800000
 757 tRFC=260000
 758 tRP=13750
 759 tRRD=6000
 760 tRRD_L=0
 761 tRTP=7500
 762 tRTW=2500
 763 tWR=15000
 764 tWTR=7500
 765 tXAW=30000
 766 tXP=0
 767 tXPDLL=0
 768 tXS=0
 769 tXSDLL=0
 770 write_buffer_size=64
 771 write_high_thresh_perc=85
 772 write_low_thresh_perc=50
 773 port=system.membus.master[0]
 774
 775 [system.voltage_domain]
 776 type=VoltageDomain
 777 eventq_index=0
 778 voltage=1.000000
 779