a5f2c0f8eced39061a355f3f327ccff158b220fc
8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
16 clk_domain=system.clk_domain
20 kernel_addr_check=true
21 load_addr_mask=1099511627775
25 memories=system.physmem
29 work_begin_ckpt_count=0
30 work_begin_cpu_id_exit=-1
31 work_begin_exit_count=0
32 work_cpus_ckpt_count=0
36 system_port=system.membus.slave[0]
44 voltage_domain=system.voltage_domain
48 children=branchPred dcache dtb executeFuncUnits icache interrupts isa itb l2cache toL2Bus tracer workload
49 branchPred=system.cpu.branchPred
51 clk_domain=system.cpu_clk_domain
54 decodeInputBufferSize=3
56 decodeToExecuteForwardDelay=1
57 do_checkpoint_insts=true
59 do_statistics_insts=true
63 executeAllowEarlyMemoryIssue=true
66 executeCycleInput=true
67 executeFuncUnits=system.cpu.executeFuncUnits
68 executeInputBufferSize=7
71 executeLSQMaxStoreBufferStoresPerCycle=2
72 executeLSQRequestsQueueSize=1
73 executeLSQStoreBufferSize=5
74 executeLSQTransfersQueueSize=2
75 executeMaxAccessesInMemory=2
76 executeMemoryCommitLimit=1
77 executeMemoryIssueLimit=1
79 executeSetTraceTimeOnCommit=true
80 executeSetTraceTimeOnIssue=false
84 fetch1ToFetch2BackwardDelay=1
85 fetch1ToFetch2ForwardDelay=1
87 fetch2InputBufferSize=2
88 fetch2ToDecodeForwardDelay=1
90 function_trace_start=0
91 interrupts=system.cpu.interrupts
94 max_insts_all_threads=0
95 max_insts_any_thread=0
96 max_loads_all_threads=0
97 max_loads_any_thread=0
101 simpoint_start_insts=
105 tracer=system.cpu.tracer
106 workload=system.cpu.workload
107 dcache_port=system.cpu.dcache.cpu_side
108 icache_port=system.cpu.icache.cpu_side
110 [system.cpu.branchPred]
116 choicePredictorSize=8192
119 globalPredictorSize=8192
122 localHistoryTableSize=2048
123 localPredictorSize=2048
130 addr_ranges=0:18446744073709551615
132 clk_domain=system.cpu_clk_domain
139 prefetch_on_access=false
142 sequential_access=false
145 tags=system.cpu.dcache.tags
149 cpu_side=system.cpu.dcache_port
150 mem_side=system.cpu.toL2Bus.slave[1]
152 [system.cpu.dcache.tags]
156 clk_domain=system.cpu_clk_domain
159 sequential_access=false
167 [system.cpu.executeFuncUnits]
169 children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
171 funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
173 [system.cpu.executeFuncUnits.funcUnits0]
175 children=opClasses timings
176 cantForwardFromFUIndices=
179 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
181 timings=system.cpu.executeFuncUnits.funcUnits0.timings
183 [system.cpu.executeFuncUnits.funcUnits0.opClasses]
187 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
189 [system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
194 [system.cpu.executeFuncUnits.funcUnits0.timings]
201 extraCommitLatExpr=Null
204 opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
205 srcRegsRelativeLats=2
208 [system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
213 [system.cpu.executeFuncUnits.funcUnits1]
215 children=opClasses timings
216 cantForwardFromFUIndices=
219 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
221 timings=system.cpu.executeFuncUnits.funcUnits1.timings
223 [system.cpu.executeFuncUnits.funcUnits1.opClasses]
227 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
229 [system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
234 [system.cpu.executeFuncUnits.funcUnits1.timings]
241 extraCommitLatExpr=Null
244 opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
245 srcRegsRelativeLats=2
248 [system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
253 [system.cpu.executeFuncUnits.funcUnits2]
255 children=opClasses timings
256 cantForwardFromFUIndices=
259 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
261 timings=system.cpu.executeFuncUnits.funcUnits2.timings
263 [system.cpu.executeFuncUnits.funcUnits2.opClasses]
267 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
269 [system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
274 [system.cpu.executeFuncUnits.funcUnits2.timings]
281 extraCommitLatExpr=Null
284 opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
285 srcRegsRelativeLats=0
288 [system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
293 [system.cpu.executeFuncUnits.funcUnits3]
296 cantForwardFromFUIndices=
299 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
303 [system.cpu.executeFuncUnits.funcUnits3.opClasses]
307 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
309 [system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
314 [system.cpu.executeFuncUnits.funcUnits4]
316 children=opClasses timings
317 cantForwardFromFUIndices=
320 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
322 timings=system.cpu.executeFuncUnits.funcUnits4.timings
324 [system.cpu.executeFuncUnits.funcUnits4.opClasses]
326 children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
328 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25
330 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
335 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
340 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
345 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
350 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
355 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
360 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
365 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
370 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
375 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
380 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
385 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
390 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
395 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
400 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
405 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
410 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
415 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
420 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
425 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
430 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
435 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
440 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
443 opClass=SimdFloatMisc
445 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
448 opClass=SimdFloatMult
450 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
453 opClass=SimdFloatMultAcc
455 [system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
458 opClass=SimdFloatSqrt
460 [system.cpu.executeFuncUnits.funcUnits4.timings]
463 description=FloatSimd
467 extraCommitLatExpr=Null
470 opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
471 srcRegsRelativeLats=2
474 [system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
479 [system.cpu.executeFuncUnits.funcUnits5]
481 children=opClasses timings
482 cantForwardFromFUIndices=
485 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
487 timings=system.cpu.executeFuncUnits.funcUnits5.timings
489 [system.cpu.executeFuncUnits.funcUnits5.opClasses]
491 children=opClasses0 opClasses1
493 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1
495 [system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
500 [system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
505 [system.cpu.executeFuncUnits.funcUnits5.timings]
512 extraCommitLatExpr=Null
515 opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
516 srcRegsRelativeLats=1
519 [system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
524 [system.cpu.executeFuncUnits.funcUnits6]
527 cantForwardFromFUIndices=
530 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
534 [system.cpu.executeFuncUnits.funcUnits6.opClasses]
536 children=opClasses0 opClasses1
538 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
540 [system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
545 [system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
553 addr_ranges=0:18446744073709551615
555 clk_domain=system.cpu_clk_domain
562 prefetch_on_access=false
565 sequential_access=false
568 tags=system.cpu.icache.tags
572 cpu_side=system.cpu.icache_port
573 mem_side=system.cpu.toL2Bus.slave[0]
575 [system.cpu.icache.tags]
579 clk_domain=system.cpu_clk_domain
582 sequential_access=false
585 [system.cpu.interrupts]
602 addr_ranges=0:18446744073709551615
604 clk_domain=system.cpu_clk_domain
611 prefetch_on_access=false
614 sequential_access=false
617 tags=system.cpu.l2cache.tags
621 cpu_side=system.cpu.toL2Bus.master[0]
622 mem_side=system.membus.slave[1]
624 [system.cpu.l2cache.tags]
628 clk_domain=system.cpu_clk_domain
631 sequential_access=false
636 clk_domain=system.cpu_clk_domain
640 use_default_range=false
642 master=system.cpu.l2cache.cpu_side
643 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
649 [system.cpu.workload]
651 cmd=parser 2.1.dict -batch
652 cwd=build/ALPHA/tests/opt/long/se/20.parser/alpha/tru64/minor-timing
658 executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/parser
660 input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in
661 max_stack_size=67108864
665 simpoint=114600000000
669 [system.cpu_clk_domain]
675 voltage_domain=system.voltage_domain
677 [system.dvfs_handler]
682 sys_clk_domain=system.clk_domain
683 transition_latency=100000000
687 clk_domain=system.clk_domain
691 use_default_range=false
693 master=system.physmem.port
694 slave=system.system_port system.cpu.l2cache.mem_side
699 addr_mapping=RoRaBaChCo
703 clk_domain=system.clk_domain
704 conf_table_reported=true
706 device_rowbuffer_size=1024
710 max_accesses_per_row=16
711 mem_sched_policy=frfcfs
712 min_writes_per_switch=16
714 page_policy=open_adaptive
718 static_backend_latency=10000
719 static_frontend_latency=10000
735 write_high_thresh_perc=85
736 write_low_thresh_perc=50
737 port=system.membus.master[0]
739 [system.voltage_domain]