ab5e0012f9922dbbe62ebbfaff742e3b06cd9678
6 time_sync_period=100000000000
7 time_sync_spin_threshold=100000000
11 children=cpu membus physmem
16 load_addr_mask=1099511627775
19 memories=system.physmem
23 work_begin_ckpt_count=0
24 work_begin_cpu_id_exit=-1
25 work_begin_exit_count=0
26 work_cpus_ckpt_count=0
30 system_port=system.membus.slave[0]
34 children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload
43 branchPred=system.cpu.branchPred
57 do_checkpoint_insts=true
59 do_statistics_insts=true
65 fuPool=system.cpu.fuPool
67 function_trace_start=0
72 interrupts=system.cpu.interrupts
77 max_insts_all_threads=0
78 max_insts_any_thread=0
79 max_loads_all_threads=0
80 max_loads_any_thread=0
95 smtCommitPolicy=RoundRobin
96 smtFetchPolicy=SingleThread
97 smtIQPolicy=Partitioned
99 smtLSQPolicy=Partitioned
101 smtNumFetchingThreads=1
102 smtROBPolicy=Partitioned
105 store_set_clear_period=250000
108 tracer=system.cpu.tracer
112 workload=system.cpu.workload
113 dcache_port=system.cpu.dcache.cpu_side
114 icache_port=system.cpu.icache.cpu_side
116 [system.cpu.branchPred]
122 choicePredictorSize=8192
125 globalPredictorSize=8192
129 localHistoryTableSize=2048
130 localPredictorSize=2048
136 addr_ranges=0:18446744073709551615
145 prefetch_on_access=false
153 cpu_side=system.cpu.dcache_port
154 mem_side=system.cpu.toL2Bus.slave[1]
160 walker=system.cpu.dtb.walker
162 [system.cpu.dtb.walker]
163 type=X86PagetableWalker
166 port=system.cpu.toL2Bus.slave[3]
170 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
171 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
173 [system.cpu.fuPool.FUList0]
177 opList=system.cpu.fuPool.FUList0.opList
179 [system.cpu.fuPool.FUList0.opList]
185 [system.cpu.fuPool.FUList1]
187 children=opList0 opList1
189 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
191 [system.cpu.fuPool.FUList1.opList0]
197 [system.cpu.fuPool.FUList1.opList1]
203 [system.cpu.fuPool.FUList2]
205 children=opList0 opList1 opList2
207 opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
209 [system.cpu.fuPool.FUList2.opList0]
215 [system.cpu.fuPool.FUList2.opList1]
221 [system.cpu.fuPool.FUList2.opList2]
227 [system.cpu.fuPool.FUList3]
229 children=opList0 opList1 opList2
231 opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
233 [system.cpu.fuPool.FUList3.opList0]
239 [system.cpu.fuPool.FUList3.opList1]
245 [system.cpu.fuPool.FUList3.opList2]
251 [system.cpu.fuPool.FUList4]
255 opList=system.cpu.fuPool.FUList4.opList
257 [system.cpu.fuPool.FUList4.opList]
263 [system.cpu.fuPool.FUList5]
265 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
267 opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
269 [system.cpu.fuPool.FUList5.opList00]
275 [system.cpu.fuPool.FUList5.opList01]
281 [system.cpu.fuPool.FUList5.opList02]
287 [system.cpu.fuPool.FUList5.opList03]
293 [system.cpu.fuPool.FUList5.opList04]
299 [system.cpu.fuPool.FUList5.opList05]
305 [system.cpu.fuPool.FUList5.opList06]
311 [system.cpu.fuPool.FUList5.opList07]
317 [system.cpu.fuPool.FUList5.opList08]
323 [system.cpu.fuPool.FUList5.opList09]
329 [system.cpu.fuPool.FUList5.opList10]
335 [system.cpu.fuPool.FUList5.opList11]
341 [system.cpu.fuPool.FUList5.opList12]
347 [system.cpu.fuPool.FUList5.opList13]
353 [system.cpu.fuPool.FUList5.opList14]
359 [system.cpu.fuPool.FUList5.opList15]
365 [system.cpu.fuPool.FUList5.opList16]
368 opClass=SimdFloatMisc
371 [system.cpu.fuPool.FUList5.opList17]
374 opClass=SimdFloatMult
377 [system.cpu.fuPool.FUList5.opList18]
380 opClass=SimdFloatMultAcc
383 [system.cpu.fuPool.FUList5.opList19]
386 opClass=SimdFloatSqrt
389 [system.cpu.fuPool.FUList6]
393 opList=system.cpu.fuPool.FUList6.opList
395 [system.cpu.fuPool.FUList6.opList]
401 [system.cpu.fuPool.FUList7]
403 children=opList0 opList1
405 opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
407 [system.cpu.fuPool.FUList7.opList0]
413 [system.cpu.fuPool.FUList7.opList1]
419 [system.cpu.fuPool.FUList8]
423 opList=system.cpu.fuPool.FUList8.opList
425 [system.cpu.fuPool.FUList8.opList]
433 addr_ranges=0:18446744073709551615
442 prefetch_on_access=false
450 cpu_side=system.cpu.icache_port
451 mem_side=system.cpu.toL2Bus.slave[0]
453 [system.cpu.interrupts]
457 pio_addr=2305843009213693952
460 int_master=system.membus.slave[2]
461 int_slave=system.membus.master[2]
462 pio=system.membus.master[1]
471 walker=system.cpu.itb.walker
473 [system.cpu.itb.walker]
474 type=X86PagetableWalker
477 port=system.cpu.toL2Bus.slave[2]
481 addr_ranges=0:18446744073709551615
490 prefetch_on_access=false
498 cpu_side=system.cpu.toL2Bus.master[0]
499 mem_side=system.membus.slave[1]
506 use_default_range=false
508 master=system.cpu.l2cache.cpu_side
509 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
514 [system.cpu.workload]
516 cmd=parser 2.1.dict -batch
517 cwd=build/X86/tests/opt/long/se/20.parser/x86/linux/o3-timing
522 executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/parser
524 input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in
525 max_stack_size=67108864
529 simpoint=114600000000
538 use_default_range=false
540 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
541 slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
548 conf_table_reported=false
550 lines_per_rowbuffer=64
551 mem_sched_policy=fcfs
567 port=system.membus.master[0]