stats: update stats for ARMv8 changes
[gem5.git] / tests / long / se / 40.perlbmk / ref / arm / linux / simple-atomic / config.ini
1 [root]
2 type=Root
3 children=system
4 eventq_index=0
5 full_system=false
6 sim_quantum=0
7 time_sync_enable=false
8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
10
11 [system]
12 type=System
13 children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
14 boot_osflags=a
15 cache_line_size=64
16 clk_domain=system.clk_domain
17 eventq_index=0
18 init_param=0
19 kernel=
20 load_addr_mask=1099511627775
21 load_offset=0
22 mem_mode=atomic
23 mem_ranges=
24 memories=system.physmem
25 num_work_ids=16
26 readfile=
27 symbolfile=
28 work_begin_ckpt_count=0
29 work_begin_cpu_id_exit=-1
30 work_begin_exit_count=0
31 work_cpus_ckpt_count=0
32 work_end_ckpt_count=0
33 work_end_exit_count=0
34 work_item_id=-1
35 system_port=system.membus.slave[0]
36
37 [system.clk_domain]
38 type=SrcClockDomain
39 clock=1000
40 eventq_index=0
41 voltage_domain=system.voltage_domain
42
43 [system.cpu]
44 type=AtomicSimpleCPU
45 children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload
46 checker=Null
47 clk_domain=system.cpu_clk_domain
48 cpu_id=0
49 do_checkpoint_insts=true
50 do_quiesce=true
51 do_statistics_insts=true
52 dstage2_mmu=system.cpu.dstage2_mmu
53 dtb=system.cpu.dtb
54 eventq_index=0
55 fastmem=false
56 function_trace=false
57 function_trace_start=0
58 interrupts=system.cpu.interrupts
59 isa=system.cpu.isa
60 istage2_mmu=system.cpu.istage2_mmu
61 itb=system.cpu.itb
62 max_insts_all_threads=0
63 max_insts_any_thread=0
64 max_loads_all_threads=0
65 max_loads_any_thread=0
66 numThreads=1
67 profile=0
68 progress_interval=0
69 simpoint_interval=100000000
70 simpoint_profile=false
71 simpoint_profile_file=simpoint.bb.gz
72 simpoint_start_insts=
73 simulate_data_stalls=false
74 simulate_inst_stalls=false
75 switched_out=false
76 system=system
77 tracer=system.cpu.tracer
78 width=1
79 workload=system.cpu.workload
80 dcache_port=system.membus.slave[2]
81 icache_port=system.membus.slave[1]
82
83 [system.cpu.dstage2_mmu]
84 type=ArmStage2MMU
85 children=stage2_tlb
86 eventq_index=0
87 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
88 tlb=system.cpu.dtb
89
90 [system.cpu.dstage2_mmu.stage2_tlb]
91 type=ArmTLB
92 children=walker
93 eventq_index=0
94 is_stage2=true
95 size=32
96 walker=system.cpu.dstage2_mmu.stage2_tlb.walker
97
98 [system.cpu.dstage2_mmu.stage2_tlb.walker]
99 type=ArmTableWalker
100 clk_domain=system.cpu_clk_domain
101 eventq_index=0
102 is_stage2=true
103 num_squash_per_cycle=2
104 sys=system
105 port=system.membus.slave[6]
106
107 [system.cpu.dtb]
108 type=ArmTLB
109 children=walker
110 eventq_index=0
111 is_stage2=false
112 size=64
113 walker=system.cpu.dtb.walker
114
115 [system.cpu.dtb.walker]
116 type=ArmTableWalker
117 clk_domain=system.cpu_clk_domain
118 eventq_index=0
119 is_stage2=false
120 num_squash_per_cycle=2
121 sys=system
122 port=system.membus.slave[4]
123
124 [system.cpu.interrupts]
125 type=ArmInterrupts
126 eventq_index=0
127
128 [system.cpu.isa]
129 type=ArmISA
130 eventq_index=0
131 fpsid=1090793632
132 id_aa64afr0_el1=0
133 id_aa64afr1_el1=0
134 id_aa64dfr0_el1=1052678
135 id_aa64dfr1_el1=0
136 id_aa64isar0_el1=0
137 id_aa64isar1_el1=0
138 id_aa64mmfr0_el1=15728642
139 id_aa64mmfr1_el1=0
140 id_aa64pfr0_el1=17
141 id_aa64pfr1_el1=0
142 id_isar0=34607377
143 id_isar1=34677009
144 id_isar2=555950401
145 id_isar3=17899825
146 id_isar4=268501314
147 id_isar5=0
148 id_mmfr0=270536963
149 id_mmfr1=0
150 id_mmfr2=19070976
151 id_mmfr3=34611729
152 id_pfr0=49
153 id_pfr1=4113
154 midr=1091551472
155 system=system
156
157 [system.cpu.istage2_mmu]
158 type=ArmStage2MMU
159 children=stage2_tlb
160 eventq_index=0
161 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
162 tlb=system.cpu.itb
163
164 [system.cpu.istage2_mmu.stage2_tlb]
165 type=ArmTLB
166 children=walker
167 eventq_index=0
168 is_stage2=true
169 size=32
170 walker=system.cpu.istage2_mmu.stage2_tlb.walker
171
172 [system.cpu.istage2_mmu.stage2_tlb.walker]
173 type=ArmTableWalker
174 clk_domain=system.cpu_clk_domain
175 eventq_index=0
176 is_stage2=true
177 num_squash_per_cycle=2
178 sys=system
179 port=system.membus.slave[5]
180
181 [system.cpu.itb]
182 type=ArmTLB
183 children=walker
184 eventq_index=0
185 is_stage2=false
186 size=64
187 walker=system.cpu.itb.walker
188
189 [system.cpu.itb.walker]
190 type=ArmTableWalker
191 clk_domain=system.cpu_clk_domain
192 eventq_index=0
193 is_stage2=false
194 num_squash_per_cycle=2
195 sys=system
196 port=system.membus.slave[3]
197
198 [system.cpu.tracer]
199 type=ExeTracer
200 eventq_index=0
201
202 [system.cpu.workload]
203 type=LiveProcess
204 cmd=perlbmk -I. -I lib lgred.makerand.pl
205 cwd=build/ARM/tests/opt/long/se/40.perlbmk/arm/linux/simple-atomic
206 egid=100
207 env=
208 errout=cerr
209 euid=100
210 eventq_index=0
211 executable=/dist/cpu2000/binaries/arm/linux/perlbmk
212 gid=100
213 input=cin
214 max_stack_size=67108864
215 output=cout
216 pid=100
217 ppid=99
218 simpoint=0
219 system=system
220 uid=100
221
222 [system.cpu_clk_domain]
223 type=SrcClockDomain
224 clock=500
225 eventq_index=0
226 voltage_domain=system.voltage_domain
227
228 [system.membus]
229 type=CoherentBus
230 clk_domain=system.clk_domain
231 eventq_index=0
232 header_cycles=1
233 system=system
234 use_default_range=false
235 width=8
236 master=system.physmem.port
237 slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
238
239 [system.physmem]
240 type=SimpleMemory
241 bandwidth=73.000000
242 clk_domain=system.clk_domain
243 conf_table_reported=true
244 eventq_index=0
245 in_addr_map=true
246 latency=30000
247 latency_var=0
248 null=false
249 range=0:134217727
250 port=system.membus.master[0]
251
252 [system.voltage_domain]
253 type=VoltageDomain
254 eventq_index=0
255 voltage=1.000000
256