2 ---------- Begin Simulation Statistics ----------
3 sim_seconds 0.861538 # Number of seconds simulated
4 sim_ticks 861538200000 # Number of ticks simulated
5 final_tick 861538200000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6 sim_freq 1000000000000 # Frequency of simulated ticks
7 host_inst_rate 1602478 # Simulator instruction rate (inst/s)
8 host_op_rate 1787682 # Simulator op (including micro ops) rate (op/s)
9 host_tick_rate 893842215 # Simulator tick rate (ticks/s)
10 host_mem_usage 278712 # Number of bytes of host memory used
11 host_seconds 963.86 # Real time elapsed on the host
12 sim_insts 1544563041 # Number of instructions simulated
13 sim_ops 1723073853 # Number of ops (including micro ops) simulated
14 system.physmem.bytes_read::cpu.inst 6178262356 # Number of bytes read from this memory
15 system.physmem.bytes_read::cpu.data 1581387671 # Number of bytes read from this memory
16 system.physmem.bytes_read::total 7759650027 # Number of bytes read from this memory
17 system.physmem.bytes_inst_read::cpu.inst 6178262356 # Number of instructions bytes read from this memory
18 system.physmem.bytes_inst_read::total 6178262356 # Number of instructions bytes read from this memory
19 system.physmem.bytes_written::cpu.data 624158392 # Number of bytes written to this memory
20 system.physmem.bytes_written::total 624158392 # Number of bytes written to this memory
21 system.physmem.num_reads::cpu.inst 1544565589 # Number of read requests responded to by this memory
22 system.physmem.num_reads::cpu.data 482384187 # Number of read requests responded to by this memory
23 system.physmem.num_reads::total 2026949776 # Number of read requests responded to by this memory
24 system.physmem.num_writes::cpu.data 172586108 # Number of write requests responded to by this memory
25 system.physmem.num_writes::total 172586108 # Number of write requests responded to by this memory
26 system.physmem.bw_read::cpu.inst 7171199554 # Total read bandwidth from this memory (bytes/s)
27 system.physmem.bw_read::cpu.data 1835539818 # Total read bandwidth from this memory (bytes/s)
28 system.physmem.bw_read::total 9006739373 # Total read bandwidth from this memory (bytes/s)
29 system.physmem.bw_inst_read::cpu.inst 7171199554 # Instruction read bandwidth from this memory (bytes/s)
30 system.physmem.bw_inst_read::total 7171199554 # Instruction read bandwidth from this memory (bytes/s)
31 system.physmem.bw_write::cpu.data 724469782 # Write bandwidth from this memory (bytes/s)
32 system.physmem.bw_write::total 724469782 # Write bandwidth from this memory (bytes/s)
33 system.physmem.bw_total::cpu.inst 7171199554 # Total bandwidth to/from this memory (bytes/s)
34 system.physmem.bw_total::cpu.data 2560009600 # Total bandwidth to/from this memory (bytes/s)
35 system.physmem.bw_total::total 9731209155 # Total bandwidth to/from this memory (bytes/s)
36 system.cpu.dtb.inst_hits 0 # ITB inst hits
37 system.cpu.dtb.inst_misses 0 # ITB inst misses
38 system.cpu.dtb.read_hits 0 # DTB read hits
39 system.cpu.dtb.read_misses 0 # DTB read misses
40 system.cpu.dtb.write_hits 0 # DTB write hits
41 system.cpu.dtb.write_misses 0 # DTB write misses
42 system.cpu.dtb.flush_tlb 0 # Number of times complete TLB was flushed
43 system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA
44 system.cpu.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
45 system.cpu.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
46 system.cpu.dtb.flush_entries 0 # Number of entries that have been flushed from TLB
47 system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions
48 system.cpu.dtb.prefetch_faults 0 # Number of TLB faults due to prefetch
49 system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions
50 system.cpu.dtb.perms_faults 0 # Number of TLB faults due to permissions restrictions
51 system.cpu.dtb.read_accesses 0 # DTB read accesses
52 system.cpu.dtb.write_accesses 0 # DTB write accesses
53 system.cpu.dtb.inst_accesses 0 # ITB inst accesses
54 system.cpu.dtb.hits 0 # DTB hits
55 system.cpu.dtb.misses 0 # DTB misses
56 system.cpu.dtb.accesses 0 # DTB accesses
57 system.cpu.itb.inst_hits 0 # ITB inst hits
58 system.cpu.itb.inst_misses 0 # ITB inst misses
59 system.cpu.itb.read_hits 0 # DTB read hits
60 system.cpu.itb.read_misses 0 # DTB read misses
61 system.cpu.itb.write_hits 0 # DTB write hits
62 system.cpu.itb.write_misses 0 # DTB write misses
63 system.cpu.itb.flush_tlb 0 # Number of times complete TLB was flushed
64 system.cpu.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA
65 system.cpu.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
66 system.cpu.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
67 system.cpu.itb.flush_entries 0 # Number of entries that have been flushed from TLB
68 system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions
69 system.cpu.itb.prefetch_faults 0 # Number of TLB faults due to prefetch
70 system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions
71 system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions
72 system.cpu.itb.read_accesses 0 # DTB read accesses
73 system.cpu.itb.write_accesses 0 # DTB write accesses
74 system.cpu.itb.inst_accesses 0 # ITB inst accesses
75 system.cpu.itb.hits 0 # DTB hits
76 system.cpu.itb.misses 0 # DTB misses
77 system.cpu.itb.accesses 0 # DTB accesses
78 system.cpu.workload.num_syscalls 46 # Number of system calls
79 system.cpu.numCycles 1723076401 # number of cpu cycles simulated
80 system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
81 system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
82 system.cpu.committedInsts 1544563041 # Number of instructions committed
83 system.cpu.committedOps 1723073853 # Number of ops (including micro ops) committed
84 system.cpu.num_int_alu_accesses 1536941842 # Number of integer alu accesses
85 system.cpu.num_fp_alu_accesses 36 # Number of float alu accesses
86 system.cpu.num_func_calls 27330256 # number of times a function call or return occured
87 system.cpu.num_conditional_control_insts 177498328 # number of instructions that are conditional controls
88 system.cpu.num_int_insts 1536941842 # number of integer instructions
89 system.cpu.num_fp_insts 36 # number of float instructions
90 system.cpu.num_int_register_reads 7861284498 # number of times the integer registers were read
91 system.cpu.num_int_register_writes 1675132405 # number of times the integer registers were written
92 system.cpu.num_fp_register_reads 24 # number of times the floating registers were read
93 system.cpu.num_fp_register_writes 16 # number of times the floating registers were written
94 system.cpu.num_mem_refs 660773815 # number of memory refs
95 system.cpu.num_load_insts 485926769 # Number of load instructions
96 system.cpu.num_store_insts 174847046 # Number of store instructions
97 system.cpu.num_idle_cycles 0 # Number of idle cycles
98 system.cpu.num_busy_cycles 1723076401 # Number of busy cycles
99 system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
100 system.cpu.idle_fraction 0 # Percentage of idle cycles
102 ---------- End Simulation Statistics ----------
projects / gem5.git / blob