tests/long/se/60.bzip2/ref/arm/linux/simple-timing/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 full_system=false
   5 time_sync_enable=false
   6 time_sync_period=100000000000
   7 time_sync_spin_threshold=100000000
   8
   9 [system]
  10 type=System
  11 children=cpu membus physmem
  12 boot_osflags=a
  13 init_param=0
  14 kernel=
  15 load_addr_mask=1099511627775
  16 mem_mode=atomic
  17 memories=system.physmem
  18 num_work_ids=16
  19 readfile=
  20 symbolfile=
  21 work_begin_ckpt_count=0
  22 work_begin_cpu_id_exit=-1
  23 work_begin_exit_count=0
  24 work_cpus_ckpt_count=0
  25 work_end_ckpt_count=0
  26 work_end_exit_count=0
  27 work_item_id=-1
  28 system_port=system.membus.slave[0]
  29
  30 [system.cpu]
  31 type=TimingSimpleCPU
  32 children=dcache dtb icache interrupts itb l2cache toL2Bus tracer workload
  33 checker=Null
  34 clock=500
  35 cpu_id=0
  36 defer_registration=false
  37 do_checkpoint_insts=true
  38 do_quiesce=true
  39 do_statistics_insts=true
  40 dtb=system.cpu.dtb
  41 function_trace=false
  42 function_trace_start=0
  43 interrupts=system.cpu.interrupts
  44 itb=system.cpu.itb
  45 max_insts_all_threads=0
  46 max_insts_any_thread=0
  47 max_loads_all_threads=0
  48 max_loads_any_thread=0
  49 numThreads=1
  50 phase=0
  51 profile=0
  52 progress_interval=0
  53 system=system
  54 tracer=system.cpu.tracer
  55 workload=system.cpu.workload
  56 dcache_port=system.cpu.dcache.cpu_side
  57 icache_port=system.cpu.icache.cpu_side
  58
  59 [system.cpu.dcache]
  60 type=BaseCache
  61 addr_ranges=0:18446744073709551615
  62 assoc=2
  63 block_size=64
  64 forward_snoops=true
  65 hash_delay=1
  66 is_top_level=true
  67 latency=1000
  68 max_miss_count=0
  69 mshrs=10
  70 prefetch_on_access=false
  71 prefetcher=Null
  72 prioritizeRequests=false
  73 repl=Null
  74 size=262144
  75 subblock_size=0
  76 system=system
  77 tgts_per_mshr=5
  78 trace_addr=0
  79 two_queue=false
  80 write_buffers=8
  81 cpu_side=system.cpu.dcache_port
  82 mem_side=system.cpu.toL2Bus.slave[1]
  83
  84 [system.cpu.dtb]
  85 type=ArmTLB
  86 children=walker
  87 size=64
  88 walker=system.cpu.dtb.walker
  89
  90 [system.cpu.dtb.walker]
  91 type=ArmTableWalker
  92 max_backoff=100000
  93 min_backoff=0
  94 sys=system
  95 port=system.cpu.toL2Bus.slave[3]
  96
  97 [system.cpu.icache]
  98 type=BaseCache
  99 addr_ranges=0:18446744073709551615
 100 assoc=2
 101 block_size=64
 102 forward_snoops=true
 103 hash_delay=1
 104 is_top_level=true
 105 latency=1000
 106 max_miss_count=0
 107 mshrs=10
 108 prefetch_on_access=false
 109 prefetcher=Null
 110 prioritizeRequests=false
 111 repl=Null
 112 size=131072
 113 subblock_size=0
 114 system=system
 115 tgts_per_mshr=5
 116 trace_addr=0
 117 two_queue=false
 118 write_buffers=8
 119 cpu_side=system.cpu.icache_port
 120 mem_side=system.cpu.toL2Bus.slave[0]
 121
 122 [system.cpu.interrupts]
 123 type=ArmInterrupts
 124
 125 [system.cpu.itb]
 126 type=ArmTLB
 127 children=walker
 128 size=64
 129 walker=system.cpu.itb.walker
 130
 131 [system.cpu.itb.walker]
 132 type=ArmTableWalker
 133 max_backoff=100000
 134 min_backoff=0
 135 sys=system
 136 port=system.cpu.toL2Bus.slave[2]
 137
 138 [system.cpu.l2cache]
 139 type=BaseCache
 140 addr_ranges=0:18446744073709551615
 141 assoc=2
 142 block_size=64
 143 forward_snoops=true
 144 hash_delay=1
 145 is_top_level=false
 146 latency=10000
 147 max_miss_count=0
 148 mshrs=10
 149 prefetch_on_access=false
 150 prefetcher=Null
 151 prioritizeRequests=false
 152 repl=Null
 153 size=2097152
 154 subblock_size=0
 155 system=system
 156 tgts_per_mshr=5
 157 trace_addr=0
 158 two_queue=false
 159 write_buffers=8
 160 cpu_side=system.cpu.toL2Bus.master[0]
 161 mem_side=system.membus.slave[1]
 162
 163 [system.cpu.toL2Bus]
 164 type=Bus
 165 block_size=64
 166 bus_id=0
 167 clock=1000
 168 header_cycles=1
 169 use_default_range=false
 170 width=64
 171 master=system.cpu.l2cache.cpu_side
 172 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
 173
 174 [system.cpu.tracer]
 175 type=ExeTracer
 176
 177 [system.cpu.workload]
 178 type=LiveProcess
 179 cmd=bzip2 input.source 1
 180 cwd=build/ARM/tests/opt/long/se/60.bzip2/arm/linux/simple-timing
 181 egid=100
 182 env=
 183 errout=cerr
 184 euid=100
 185 executable=/dist/m5/cpu2000/binaries/arm/linux/bzip2
 186 gid=100
 187 input=cin
 188 max_stack_size=67108864
 189 output=cout
 190 pid=100
 191 ppid=99
 192 simpoint=0
 193 system=system
 194 uid=100
 195
 196 [system.membus]
 197 type=Bus
 198 block_size=64
 199 bus_id=0
 200 clock=1000
 201 header_cycles=1
 202 use_default_range=false
 203 width=64
 204 master=system.physmem.port[0]
 205 slave=system.system_port system.cpu.l2cache.mem_side
 206
 207 [system.physmem]
 208 type=SimpleMemory
 209 conf_table_reported=false
 210 file=
 211 in_addr_map=true
 212 latency=30000
 213 latency_var=0
 214 null=false
 215 range=0:134217727
 216 zero=false
 217 port=system.membus.master[0]
 218