eedfe9da765e3e9d73deb0632fecf032dc398fd0
[gem5.git] / tests / long / se / 60.bzip2 / ref / x86 / linux / simple-timing / config.ini
1 [root]
2 type=Root
3 children=system
4 eventq_index=0
5 full_system=false
6 sim_quantum=0
7 time_sync_enable=false
8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
10
11 [system]
12 type=System
13 children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
14 boot_osflags=a
15 cache_line_size=64
16 clk_domain=system.clk_domain
17 eventq_index=0
18 init_param=0
19 kernel=
20 kernel_addr_check=true
21 load_addr_mask=1099511627775
22 load_offset=0
23 mem_mode=timing
24 mem_ranges=
25 memories=system.physmem
26 num_work_ids=16
27 readfile=
28 symbolfile=
29 work_begin_ckpt_count=0
30 work_begin_cpu_id_exit=-1
31 work_begin_exit_count=0
32 work_cpus_ckpt_count=0
33 work_end_ckpt_count=0
34 work_end_exit_count=0
35 work_item_id=-1
36 system_port=system.membus.slave[0]
37
38 [system.clk_domain]
39 type=SrcClockDomain
40 clock=1000
41 domain_id=-1
42 eventq_index=0
43 init_perf_level=0
44 voltage_domain=system.voltage_domain
45
46 [system.cpu]
47 type=TimingSimpleCPU
48 children=apic_clk_domain dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
49 branchPred=Null
50 checker=Null
51 clk_domain=system.cpu_clk_domain
52 cpu_id=0
53 do_checkpoint_insts=true
54 do_quiesce=true
55 do_statistics_insts=true
56 dtb=system.cpu.dtb
57 eventq_index=0
58 function_trace=false
59 function_trace_start=0
60 interrupts=system.cpu.interrupts
61 isa=system.cpu.isa
62 itb=system.cpu.itb
63 max_insts_all_threads=0
64 max_insts_any_thread=0
65 max_loads_all_threads=0
66 max_loads_any_thread=0
67 numThreads=1
68 profile=0
69 progress_interval=0
70 simpoint_start_insts=
71 socket_id=0
72 switched_out=false
73 system=system
74 tracer=system.cpu.tracer
75 workload=system.cpu.workload
76 dcache_port=system.cpu.dcache.cpu_side
77 icache_port=system.cpu.icache.cpu_side
78
79 [system.cpu.apic_clk_domain]
80 type=DerivedClockDomain
81 clk_divider=16
82 clk_domain=system.cpu_clk_domain
83 eventq_index=0
84
85 [system.cpu.dcache]
86 type=BaseCache
87 children=tags
88 addr_ranges=0:18446744073709551615
89 assoc=2
90 clk_domain=system.cpu_clk_domain
91 eventq_index=0
92 forward_snoops=true
93 hit_latency=2
94 is_top_level=true
95 max_miss_count=0
96 mshrs=4
97 prefetch_on_access=false
98 prefetcher=Null
99 response_latency=2
100 sequential_access=false
101 size=262144
102 system=system
103 tags=system.cpu.dcache.tags
104 tgts_per_mshr=20
105 two_queue=false
106 write_buffers=8
107 cpu_side=system.cpu.dcache_port
108 mem_side=system.cpu.toL2Bus.slave[1]
109
110 [system.cpu.dcache.tags]
111 type=LRU
112 assoc=2
113 block_size=64
114 clk_domain=system.cpu_clk_domain
115 eventq_index=0
116 hit_latency=2
117 sequential_access=false
118 size=262144
119
120 [system.cpu.dtb]
121 type=X86TLB
122 children=walker
123 eventq_index=0
124 size=64
125 walker=system.cpu.dtb.walker
126
127 [system.cpu.dtb.walker]
128 type=X86PagetableWalker
129 clk_domain=system.cpu_clk_domain
130 eventq_index=0
131 num_squash_per_cycle=4
132 system=system
133 port=system.cpu.toL2Bus.slave[3]
134
135 [system.cpu.icache]
136 type=BaseCache
137 children=tags
138 addr_ranges=0:18446744073709551615
139 assoc=2
140 clk_domain=system.cpu_clk_domain
141 eventq_index=0
142 forward_snoops=true
143 hit_latency=2
144 is_top_level=true
145 max_miss_count=0
146 mshrs=4
147 prefetch_on_access=false
148 prefetcher=Null
149 response_latency=2
150 sequential_access=false
151 size=131072
152 system=system
153 tags=system.cpu.icache.tags
154 tgts_per_mshr=20
155 two_queue=false
156 write_buffers=8
157 cpu_side=system.cpu.icache_port
158 mem_side=system.cpu.toL2Bus.slave[0]
159
160 [system.cpu.icache.tags]
161 type=LRU
162 assoc=2
163 block_size=64
164 clk_domain=system.cpu_clk_domain
165 eventq_index=0
166 hit_latency=2
167 sequential_access=false
168 size=131072
169
170 [system.cpu.interrupts]
171 type=X86LocalApic
172 clk_domain=system.cpu.apic_clk_domain
173 eventq_index=0
174 int_latency=1000
175 pio_addr=2305843009213693952
176 pio_latency=100000
177 system=system
178 int_master=system.membus.slave[2]
179 int_slave=system.membus.master[2]
180 pio=system.membus.master[1]
181
182 [system.cpu.isa]
183 type=X86ISA
184 eventq_index=0
185
186 [system.cpu.itb]
187 type=X86TLB
188 children=walker
189 eventq_index=0
190 size=64
191 walker=system.cpu.itb.walker
192
193 [system.cpu.itb.walker]
194 type=X86PagetableWalker
195 clk_domain=system.cpu_clk_domain
196 eventq_index=0
197 num_squash_per_cycle=4
198 system=system
199 port=system.cpu.toL2Bus.slave[2]
200
201 [system.cpu.l2cache]
202 type=BaseCache
203 children=tags
204 addr_ranges=0:18446744073709551615
205 assoc=8
206 clk_domain=system.cpu_clk_domain
207 eventq_index=0
208 forward_snoops=true
209 hit_latency=20
210 is_top_level=false
211 max_miss_count=0
212 mshrs=20
213 prefetch_on_access=false
214 prefetcher=Null
215 response_latency=20
216 sequential_access=false
217 size=2097152
218 system=system
219 tags=system.cpu.l2cache.tags
220 tgts_per_mshr=12
221 two_queue=false
222 write_buffers=8
223 cpu_side=system.cpu.toL2Bus.master[0]
224 mem_side=system.membus.slave[1]
225
226 [system.cpu.l2cache.tags]
227 type=LRU
228 assoc=8
229 block_size=64
230 clk_domain=system.cpu_clk_domain
231 eventq_index=0
232 hit_latency=20
233 sequential_access=false
234 size=2097152
235
236 [system.cpu.toL2Bus]
237 type=CoherentBus
238 clk_domain=system.cpu_clk_domain
239 eventq_index=0
240 header_cycles=1
241 system=system
242 use_default_range=false
243 width=32
244 master=system.cpu.l2cache.cpu_side
245 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
246
247 [system.cpu.tracer]
248 type=ExeTracer
249 eventq_index=0
250
251 [system.cpu.workload]
252 type=LiveProcess
253 cmd=bzip2 input.source 1
254 cwd=build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-timing
255 egid=100
256 env=
257 errout=cerr
258 euid=100
259 eventq_index=0
260 executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/bzip2
261 gid=100
262 input=cin
263 max_stack_size=67108864
264 output=cout
265 pid=100
266 ppid=99
267 simpoint=0
268 system=system
269 uid=100
270
271 [system.cpu_clk_domain]
272 type=SrcClockDomain
273 clock=500
274 domain_id=-1
275 eventq_index=0
276 init_perf_level=0
277 voltage_domain=system.voltage_domain
278
279 [system.dvfs_handler]
280 type=DVFSHandler
281 domains=
282 enable=false
283 eventq_index=0
284 sys_clk_domain=system.clk_domain
285 transition_latency=100000000
286
287 [system.membus]
288 type=CoherentBus
289 clk_domain=system.clk_domain
290 eventq_index=0
291 header_cycles=1
292 system=system
293 use_default_range=false
294 width=8
295 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
296 slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
297
298 [system.physmem]
299 type=SimpleMemory
300 bandwidth=73.000000
301 clk_domain=system.clk_domain
302 conf_table_reported=true
303 eventq_index=0
304 in_addr_map=true
305 latency=30000
306 latency_var=0
307 null=false
308 range=0:134217727
309 port=system.membus.master[0]
310
311 [system.voltage_domain]
312 type=VoltageDomain
313 eventq_index=0
314 voltage=1.000000
315